From f8ed5a7cf06c23bd292f1de291334792a0efb926 Mon Sep 17 00:00:00 2001
From: Mikael Pettersson <mikpelinux@gmail.com>
Date: Fri, 24 Jul 2020 23:21:14 +0200
Subject: [PATCH] sim: sim_boolean: handle ANDCBB, add unit test

---
 erlang/apps/sim/src/sim_boolean.erl        | 15 +++++++++++++++
 erlang/apps/sim/src/sim_core.erl           |  1 +
 erlang/apps/sim/test/sim_boolean_tests.erl | 13 +++++++++++++
 3 files changed, 29 insertions(+)

diff --git a/erlang/apps/sim/src/sim_boolean.erl b/erlang/apps/sim/src/sim_boolean.erl
index 12ea765..81d23f9 100644
--- a/erlang/apps/sim/src/sim_boolean.erl
+++ b/erlang/apps/sim/src/sim_boolean.erl
@@ -31,6 +31,7 @@
         , handle_ANDCAI/4
         , handle_ANDCAM/4
         , handle_ANDCB/4
+        , handle_ANDCBB/4
         , handle_ANDCBI/4
         , handle_ANDCBM/4
         , handle_ANDCM/4
@@ -442,6 +443,20 @@ handle_ANDCBM(Core, Mem, IR, EA) ->
                           fun(Core1, Mem1) -> handle_ANDCBM(Core1, Mem1, IR, EA) end)
   end.
 
+-spec handle_ANDCBB(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_ANDCBB(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      CA = sim_core:get_ac(Core, AC),
+      Word = ((bnot CE) band (bnot CA)) band ((1 bsl 36) - 1),
+      handle_ANDB(Core, Mem, AC, EA, Word);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> handle_ANDCBB(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 ea_address(#ea{section = Section, offset = Offset}) ->
diff --git a/erlang/apps/sim/src/sim_core.erl b/erlang/apps/sim/src/sim_core.erl
index b5ce2cc..237b4a5 100644
--- a/erlang/apps/sim/src/sim_core.erl
+++ b/erlang/apps/sim/src/sim_core.erl
@@ -288,6 +288,7 @@ dispatch(Core, Mem, IR, EA) ->
     8#440 -> sim_boolean:handle_ANDCB(Core, Mem, IR, EA);
     8#441 -> sim_boolean:handle_ANDCBI(Core, Mem, IR, EA);
     8#442 -> sim_boolean:handle_ANDCBM(Core, Mem, IR, EA);
+    8#443 -> sim_boolean:handle_ANDCBB(Core, Mem, IR, EA);
     _ ->
       PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
       {Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
diff --git a/erlang/apps/sim/test/sim_boolean_tests.erl b/erlang/apps/sim/test/sim_boolean_tests.erl
index bb4ea41..8c6f3ae 100644
--- a/erlang/apps/sim/test/sim_boolean_tests.erl
+++ b/erlang/apps/sim/test/sim_boolean_tests.erl
@@ -79,6 +79,7 @@
 -define(OP_ANDCB, 8#440).
 -define(OP_ANDCBI, 8#441).
 -define(OP_ANDCBM, 8#442).
+-define(OP_ANDCBB, 8#443).
 
 %% 2.4 Boolean Functions =======================================================
 
@@ -511,6 +512,18 @@ andcbm_test() ->
          [ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, 0)} % C(1,,200) = -1,,0
          ]).
 
+andcbb_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,333333
+    , {1, 8#101, ?INSN(?OP_ANDCBB, 1, 0, 0, 8#200)}   % 1,,101/ ANDCBB 1,200
+    , {1, 8#102, ?INSN_INVALID}                       % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(0, 8#070707)}                % 1,,200/ 0,,070707
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, 0)} % C(1,,200) = -1,,0
+         , {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 0)} % AC1 = -1,,0
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->