diff --git a/erlang/apps/sim/src/sim_core.erl b/erlang/apps/sim/src/sim_core.erl
index 867a7ce..07ef54b 100644
--- a/erlang/apps/sim/src/sim_core.erl
+++ b/erlang/apps/sim/src/sim_core.erl
@@ -224,7 +224,7 @@ dispatch(Core, Mem, IR, EA) ->
   %% Dispatch on the opcode (top 9 bits).
   case IR bsr 4 of
     8#104 -> sim_kernel:handle_JSYS(Core, Mem, IR, EA);
-    8#200 -> handle_MOVE(Core, Mem, IR, EA);
+    8#200 -> sim_moves:handle_MOVE(Core, Mem, IR, EA);
     8#201 -> handle_MOVEI(Core, Mem, IR, EA);
     8#250 -> sim_moves:handle_EXCH(Core, Mem, IR, EA);
     _ ->
@@ -232,17 +232,6 @@ dispatch(Core, Mem, IR, EA) ->
       {Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
   end.
 
-handle_MOVE(Core, Mem, IR, #ea{section = Section, offset = Offset, islocal = IsLocal} = EA) ->
-  case c(Core, Mem, Section, Offset, IsLocal) of
-    {ok, CE} ->
-      AC = IR band 8#17,
-      next_pc(set_ac(Core, AC, CE), Mem);
-    {error, Reason} ->
-      E = (Section bsl 18) bor Offset,
-      page_fault(Core, Mem, E, read, Reason,
-                 fun(Core1, Mem1) -> handle_MOVE(Core1, Mem1, IR, EA) end)
-  end.
-
 handle_MOVEI(Core, Mem, IR, #ea{offset = E}) ->
   AC = IR band 8#17,
   next_pc(set_ac(Core, AC, E), Mem).
diff --git a/erlang/apps/sim/src/sim_moves.erl b/erlang/apps/sim/src/sim_moves.erl
index 76f7e94..211b0f9 100644
--- a/erlang/apps/sim/src/sim_moves.erl
+++ b/erlang/apps/sim/src/sim_moves.erl
@@ -25,6 +25,7 @@
 -module(sim_moves).
 
 -export([ handle_EXCH/4
+        , handle_MOVE/4
         ]).
 
 -include("sim_core.hrl").
@@ -54,6 +55,22 @@ handle_EXCH(Core, Mem, AC, EA, CE, CA) ->
                           fun(Core1, Mem1) -> handle_EXCH(Core1, Mem1, AC, EA, CE, CA) end)
   end.
 
+%% 2.1.2 Move Instruction Class ================================================
+
+%% MOVE - Move
+
+-spec handle_MOVE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_MOVE(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      sim_core:next_pc(sim_core:set_ac(Core, AC, CE), Mem);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> handle_MOVE(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 ea_address(#ea{section = Section, offset = Offset}) ->
diff --git a/erlang/apps/sim/test/sim_moves_tests.erl b/erlang/apps/sim/test/sim_moves_tests.erl
index 653e696..a7bd3d5 100644
--- a/erlang/apps/sim/test/sim_moves_tests.erl
+++ b/erlang/apps/sim/test/sim_moves_tests.erl
@@ -73,6 +73,18 @@ exch_ac_ac_test() ->
          , {#ea{section = 1, offset = 2, islocal = false}, 8#27} % AC2 = 27
          ]).
 
+%% 2.1.2 Move Instruction Class ================================================
+
+move_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVE, 1, 0, 0, 8#150)}   % 1,,100/ MOVE 1,150
+    , {1, 8#101, ?INSN_INVALID}                     % 1,,101/ <invalid>
+    , {1, 8#150, 8#42}                              % 1,,150/ 0,,42
+    ],
+  expect(Prog, [], {1, 8#101}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, 8#42} % AC1 = 42
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->