Fix some minor errors found from review of desired changes.

* DSACK*(0:1) (syntax)

* Wires wrong on redraw of 74F253 template.

hardware/pcb/mlb/CPU+FPU.sch

@@ -873,9 +873,9 @@ Connection ~ 14650 2200
 Wire Wire Line
 	14650 2200 15800 2200
 Text Label 2050 4550 0    50   ~ 0
-DSACK(0)*
+DSACK*(0)
 Text Label 2050 4650 0    50   ~ 0
-DSACK(1)*
+DSACK*(1)
 Text Label 2050 4750 0    50   ~ 0
 STERM*
 Text Label 2050 4950 0    50   ~ 0
@@ -4628,6 +4628,8 @@ Wire Wire Line
 	12700 7150 11550 7150
 Wire Wire Line
 	11550 7150 11550 7450
+Text Label 3900 5150 0    50   ~ 0
+R-W*
 Wire Bus Line
 	4500 2200 4500 4350
 Wire Bus Line
@@ -4644,6 +4646,4 @@ Wire Bus Line
 	1900 5350 1900 10250
 Wire Bus Line
 	4250 5350 4250 10000
-Text Label 3900 5150 0    50   ~ 0
-R-W*
 $EndSCHEMATC

hardware/pcb/mlb/Video Interface.sch

@@ -708,7 +708,7 @@ Wire Wire Line
 	8800 5700 8750 5700
 Connection ~ 6950 5700
 Wire Wire Line
-	8750 5700 8750 5250
+	8750 5700 8750 5600
 Wire Wire Line
 	8750 5250 9950 5250
 Connection ~ 8750 5700
@@ -1879,6 +1879,14 @@ Wire Wire Line
 	9700 7750 10200 7750
 Wire Wire Line
 	10200 7750 10200 6800
+Text Label 8250 8500 0    50   ~ 0
+ALTVID
+Wire Wire Line
+	5950 5600 5950 5700
+Connection ~ 5950 5600
+Connection ~ 5950 5700
+Wire Wire Line
+	8800 5600 8750 5600
 Wire Wire Line
 	7950 8500 8800 8500
 Wire Bus Line
@@ -1897,6 +1905,7 @@ Wire Bus Line
 	2450 3900 2450 5200
 Wire Bus Line
 	2450 5200 2450 7350
-Text Label 8250 8500 0    50   ~ 0
-ALTVID
+Connection ~ 8750 5600
+Wire Wire Line
+	8750 5600 8750 5250
 $EndSCHEMATC