diff --git a/cores/c16/c1541/c1541_sd.vhd.bak b/cores/c16/c1541/c1541_sd.vhd.bak deleted file mode 100644 index 3ff2824..0000000 --- a/cores/c16/c1541/c1541_sd.vhd.bak +++ /dev/null @@ -1,311 +0,0 @@ ---------------------------------------------------------------------------------- --- Commodore 1541 to SD card (read/write) by Dar (darfpga@aol.fr) 24-May-2017 --- http://darfpga.blogspot.fr --- --- c1541_sd reads D64 data from raw SD card, produces GCR data, feeds c1541_logic --- Raw SD data : each D64 image must start on 256KB boundaries --- disk_num allow to select D64 image --- --- c1541_logic from : Mark McDougall --- spi_controller from : Michel Stempin, Stephen A. Edwards --- via6522 from : Arnim Laeuger, Mark McDougall, MikeJ --- T65 from : Daniel Wallner, MikeJ, ehenciak --- --- c1541_logic modified for : slow down CPU (EOI ack missed by real c64) --- : remove iec internal OR wired --- : synched atn_in (sometime no IRQ with real c64) --- spi_controller modified for : sector start and size adapted + busy signal --- via6522 modified for : no modification --- --- --- Input clk 32MHz and 18MHz (18MHz could be replaced with 32/2 if needed) --- ---------------------------------------------------------------------------------- - -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_unsigned.all; -use ieee.numeric_std.all; - -entity c1541_sd is -port( - clk32 : in std_logic; - clk_spi_ctrlr : in std_logic; - reset : in std_logic; - - disk_num : in std_logic_vector(9 downto 0); - - iec_atn_i : in std_logic; - iec_data_i : in std_logic; - iec_clk_i : in std_logic; - - iec_atn_o : out std_logic; - iec_data_o : out std_logic; - iec_clk_o : out std_logic; - - sd_miso : in std_logic; - sd_cs_n : buffer std_logic; - sd_mosi : buffer std_logic; - sd_sclk : buffer std_logic; - bus_available : in std_logic; - - dbg_track_num_dbl : out std_logic_vector(6 downto 0); - dbg_sd_busy : out std_logic; - dbg_sd_state : out std_logic_vector(7 downto 0); - dbg_read_sector : out std_logic_vector(4 downto 0); - dbg_mtr : out std_logic; - dbg_act : out std_logic -); -end c1541_sd; - -architecture struct of c1541_sd is - -signal spi_ram_addr : std_logic_vector(12 downto 0); -signal spi_ram_di : std_logic_vector( 7 downto 0); -signal spi_ram_we : std_logic; - -signal ram_addr : std_logic_vector(12 downto 0); -signal ram_di : std_logic_vector( 7 downto 0); -signal ram_do : std_logic_vector( 7 downto 0); -signal ram_we : std_logic; - -signal floppy_ram_addr : std_logic_vector(12 downto 0); -signal floppy_ram_di : std_logic_vector( 7 downto 0); -signal floppy_ram_we : std_logic; - -signal c1541_logic_din : std_logic_vector(7 downto 0); -- data read -signal c1541_logic_dout : std_logic_vector(7 downto 0); -- data to write -signal mode : std_logic; -- read/write -signal mode_r : std_logic; -- read/write -signal stp : std_logic_vector(1 downto 0); -- stepper motor control -signal stp_r : std_logic_vector(1 downto 0); -- stepper motor control -signal mtr : std_logic ; -- stepper motor on/off ---signal mtr_r : std_logic ; -- stepper motor on/off -signal freq : std_logic_vector(1 downto 0); -- motor (gcr_bit) frequency -signal sync_n : std_logic; -- reading SYNC bytes -signal byte_n : std_logic; -- byte ready -signal act : std_logic; -- activity LED -signal act_r : std_logic; -- activity LED - -signal track_num_dbl : std_logic_vector(6 downto 0); -signal new_track_num_dbl : std_logic_vector(6 downto 0); -signal sd_busy : std_logic; - -type byte_array is array(0 to 8191) of std_logic_vector(7 downto 0); -signal track_buffer : byte_array; - -signal save_track : std_logic; -signal track_modified : std_logic; -signal sector_offset : std_logic; -signal save_track_stage : std_logic_vector(3 downto 0); - -signal dbg_sector : std_logic_vector(4 downto 0); -signal dbg_adr_fetch : std_logic_vector(15 downto 0); - - -begin - - c1541 : entity work.c1541_logic - generic map - ( - DEVICE_SELECT => "00" - ) - port map - ( - clk_32M => clk32, - reset => reset, - - -- serial bus - sb_data_oe => iec_data_o, - sb_clk_oe => iec_clk_o, - sb_atn_oe => iec_atn_o, - - sb_data_in => not iec_data_i, - sb_clk_in => not iec_clk_i, - sb_atn_in => not iec_atn_i, - - -- drive-side interface - ds => "00", -- device select - di => c1541_logic_din, -- data read - do => c1541_logic_dout, -- data to write - mode => mode, -- read/write - stp => stp, -- stepper motor control - mtr => mtr, -- motor on/off - freq => freq, -- motor frequency - sync_n => sync_n, -- reading SYNC bytes - byte_n => byte_n, -- byte ready - wps_n => '1', -- write-protect sense (0 = protected) - tr00_sense_n => '1', -- track 0 sense (unused?) - act => act, -- activity LED - - dbg_adr_fetch => dbg_adr_fetch, - dbg_cpu_irq => open - ); - -floppy : entity work.gcr_floppy -port map -( - clk32 => clk32, - - c1541_logic_din => c1541_logic_din, -- data read - c1541_logic_dout => c1541_logic_dout, -- data to write - - mode => mode, -- read/write --- stp => stp, -- stepper motor control - mtr => mtr, -- stepper motor on/off --- freq => freq, -- motor (gcr_bit) frequency - sync_n => sync_n, -- reading SYNC bytes - byte_n => byte_n, -- byte ready - - track_num => new_track_num_dbl(6 downto 1), - - ram_addr => floppy_ram_addr, - ram_do => ram_do, - ram_di => floppy_ram_di, - ram_we => floppy_ram_we, - ram_ready => not sd_busy, - - dbg_sector => dbg_sector -); - -process (clk32) -begin - if rising_edge(clk32) then - stp_r <= stp; - act_r <= act; - mode_r <= mode; - if reset = '1' then - track_num_dbl <= "0100100";--"0000010"; - track_modified <= '0'; - save_track_stage <= X"0"; - else - if mtr = '1' then - if( (stp_r = "00" and stp = "10") - or (stp_r = "10" and stp = "01") - or (stp_r = "01" and stp = "11") - or (stp_r = "11" and stp = "00")) then - if track_num_dbl < "1010000" then - track_num_dbl <= track_num_dbl + '1'; - if track_modified = '1' then - if save_track_stage = X"0" then - save_track_stage <= X"1"; - end if; - else - new_track_num_dbl <= track_num_dbl + '1'; - end if; - end if; - end if; - - if( (stp_r = "00" and stp = "11") - or (stp_r = "10" and stp = "00") - or (stp_r = "01" and stp = "10") - or (stp_r = "11" and stp = "01")) then - if track_num_dbl > "0000001" then - track_num_dbl <= track_num_dbl - '1'; - if track_modified = '1' then - if save_track_stage = X"0" then - save_track_stage <= X"1"; - end if; - else - new_track_num_dbl <= track_num_dbl - '1'; - end if; - end if; - end if; - - if mode_r = '0' and mode = '1' then -- leaving write mode - track_modified <= '1'; - end if; - end if; - - if act = '0' and act_r = '1' then -- stopping activity - if track_modified = '1' and save_track_stage = X"0" then - save_track_stage <= X"1"; - end if; - end if; - - -- save track state machine - case save_track_stage is - when X"0" => - new_track_num_dbl <= track_num_dbl; - when X"1" => - save_track <= '1'; - if sd_busy = '1' then - save_track_stage <= X"2"; - end if; - when X"2" => - save_track_stage <= X"3"; - when X"3" => - save_track_stage <= X"4"; - when X"4" => - save_track <= '0'; -- must released save_track for spi_controler - if sd_busy = '0' then - save_track_stage <= X"5"; - end if; - when X"5" => - track_modified <= '0'; - save_track_stage <= X"0"; - when others => - save_track_stage <= X"0"; - end case; - - end if; -- reset - end if; -- rising edge clock -end process; - - -sd_spi : entity work.spi_controller -port map -( - cs_n => sd_cs_n, --: out std_logic; -- MMC chip select - mosi => sd_mosi, --: out std_logic; -- Data to card (master out slave in) - miso => sd_miso, --: in std_logic; -- Data from card (master in slave out) - sclk => sd_sclk, --: out std_logic; -- Card clock - bus_available => bus_available, - - ram_addr => spi_ram_addr, -- out unsigned(13 downto 0); - ram_di => spi_ram_di, -- out unsigned(7 downto 0); - ram_do => ram_do, -- in unsigned(7 downto 0); - ram_we => spi_ram_we, - - track_num => new_track_num_dbl(6 downto 1), - disk_num => disk_num, - busy => sd_busy, - save_track => save_track, - sector_offset => sector_offset, - - clk => clk_spi_ctrlr, - reset => reset, - - dbg_state => dbg_sd_state -); - - -process(clk32) -begin - if falling_edge(clk32) then - if ram_we = '1' then - track_buffer(to_integer(unsigned(ram_addr))) <= ram_di; - end if; - ram_do <= track_buffer(to_integer(unsigned(ram_addr))); - end if; -end process; - -ram_addr <= spi_ram_addr when sd_busy = '1' else floppy_ram_addr + ("000"§or_offset&X"00"); -ram_we <= spi_ram_we when sd_busy = '1' else floppy_ram_we; -ram_di <= spi_ram_di when sd_busy = '1' else floppy_ram_di; - -process (clk32) -begin - if rising_edge(clk32) then - if dbg_adr_fetch = X"F4D7" then - dbg_read_sector <= dbg_sector; - end if; - end if; -end process; - -dbg_sd_busy <= sd_busy; -dbg_track_num_dbl <= new_track_num_dbl; -dbg_mtr <= mtr; -dbg_act <= act; - -end struct; diff --git a/cores/c16/c1541/mist_sd_card.sv.bak b/cores/c16/c1541/mist_sd_card.sv.bak deleted file mode 100644 index 2b2f5b8..0000000 --- a/cores/c16/c1541/mist_sd_card.sv.bak +++ /dev/null @@ -1,175 +0,0 @@ -// -// sd_card.v -// -// Copyright (c) 2016 Sorgelig -// -// This source file is free software: you can redistribute it and/or modify -// it under the terms of the Lesser GNU General Public License as published -// by the Free Software Foundation, either version 3 of the License, or -// (at your option) any later version. -// -// This source file is distributed in the hope that it will be useful, -// but WITHOUT ANY WARRANTY; without even the implied warranty of -// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -// GNU General Public License for more details. -// -// You should have received a copy of the GNU General Public License -// along with this program. If not, see . -// -// -///////////////////////////////////////////////////////////////////////// - -module sd_card -( - input clk, - input reset, - - output [31:0] sd_lba, - output reg sd_rd, - output reg sd_wr, - input sd_ack, - - input [8:0] sd_buff_addr, - input [7:0] sd_buff_dout, - output [7:0] sd_buff_din, - input sd_buff_wr, - - input save_track, - input change, - input [5:0] track, - input [4:0] sector, - input [7:0] buff_addr, - output [7:0] buff_dout, - input [7:0] buff_din, - input buff_we, - output reg busy -); - -assign sd_lba = lba; - -trk_dpram buffer -( - .clock(clk), - - .address_a(sd_buff_base + base_fix + sd_buff_addr), - .data_a(sd_buff_dout), - .wren_a(sd_ack & sd_buff_wr), - .q_a(sd_buff_din), - - .address_b({sector, buff_addr}), - .data_b(buff_din), - .wren_b(buff_we), - .q_b(buff_dout) -); - -wire [9:0] start_sectors[41] = - '{ 0, 0, 21, 42, 63, 84,105,126,147,168,189,210,231,252,273,294,315,336,357,376,395, - 414,433,452,471,490,508,526,544,562,580,598,615,632,649,666,683,700,717,734,751}; - -reg [31:0] lba; -reg [12:0] base_fix; -reg [12:0] sd_buff_base; - -always @(posedge clk) begin - reg old_ack; - reg [5:0] cur_track = 0; - reg old_change, ready = 0; - reg saving = 0; - - old_change <= change; - if(~old_change & change) ready <= 1; - - old_ack <= sd_ack; - if(sd_ack) {sd_rd,sd_wr} <= 0; - - if(reset) begin - cur_track <= 'b111111; - busy <= 0; - sd_rd <= 0; - sd_wr <= 0; - saving<= 0; - end - else - if(busy) begin - if(old_ack && ~sd_ack) begin - if(sd_buff_base < 'h1800) begin - sd_buff_base <= sd_buff_base + 13'd512; - lba <= lba + 1'd1; - if(saving) sd_wr <= 1; - else sd_rd <= 1; - end - else - if(saving && (cur_track != track)) begin - saving <= 0; - cur_track <= track; - sd_buff_base <= 0; - base_fix <= start_sectors[track][0] ? 13'h1F00 : 13'h0000; - lba <= start_sectors[track][9:1]; - sd_rd <= 1; - end - else - begin - busy <= 0; - end - end - end - else - if(ready) begin - if(save_track && cur_track != 'b111111) begin - saving <= 1; - sd_buff_base <= 0; - lba <= start_sectors[cur_track][9:1]; - sd_wr <= 1; - busy <= 1; - end - else - if((cur_track != track) || (old_change && ~change)) begin - saving <= 0; - cur_track <= track; - sd_buff_base <= 0; - base_fix <= start_sectors[track][0] ? 13'h1F00 : 13'h0000; - lba <= start_sectors[track][9:1]; - sd_rd <= 1; - busy <= 1; - end - end -end - -endmodule - -module trk_dpram #(parameter DATAWIDTH=8, ADDRWIDTH=13) -( - input clock, - - input [ADDRWIDTH-1:0] address_a, - input [DATAWIDTH-1:0] data_a, - input wren_a, - output reg [DATAWIDTH-1:0] q_a, - - input [ADDRWIDTH-1:0] address_b, - input [DATAWIDTH-1:0] data_b, - input wren_b, - output reg [DATAWIDTH-1:0] q_b -); - -logic [DATAWIDTH-1:0] ram[0:(1< "NONE", - address_reg_b => "CLOCK0", - clock_enable_input_a => "BYPASS", - clock_enable_input_b => "BYPASS", - clock_enable_output_b => "BYPASS", - init_file => "std_C1541.mif", - intended_device_family => "Cyclone III", - lpm_type => "altsyncram", - numwords_a => 16384, - numwords_b => 16384, - operation_mode => "DUAL_PORT", - outdata_aclr_b => "NONE", - outdata_reg_b => "UNREGISTERED", - power_up_uninitialized => "FALSE", - read_during_write_mode_mixed_ports => "DONT_CARE", - widthad_a => 14, - widthad_b => 14, - width_a => 8, - width_b => 8, - width_byteena_a => 1 - ) - PORT MAP ( - address_a => wraddress, - clock0 => clock, - data_a => data, - wren_a => wren, - address_b => rdaddress, - q_b => sub_wire0 - ); - - - -END SYN; - --- ============================================================ --- CNX file retrieval info --- ============================================================ --- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0" --- Retrieval info: PRIVATE: ADDRESSSTALL_B NUMERIC "0" --- Retrieval info: PRIVATE: BYTEENA_ACLR_A NUMERIC "0" --- Retrieval info: PRIVATE: BYTEENA_ACLR_B NUMERIC "0" --- Retrieval info: PRIVATE: BYTE_ENABLE_A NUMERIC "0" --- Retrieval info: PRIVATE: BYTE_ENABLE_B NUMERIC "0" --- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "8" --- Retrieval info: PRIVATE: BlankMemory NUMERIC "0" --- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0" --- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_B NUMERIC "0" --- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0" --- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_B NUMERIC "0" --- Retrieval info: PRIVATE: CLRdata NUMERIC "0" --- Retrieval info: PRIVATE: CLRq NUMERIC "0" --- Retrieval info: PRIVATE: CLRrdaddress NUMERIC "0" --- Retrieval info: PRIVATE: CLRrren NUMERIC "0" --- Retrieval info: PRIVATE: CLRwraddress NUMERIC "0" --- Retrieval info: PRIVATE: CLRwren NUMERIC "0" --- Retrieval info: PRIVATE: Clock NUMERIC "0" --- Retrieval info: PRIVATE: Clock_A NUMERIC "0" --- Retrieval info: PRIVATE: Clock_B NUMERIC "0" --- Retrieval info: PRIVATE: IMPLEMENT_IN_LES NUMERIC "0" --- Retrieval info: PRIVATE: INDATA_ACLR_B NUMERIC "0" --- Retrieval info: PRIVATE: INDATA_REG_B NUMERIC "0" --- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_B" --- Retrieval info: PRIVATE: INIT_TO_SIM_X NUMERIC "0" --- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III" --- Retrieval info: PRIVATE: JTAG_ENABLED NUMERIC "0" --- Retrieval info: PRIVATE: JTAG_ID STRING "NONE" --- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "0" --- Retrieval info: PRIVATE: MEMSIZE NUMERIC "131072" --- Retrieval info: PRIVATE: MEM_IN_BITS NUMERIC "0" --- Retrieval info: PRIVATE: MIFfilename STRING "std_C1541.mif" --- Retrieval info: PRIVATE: OPERATION_MODE NUMERIC "2" --- Retrieval info: PRIVATE: OUTDATA_ACLR_B NUMERIC "0" --- Retrieval info: PRIVATE: OUTDATA_REG_B NUMERIC "0" --- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "0" --- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_MIXED_PORTS NUMERIC "2" --- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_A NUMERIC "3" --- Retrieval info: PRIVATE: READ_DURING_WRITE_MODE_PORT_B NUMERIC "3" --- Retrieval info: PRIVATE: REGdata NUMERIC "1" --- Retrieval info: PRIVATE: REGq NUMERIC "1" --- Retrieval info: PRIVATE: REGrdaddress NUMERIC "1" --- Retrieval info: PRIVATE: REGrren NUMERIC "1" --- Retrieval info: PRIVATE: REGwraddress NUMERIC "1" --- Retrieval info: PRIVATE: REGwren NUMERIC "1" --- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" --- Retrieval info: PRIVATE: USE_DIFF_CLKEN NUMERIC "0" --- Retrieval info: PRIVATE: UseDPRAM NUMERIC "1" --- Retrieval info: PRIVATE: VarWidth NUMERIC "0" --- Retrieval info: PRIVATE: WIDTH_READ_A NUMERIC "8" --- Retrieval info: PRIVATE: WIDTH_READ_B NUMERIC "8" --- Retrieval info: PRIVATE: WIDTH_WRITE_A NUMERIC "8" --- Retrieval info: PRIVATE: WIDTH_WRITE_B NUMERIC "8" --- Retrieval info: PRIVATE: WRADDR_ACLR_B NUMERIC "0" --- Retrieval info: PRIVATE: WRADDR_REG_B NUMERIC "0" --- Retrieval info: PRIVATE: WRCTRL_ACLR_B NUMERIC "0" --- Retrieval info: PRIVATE: enable NUMERIC "0" --- Retrieval info: PRIVATE: rden NUMERIC "0" --- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all --- Retrieval info: CONSTANT: ADDRESS_ACLR_B STRING "NONE" --- Retrieval info: CONSTANT: ADDRESS_REG_B STRING "CLOCK0" --- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_A STRING "BYPASS" --- Retrieval info: CONSTANT: CLOCK_ENABLE_INPUT_B STRING "BYPASS" --- Retrieval info: CONSTANT: CLOCK_ENABLE_OUTPUT_B STRING "BYPASS" --- Retrieval info: CONSTANT: INIT_FILE STRING "std_C1541.mif" --- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" --- Retrieval info: CONSTANT: LPM_TYPE STRING "altsyncram" --- Retrieval info: CONSTANT: NUMWORDS_A NUMERIC "16384" --- Retrieval info: CONSTANT: NUMWORDS_B NUMERIC "16384" --- Retrieval info: CONSTANT: OPERATION_MODE STRING "DUAL_PORT" --- Retrieval info: CONSTANT: OUTDATA_ACLR_B STRING "NONE" --- Retrieval info: CONSTANT: OUTDATA_REG_B STRING "UNREGISTERED" --- Retrieval info: CONSTANT: POWER_UP_UNINITIALIZED STRING "FALSE" --- Retrieval info: CONSTANT: READ_DURING_WRITE_MODE_MIXED_PORTS STRING "DONT_CARE" --- Retrieval info: CONSTANT: WIDTHAD_A NUMERIC "14" --- Retrieval info: CONSTANT: WIDTHAD_B NUMERIC "14" --- Retrieval info: CONSTANT: WIDTH_A NUMERIC "8" --- Retrieval info: CONSTANT: WIDTH_B NUMERIC "8" --- Retrieval info: CONSTANT: WIDTH_BYTEENA_A NUMERIC "1" --- Retrieval info: USED_PORT: clock 0 0 0 0 INPUT VCC "clock" --- Retrieval info: USED_PORT: data 0 0 8 0 INPUT NODEFVAL "data[7..0]" --- Retrieval info: USED_PORT: q 0 0 8 0 OUTPUT NODEFVAL "q[7..0]" --- Retrieval info: USED_PORT: rdaddress 0 0 14 0 INPUT NODEFVAL "rdaddress[13..0]" --- Retrieval info: USED_PORT: wraddress 0 0 14 0 INPUT NODEFVAL "wraddress[13..0]" --- Retrieval info: USED_PORT: wren 0 0 0 0 INPUT GND "wren" --- Retrieval info: CONNECT: @address_a 0 0 14 0 wraddress 0 0 14 0 --- Retrieval info: CONNECT: @address_b 0 0 14 0 rdaddress 0 0 14 0 --- Retrieval info: CONNECT: @clock0 0 0 0 0 clock 0 0 0 0 --- Retrieval info: CONNECT: @data_a 0 0 8 0 data 0 0 8 0 --- Retrieval info: CONNECT: @wren_a 0 0 0 0 wren 0 0 0 0 --- Retrieval info: CONNECT: q 0 0 8 0 @q_b 0 0 8 0 --- Retrieval info: GEN_FILE: TYPE_NORMAL rom_C1541.vhd TRUE --- Retrieval info: GEN_FILE: TYPE_NORMAL rom_C1541.inc FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL rom_C1541.cmp FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL rom_C1541.bsf FALSE --- Retrieval info: GEN_FILE: TYPE_NORMAL rom_C1541_inst.vhd FALSE --- Retrieval info: LIB_FILE: altera_mf