diff --git a/cores/c64/rtl/fpga64_sid_iec.vhd b/cores/c64/rtl/fpga64_sid_iec.vhd
index 645c0dc..b74ffa7 100644
--- a/cores/c64/rtl/fpga64_sid_iec.vhd
+++ b/cores/c64/rtl/fpga64_sid_iec.vhd
@@ -100,7 +100,7 @@ entity fpga64_sid_iec is
 		audio_data_l: out std_logic_vector(17 downto 0);
 		audio_data_r: out std_logic_vector(17 downto 0);
 		extfilter_en: in  std_logic;
-		sid_mode    : in  std_logic_vector(1 downto 0);
+		sid_mode    : in  std_logic_vector(2 downto 0);
 
 		-- IEC
 		iec_data_o	: out std_logic;
@@ -189,7 +189,8 @@ architecture rtl of fpga64_sid_iec is
 	-- SID signals
 	signal sid_do : std_logic_vector(7 downto 0);
 	signal sid_do6581 : std_logic_vector(7 downto 0);
-	signal sid_do8580 : std_logic_vector(7 downto 0);
+	signal sid_do8580_l : std_logic_vector(7 downto 0);
+	signal sid_do8580_r : std_logic_vector(7 downto 0);
 	signal second_sid_en: std_logic;
 
 	-- CIA signals
@@ -268,7 +269,8 @@ architecture rtl of fpga64_sid_iec is
 	signal voice_r      : signed(17 downto 0);
 	signal pot_x        : std_logic_vector(7 downto 0);
 	signal pot_y        : std_logic_vector(7 downto 0);
-	signal audio_8580 : std_logic_vector(15 downto 0);
+	signal audio_8580_l : std_logic_vector(15 downto 0);
+	signal audio_8580_r : std_logic_vector(15 downto 0);
 
 	component sid8580
 		port (
@@ -575,11 +577,14 @@ div1m: process(clk32)				-- this process devides 32 MHz to 1MHz (for the SID)
 	end process;
 
 	audio_data_l <= std_logic_vector(voice_l) when sid_mode(1)='0' else
-	                (audio_8580 & "00");
-	audio_data_r <= std_logic_vector(voice_l) when sid_mode="00" else
-	                std_logic_vector(voice_r) when sid_mode="01" else
-	                (audio_8580 & "00");
-	sid_do <= sid_do6581 when sid_mode(1)='0' else sid_do8580;
+	                (audio_8580_l & "00");
+	audio_data_r <= std_logic_vector(voice_l) when sid_mode="000" else
+	                std_logic_vector(voice_r) when sid_mode="001" else
+	                (audio_8580_r & "00")     when sid_mode="011" else
+					(audio_8580_l & "00");
+	sid_do <= sid_do6581 when sid_mode(1)='0' else
+	          sid_do8580_l when second_sid_en='0' else
+			  sid_do8580_r;
 
 	pot_x <= X"FF" when ((cia1_pao(7) and JoyA(5)) or (cia1_pao(6) and JoyB(5))) = '0' else X"00";
 	pot_y <= X"FF" when ((cia1_pao(7) and JoyA(6)) or (cia1_pao(6) and JoyB(6))) = '0' else X"00";
@@ -614,19 +619,35 @@ div1m: process(clk32)				-- this process devides 32 MHz to 1MHz (for the SID)
 		sample_right => voice_r
 	);
 
-	sid_8580 : sid8580
+	sid_8580_l : sid8580
 	port map (
 		reset => reset,
 		clk32 => clk32,
 		clk_1MHz => clk_1MHz(31),
-		cs => cs_sid,
+		cs => cs_sid and not second_sid_en,
 		we => pulseWrRam and phi0_cpu,
 		addr => std_logic_vector(cpuAddr(4 downto 0)),
 		data_in => std_logic_vector(cpuDo),
-		data_out => sid_do8580,
+		data_out => sid_do8580_l,
 		pot_x => pot_x,
 		pot_y => pot_y,
-		audio_data => audio_8580,
+		audio_data => audio_8580_l,
+		extfilter_en => extfilter_en
+	);
+
+	sid_8580_r : sid8580
+	port map (
+		reset => reset,
+		clk32 => clk32,
+		clk_1MHz => clk_1MHz(31),
+		cs => cs_sid and second_sid_en,
+		we => pulseWrRam and phi0_cpu,
+		addr => std_logic_vector(cpuAddr(4 downto 0)),
+		data_in => std_logic_vector(cpuDo),
+		data_out => sid_do8580_r,
+		pot_x => pot_x,
+		pot_y => pot_y,
+		audio_data => audio_8580_r,
 		extfilter_en => extfilter_en
 );
 
diff --git a/cores/c64/rtl/mist/c64_mist.vhd b/cores/c64/rtl/mist/c64_mist.vhd
index 7093efa..5fbb291 100644
--- a/cores/c64/rtl/mist/c64_mist.vhd
+++ b/cores/c64/rtl/mist/c64_mist.vhd
@@ -128,10 +128,10 @@ constant CONF_STR : string :=
 	"F,CRT,Load Cartridge;" &--3
 --	"F,TAP,Load File;"&--4
 --	"F,T64,Load File;"&--5
-	"OF,Disk Write,Enable,Disable;"&
+	"OG,Disk Write,Enable,Disable;"&
 	"O2,Video standard,PAL,NTSC;"&
 	"O8A,Scandoubler Fx,None,HQ2x-320,HQ2x-160,CRT 25%,CRT 50%;"&
-	"ODE,SID,6581 Mono,6581 Stereo,8580;"&
+	"ODF,SID,6581 Mono,6581 Stereo,8580 Mono,8580 Stereo,Pseudo Stereo;"&
 	"O3,Joysticks,normal,swapped;"&
 	"O6,Audio filter,On,Off;"&
 	"O4,CIA Model,6256,8521;"&
@@ -838,7 +838,7 @@ begin
 		audio_data_l => audio_data_l,
 		audio_data_r => audio_data_r,
 		extfilter_en => not status(6),
-		sid_mode => status(14 downto 13),
+		sid_mode => status(15 downto 13),
 		iec_data_o => c64_iec_data_o,
 		iec_atn_o  => c64_iec_atn_o,
 		iec_clk_o  => c64_iec_clk_o,
@@ -854,7 +854,7 @@ begin
 		reset_key => reset_key
 	);
 
-	disk_readonly <= status(15);
+	disk_readonly <= status(16);
 
     c64_iec_data_i <= c1541_iec_data_o;
     c64_iec_clk_i <= c1541_iec_clk_o;