From 54d155bcf0b55ca0b38b625b85e4bfdfb88ec4d6 Mon Sep 17 00:00:00 2001
From: Gyorgy Szombathelyi <gyurco@freemail.hu>
Date: Sun, 20 Oct 2019 13:35:53 +0200
Subject: [PATCH] Archie: use built-in SDRAM burst feature

---
 cores/archie/rtl/sdram/sdram_defines.v |  2 +-
 cores/archie/rtl/sdram/sdram_top.v     | 34 ++++----------------------
 2 files changed, 6 insertions(+), 30 deletions(-)

diff --git a/cores/archie/rtl/sdram/sdram_defines.v b/cores/archie/rtl/sdram/sdram_defines.v
index 58bfc2e..c133eae 100644
--- a/cores/archie/rtl/sdram/sdram_defines.v
+++ b/cores/archie/rtl/sdram/sdram_defines.v
@@ -27,7 +27,7 @@
 */
 
 localparam RASCAS_DELAY   = 3'd3;   // tRCD=20ns -> 3 cycles@128MHz
-localparam BURST_LENGTH   = 3'b000; // 000=1, 001=2, 010=4, 011=8, 111 = continuous.
+localparam BURST_LENGTH   = 3'b010; // 000=1, 001=2, 010=4, 011=8, 111 = continuous.
 localparam ACCESS_TYPE    = 1'b0;   // 0=sequential, 1=interleaved
 localparam CAS_LATENCY    = 3'd3;   // 2/3 allowed
 localparam OP_MODE        = 2'b00;  // only 00 (standard operation) allowed
diff --git a/cores/archie/rtl/sdram/sdram_top.v b/cores/archie/rtl/sdram/sdram_top.v
index d8c55a5..39f4ca7 100644
--- a/cores/archie/rtl/sdram/sdram_top.v
+++ b/cores/archie/rtl/sdram/sdram_top.v
@@ -244,12 +244,10 @@ always @(posedge sd_clk) begin
 					// now we access the second part of the 32 bit location.
 					sd_addr <= { 4'b0000, wb_adr[23], wb_adr[8:2], 1'b1 };  // no auto precharge
 					sd_dqm		<= ~wb_sel[3:2];
-					if (sd_reading) begin 
-						sd_cmd <= CMD_READ;
-						if (burst_mode & can_burst) begin 
-							sd_burst <= 1'b1; 
-						end
-					end else if (sd_writing) begin
+
+					if (sd_reading & burst_mode & can_burst) sd_burst <= 1'b1; 
+
+					if (sd_writing) begin
 						sd_cmd		<= CMD_WRITE;
 						sd_done		<= ~sd_done;
 `ifdef VERILATOR
@@ -259,28 +257,6 @@ always @(posedge sd_clk) begin
 `endif
 					end 
 				end
-				
-				CYCLE_CAS2: begin 
-					if (sd_burst) begin 
-						// always, always read on a 32bit boundary and completely ignore the lsb of wb_adr.
-						sd_addr <= { 4'b0000, wb_adr[23], wb_adr[8:3], 2'b10 };  // no auto precharge
-						sd_dqm		<= ~wb_sel[1:0];
-						if (sd_reading) begin 
-							sd_cmd <= CMD_READ;
-						end  
-					end
-				end
-
-				CYCLE_CAS3: begin 
-					if (sd_burst) begin 
-						// always, always read on a 32bit boundary and completely ignore the lsb of wb_adr.
-						sd_addr	<= { 4'b0000, wb_adr[23], wb_adr[8:3], 2'b11 };  // no auto precharge
-						sd_dqm	<= ~wb_sel[3:2];
-						if (sd_reading) begin 
-							sd_cmd <= CMD_READ;
-						end
-					end
-				end
 
 				CYCLE_READ0: begin 
 					if (sd_reading) begin 
@@ -316,7 +292,7 @@ always @(posedge sd_clk) begin
 				end
 				endcase
 			end else begin
-				sd_cycle 	<= 4'd0;
+				sd_cycle <= 4'd0;
 				sd_burst <= 1'b0;
 			end
 		end