From 64b44825bf4cacb1b6aea693a6fc6dba2b9f1f3e Mon Sep 17 00:00:00 2001
From: harbaum <till.harbaum@1und1.de>
Date: Thu, 30 Aug 2018 10:18:40 +0200
Subject: [PATCH] Reduced 1541 clock slightly to cope with fast loaders

---
 cores/c16/c1541/c1541_logic.vhd | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cores/c16/c1541/c1541_logic.vhd b/cores/c16/c1541/c1541_logic.vhd
index 7bb8743..37caeea 100644
--- a/cores/c16/c1541/c1541_logic.vhd
+++ b/cores/c16/c1541/c1541_logic.vhd
@@ -123,7 +123,7 @@ begin
         clk_1M_pulse <= '1';
       end if;
       -- if count = "000100000" then -- DAR divide by 33 (otherwise real c64 miss EOI acknowledge)
-      if count = "000011111" then -- TH divide by 32
+      if count = "000011110" then -- TH divide by 31
       count := (others => '0');   -- DAR	
 			else                        -- DAR
       count := std_logic_vector(unsigned(count) + 1);