diff --git a/cores/mist/YM2149_volmix.vhd b/cores/mist/YM2149_volmix.vhd
index 7afcfb1..f5d1e79 100644
--- a/cores/mist/YM2149_volmix.vhd
+++ b/cores/mist/YM2149_volmix.vhd
@@ -53,6 +53,8 @@
 -- NOTE, this component uses a volume table for accurate mixing of the three analogue channels,
 -- where the outputs are wired together - like in the Atari ST
 
+-- Modified for stereo sound by Juan Carlos González Amestoy.
+
 library ieee;
   use ieee.std_logic_1164.all;
   use ieee.std_logic_arith.all;
@@ -71,8 +73,10 @@ entity YM2149 is
   I_BC2               : in  std_logic;
   I_BC1               : in  std_logic;
   I_SEL_L             : in  std_logic;
+  stereo : in std_logic;
 
-  O_AUDIO             : out std_logic_vector(7 downto 0);
+  O_AUDIO_L : out std_logic_vector(7 downto 0);
+  O_AUDIO_R : out std_logic_vector(7 downto 0);
   -- port a
   I_IOA               : in  std_logic_vector(7 downto 0);
   O_IOA               : out std_logic_vector(7 downto 0);
@@ -130,8 +134,10 @@ architecture RTL of YM2149 is
   signal env_inc              : std_logic;
   signal env_vol              : std_logic_vector(4 downto 0);
 
-  signal vol_table_in         : std_logic_vector(11 downto 0);
-  signal vol_table_out        : std_logic_vector(9 downto 0);
+  signal vol_table_in_l         : std_logic_vector(11 downto 0);
+  signal vol_table_in_r         : std_logic_vector(11 downto 0);
+  signal vol_table_out_l        : std_logic_vector(9 downto 0);
+  signal vol_table_out_r        : std_logic_vector(9 downto 0);
 
 begin
   -- cpu i/f
@@ -516,41 +522,71 @@ begin
       chan_mixed(1) := (reg(7)(1) or tone_gen_op(2)) and (reg(7)(4) or noise_gen_op);
       chan_mixed(2) := (reg(7)(2) or tone_gen_op(3)) and (reg(7)(5) or noise_gen_op);
 
-      vol_table_in <= x"000";
+      vol_table_in_l <= x"000";
+      vol_table_in_r <= x"000";
 
       if (chan_mixed(0) = '1') then
-        if (reg(8)(4) = '0') then
-          vol_table_in(3 downto 0) <= reg(8)(3 downto 0);
+        if(stereo='1') then
+          if (reg(8)(4) = '0') then
+            vol_table_in_l(3 downto 0) <= reg(8)(3 downto 0);
+          else
+            vol_table_in_l(3 downto 0) <= env_vol(4 downto 1);
+          end if;
         else
-          vol_table_in(3 downto 0) <= env_vol(4 downto 1);
+          if (reg(8)(4) = '0') then
+            vol_table_in_l(3 downto 0) <= reg(8)(3 downto 0);
+            vol_table_in_r(3 downto 0) <= reg(8)(3 downto 0);
+          else
+            vol_table_in_l(3 downto 0) <= env_vol(4 downto 1);
+            vol_table_in_r(3 downto 0) <= env_vol(4 downto 1);
+          end if;
         end if;
       end if;
 
       if (chan_mixed(1) = '1') then
         if (reg(9)(4) = '0') then
-          vol_table_in(7 downto 4) <= reg(9)(3 downto 0);
+          vol_table_in_l(7 downto 4) <= reg(9)(3 downto 0);
+          vol_table_in_r(7 downto 4) <= reg(9)(3 downto 0);
         else
-          vol_table_in(7 downto 4) <= env_vol(4 downto 1);
+          vol_table_in_l(7 downto 4) <= env_vol(4 downto 1);
+          vol_table_in_r(7 downto 4) <= env_vol(4 downto 1);
         end if;
       end if;
 
       if (chan_mixed(2) = '1') then
-        if (reg(10)(4) = '0') then
-          vol_table_in(11 downto 8) <= reg(10)(3 downto 0);
+        if(stereo='1') then
+          if (reg(10)(4) = '0') then
+            vol_table_in_r(11 downto 8) <= reg(10)(3 downto 0);
+          else
+            vol_table_in_r(11 downto 8) <= env_vol(4 downto 1);
+          end if;
         else
-          vol_table_in(11 downto 8) <= env_vol(4 downto 1);
+          if (reg(10)(4) = '0') then
+            vol_table_in_l(11 downto 8) <= reg(10)(3 downto 0);
+            vol_table_in_r(11 downto 8) <= reg(10)(3 downto 0);
+          else
+            vol_table_in_l(11 downto 8) <= env_vol(4 downto 1);
+            vol_table_in_r(11 downto 8) <= reg(10)(3 downto 0);
+          end if;
         end if;
       end if;
     end if;
   end process;
 
-  u_vol_table            : vol_table
+  u_vol_table_l : vol_table
     port map (
       CLK         => clk,
-      ADDR        => vol_table_in,
-      DATA        => vol_table_out
+      ADDR        => vol_table_in_l,
+      DATA        => vol_table_out_l
       );
 
+  u_vol_table_r : vol_table
+    port map(
+      CLK=>clk,
+      ADDR=>vol_table_in_r,
+      DATA=>vol_table_out_r
+    );
+
   p_op_mixer             : process
     variable chan_mixed : std_logic;
     variable chan_amp : std_logic_vector(4 downto 0);
@@ -558,9 +594,11 @@ begin
     wait until rising_edge(CLK);
 
     if (RESET_L = '0') then
-      O_AUDIO(7 downto 0) <= "00000000";
+      O_AUDIO_L(7 downto 0) <= "00000000";
+      O_AUDIO_R(7 downto 0) <= "00000000";
     else
-      O_AUDIO(7 downto 0) <= vol_table_out(9 downto 2);
+      O_AUDIO_L(7 downto 0) <= vol_table_out_l(9 downto 2);
+      O_AUDIO_R(7 downto 0) <= vol_table_out_r(9 downto 2);
     end if;
   end process;
 
diff --git a/cores/mist/mist.qsf b/cores/mist/mist.qsf
index cc8fbf7..257f6ac 100644
--- a/cores/mist/mist.qsf
+++ b/cores/mist/mist.qsf
@@ -1,701 +1,705 @@
-# Copyright (C) 1991-2007 Altera Corporation
-# Your use of Altera Corporation's design tools, logic functions 
-# and other software and tools, and its AMPP partner logic 
-# functions, and any output files from any of the foregoing 
-# (including device programming or simulation files), and any 
-# associated documentation or information are expressly subject 
-# to the terms and conditions of the Altera Program License 
-# Subscription Agreement, Altera MegaCore Function License 
-# Agreement, or other applicable license agreement, including, 
-# without limitation, that your use is for the sole purpose of 
-# programming logic devices manufactured by Altera and sold by 
-# Altera or its authorized distributors.  Please refer to the 
-# applicable agreement for further details.
-
-
-# If this file doesn't exist, and for assignments not listed, see file
-#		assignment_defaults.qdf
-
-# Altera recommends that you do not modify this file. This
-# file is updated automatically by the Quartus II software
-# and any changes you make may be lost or overwritten.
-
-
-set_global_assignment -name FAMILY "Cyclone III"
-set_global_assignment -name DEVICE EP3C25E144C8
-set_global_assignment -name TOP_LEVEL_ENTITY mist_top
-set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
-set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29  OCTOBER 30, 2007"
-set_global_assignment -name LAST_QUARTUS_VERSION 12.1
-set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
-set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
-set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
-set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
-set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
-set_global_assignment -name FITTER_EFFORT "AUTO FIT"
-set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
-set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
-set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
-set_global_assignment -name GENERATE_RBF_FILE ON
-set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
-set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
-
-set_location_assignment PIN_7 -to LED
-set_location_assignment PIN_22 -to CLOCK_50[0]
-set_location_assignment PIN_23 -to CLOCK_50[1]
-set_location_assignment PIN_128 -to CLOCK_32[0]
-set_location_assignment PIN_129 -to CLOCK_32[1]
-set_location_assignment PIN_54 -to CLOCK_27[0]
-set_location_assignment PIN_55 -to CLOCK_27[1]
-set_location_assignment PIN_144 -to VGA_R[5]
-set_location_assignment PIN_143 -to VGA_R[4]
-set_location_assignment PIN_142 -to VGA_R[3]
-set_location_assignment PIN_141 -to VGA_R[2]
-set_location_assignment PIN_137 -to VGA_R[1]
-set_location_assignment PIN_135 -to VGA_R[0]
-set_location_assignment PIN_133 -to VGA_B[5]
-set_location_assignment PIN_132 -to VGA_B[4]
-set_location_assignment PIN_125 -to VGA_B[3]
-set_location_assignment PIN_121 -to VGA_B[2]
-set_location_assignment PIN_120 -to VGA_B[1]
-set_location_assignment PIN_115 -to VGA_B[0]
-set_location_assignment PIN_114 -to VGA_G[5]
-set_location_assignment PIN_113 -to VGA_G[4]
-set_location_assignment PIN_112 -to VGA_G[3]
-set_location_assignment PIN_111 -to VGA_G[2]
-set_location_assignment PIN_110 -to VGA_G[1]
-set_location_assignment PIN_106 -to VGA_G[0]
-set_location_assignment PIN_136 -to VGA_VS
-set_location_assignment PIN_119 -to VGA_HS
-set_location_assignment PIN_65 -to AUDIO_L
-set_location_assignment PIN_80 -to AUDIO_R
-set_location_assignment PIN_46 -to UART_TX
-set_location_assignment PIN_31 -to UART_RX
-set_location_assignment PIN_105 -to SPI_DO
-set_location_assignment PIN_88 -to SPI_DI
-set_location_assignment PIN_126 -to SPI_SCK
-set_location_assignment PIN_127 -to SPI_SS2
-set_location_assignment PIN_91 -to SPI_SS3
-set_location_assignment PIN_90 -to SPI_SS4
-set_location_assignment PIN_13 -to CONF_DATA0
-
-set_location_assignment PIN_49 -to SDRAM_A[0]
-set_location_assignment PIN_44 -to SDRAM_A[1]
-set_location_assignment PIN_42 -to SDRAM_A[2]
-set_location_assignment PIN_39 -to SDRAM_A[3]
-set_location_assignment PIN_4 -to SDRAM_A[4]
-set_location_assignment PIN_6 -to SDRAM_A[5]
-set_location_assignment PIN_8 -to SDRAM_A[6]
-set_location_assignment PIN_10 -to SDRAM_A[7]
-set_location_assignment PIN_11 -to SDRAM_A[8]
-set_location_assignment PIN_28 -to SDRAM_A[9]
-set_location_assignment PIN_50 -to SDRAM_A[10]
-set_location_assignment PIN_30 -to SDRAM_A[11]
-set_location_assignment PIN_32 -to SDRAM_A[12]
-set_location_assignment PIN_83 -to SDRAM_DQ[0]
-set_location_assignment PIN_79 -to SDRAM_DQ[1]
-set_location_assignment PIN_77 -to SDRAM_DQ[2]
-set_location_assignment PIN_76 -to SDRAM_DQ[3]
-set_location_assignment PIN_72 -to SDRAM_DQ[4]
-set_location_assignment PIN_71 -to SDRAM_DQ[5]
-set_location_assignment PIN_69 -to SDRAM_DQ[6]
-set_location_assignment PIN_68 -to SDRAM_DQ[7]
-set_location_assignment PIN_86 -to SDRAM_DQ[8]
-set_location_assignment PIN_87 -to SDRAM_DQ[9]
-set_location_assignment PIN_98 -to SDRAM_DQ[10]
-set_location_assignment PIN_99 -to SDRAM_DQ[11]
-set_location_assignment PIN_100 -to SDRAM_DQ[12]
-set_location_assignment PIN_101 -to SDRAM_DQ[13]
-set_location_assignment PIN_103 -to SDRAM_DQ[14]
-set_location_assignment PIN_104 -to SDRAM_DQ[15]
-set_location_assignment PIN_58 -to SDRAM_BA[0]
-set_location_assignment PIN_51 -to SDRAM_BA[1]
-set_location_assignment PIN_85 -to SDRAM_DQMH
-set_location_assignment PIN_67 -to SDRAM_DQML
-set_location_assignment PIN_60 -to SDRAM_nRAS
-set_location_assignment PIN_64 -to SDRAM_nCAS
-set_location_assignment PIN_66 -to SDRAM_nWE
-set_location_assignment PIN_59 -to SDRAM_nCS
-set_location_assignment PIN_33 -to SDRAM_CKE
-set_location_assignment PIN_43 -to SDRAM_CLK
-
-set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
-set_global_assignment -name SMART_RECOMPILE ON
-set_global_assignment -name ENABLE_SIGNALTAP ON
-set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
-set_global_assignment -name FMAX_REQUIREMENT "114 MHz"
-set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING OFF
-set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
-set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
-set_global_assignment -name USE_CONFIGURATION_DEVICE ON
-set_global_assignment -name TPD_REQUIREMENT "2 ns"
-set_global_assignment -name TSU_REQUIREMENT "2 ns"
-set_global_assignment -name TCO_REQUIREMENT "2 ns"
-set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
-set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
-set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION OFF
-set_global_assignment -name AUTO_RAM_RECOGNITION ON
-set_global_assignment -name AUTO_ROM_RECOGNITION ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
-set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
-set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
-set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
-set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
-
-set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
-set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA OFF
-set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
-
-set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
-set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
-set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0
-set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY OFF
-
-set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
-set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
-set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[15]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[2]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[3]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[4]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[5]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[6]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[7]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[8]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[9]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[10]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[11]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[12]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
-set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
-
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[15]
-
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[0]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[1]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[2]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[3]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[4]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[5]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[6]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[7]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[8]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[9]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[10]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[11]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[12]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[13]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14]
-set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15]
-
-set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_8
-set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_128
-set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SDRAM_CLK
-set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=1024" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id auto_signaltap_0
-set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SPI_SCK
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[6]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[7]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[8]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[9]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[10]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[11]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[12]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[6]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[7]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[8]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[9]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[10]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[11]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[12]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[13]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[14]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[15]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[0]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQML
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQMH
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nRAS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCAS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nWE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[0]
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[0]
-
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[5]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[4]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1]
-set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0]
-
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
-set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_32
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "clock:clock|altpll:altpll_component|clk[1]" -section_id auto_signaltap_0
-
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "TG68K:tg68k|IPL[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "TG68K:tg68k|IPL[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "TG68K:tg68k|IPL[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[20]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[21]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[22]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[23]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[24]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[25]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[26]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[27]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[28]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[29]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[30]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[31]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "TG68K:tg68k|IPL[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "TG68K:tg68k|IPL[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "TG68K:tg68k|IPL[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[20]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[21]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[22]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[23]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[24]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[25]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[26]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[27]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[28]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[29]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[30]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[31]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[1]" -section_id auto_signaltap_0
-set_global_assignment -name VERILOG_FILE mfp_timer.v
-set_global_assignment -name VHDL_FILE vol_table_array.vhd
-set_global_assignment -name VHDL_FILE YM2149_volmix.vhd
-set_global_assignment -name VERILOG_FILE acia.v
-set_global_assignment -name VERILOG_FILE blitter.v
-set_global_assignment -name VHDL_FILE TG68K.vhd
-set_global_assignment -name VHDL_FILE TG68K_ALU.vhd
-set_global_assignment -name VHDL_FILE TG68K_Pack.vhd
-set_global_assignment -name VHDL_FILE TG68KdotC_Kernel.vhd
-set_global_assignment -name SDC_FILE mist.sdc
-set_global_assignment -name VHDL_FILE sdram.vhd
-set_global_assignment -name VERILOG_FILE clock.v
-set_global_assignment -name VERILOG_FILE mist_top.v
-set_global_assignment -name VERILOG_FILE user_io.v
-set_global_assignment -name VERILOG_FILE video.v
-set_global_assignment -name VERILOG_FILE data_io.v
-set_global_assignment -name VERILOG_FILE mfp.v
-set_global_assignment -name VERILOG_FILE dma.v
-set_global_assignment -name VERILOG_FILE sigma_delta_dac.v
-set_global_assignment -name VERILOG_FILE mmu.v
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[75] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[76] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[77] -to "TG68K:tg68k|addr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[78] -to "TG68K:tg68k|addr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[79] -to "TG68K:tg68k|addr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[80] -to "TG68K:tg68k|addr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[81] -to "TG68K:tg68k|addr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[82] -to "TG68K:tg68k|addr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[83] -to "TG68K:tg68k|addr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[84] -to "TG68K:tg68k|addr[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[85] -to "TG68K:tg68k|addr[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[86] -to "TG68K:tg68k|addr[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[87] -to "TG68K:tg68k|addr[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[88] -to "TG68K:tg68k|addr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[89] -to "TG68K:tg68k|addr[20]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[90] -to "TG68K:tg68k|addr[21]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[91] -to "TG68K:tg68k|addr[22]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[92] -to "TG68K:tg68k|addr[23]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "TG68K:tg68k|addr[24]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "TG68K:tg68k|addr[25]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "TG68K:tg68k|addr[26]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "TG68K:tg68k|addr[27]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "TG68K:tg68k|addr[28]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "TG68K:tg68k|addr[29]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "TG68K:tg68k|addr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "TG68K:tg68k|addr[30]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "TG68K:tg68k|addr[31]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "TG68K:tg68k|addr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "TG68K:tg68k|addr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "TG68K:tg68k|addr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "TG68K:tg68k|addr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "TG68K:tg68k|addr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "TG68K:tg68k|addr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "TG68K:tg68k|addr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "TG68K:tg68k|as" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "TG68K:tg68k|data_read[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "TG68K:tg68k|data_read[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "TG68K:tg68k|data_read[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "TG68K:tg68k|data_read[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "TG68K:tg68k|data_read[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "TG68K:tg68k|data_read[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "TG68K:tg68k|data_read[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "TG68K:tg68k|data_read[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "TG68K:tg68k|data_read[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "TG68K:tg68k|data_read[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "TG68K:tg68k|data_read[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "TG68K:tg68k|data_read[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "TG68K:tg68k|data_read[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "TG68K:tg68k|data_read[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "TG68K:tg68k|data_read[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "TG68K:tg68k|data_read[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "TG68K:tg68k|dtack" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "TG68K:tg68k|lds" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "TG68K:tg68k|rw" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "TG68K:tg68k|uds" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to VGA_HS -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "data_io:data_io|bus_cycle[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "data_io:data_io|bus_cycle[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "mfp:mfp|clk" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "mfp:mfp|dtack" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "mfp:mfp|ipr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[136] -to "mfp:mfp|ipr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[137] -to "mfp:mfp|ipr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[138] -to "mfp:mfp|ipr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[139] -to "mfp:mfp|ipr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[140] -to "mfp:mfp|ipr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[141] -to "mfp:mfp|ipr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[142] -to "mfp:mfp|ipr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[143] -to "mfp:mfp|ipr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[144] -to "mfp:mfp|ipr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[145] -to "mfp:mfp|ipr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[146] -to "mfp:mfp|ipr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[147] -to "mfp:mfp|ipr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[148] -to "mfp:mfp|ipr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[149] -to "mfp:mfp|ipr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[150] -to "mfp:mfp|ipr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[151] -to "mfp:mfp|isr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[152] -to "mfp:mfp|isr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[153] -to "mfp:mfp|isr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[154] -to "mfp:mfp|isr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[155] -to "mfp:mfp|isr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[156] -to "mfp:mfp|isr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[157] -to "mfp:mfp|isr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[158] -to "mfp:mfp|isr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[159] -to "mfp:mfp|isr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[160] -to "mfp:mfp|isr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[161] -to "mfp:mfp|isr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[162] -to "mfp:mfp|isr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[163] -to "mfp:mfp|isr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[164] -to "mfp:mfp|isr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[165] -to "mfp:mfp|isr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[166] -to "mfp:mfp|isr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[167] -to "mfp:mfp|sel" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[168] -to "mmu:mmu|reset" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[169] -to "sdram:sdram|chipCycle" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[170] -to tg68_berr -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[171] -to "TG68K:tg68k|berr_in" -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[172] -to hsD -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[173] -to hsD2 -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[174] -to hsI -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "TG68K:tg68k|addr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "TG68K:tg68k|addr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "TG68K:tg68k|addr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "TG68K:tg68k|addr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "TG68K:tg68k|addr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "TG68K:tg68k|addr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "TG68K:tg68k|addr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "TG68K:tg68k|addr[16]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "TG68K:tg68k|addr[17]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "TG68K:tg68k|addr[18]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "TG68K:tg68k|addr[19]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "TG68K:tg68k|addr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "TG68K:tg68k|addr[20]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "TG68K:tg68k|addr[21]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "TG68K:tg68k|addr[22]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "TG68K:tg68k|addr[23]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "TG68K:tg68k|addr[24]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "TG68K:tg68k|addr[25]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "TG68K:tg68k|addr[26]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "TG68K:tg68k|addr[27]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "TG68K:tg68k|addr[28]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "TG68K:tg68k|addr[29]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "TG68K:tg68k|addr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "TG68K:tg68k|addr[30]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "TG68K:tg68k|addr[31]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "TG68K:tg68k|addr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "TG68K:tg68k|addr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "TG68K:tg68k|addr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "TG68K:tg68k|addr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "TG68K:tg68k|addr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "TG68K:tg68k|addr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "TG68K:tg68k|addr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "TG68K:tg68k|as" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "TG68K:tg68k|data_read[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "TG68K:tg68k|data_read[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "TG68K:tg68k|data_read[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "TG68K:tg68k|data_read[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "TG68K:tg68k|data_read[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "TG68K:tg68k|data_read[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "TG68K:tg68k|data_read[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "TG68K:tg68k|data_read[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "TG68K:tg68k|data_read[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "TG68K:tg68k|data_read[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "TG68K:tg68k|data_read[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "TG68K:tg68k|data_read[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "TG68K:tg68k|data_read[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "TG68K:tg68k|data_read[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "TG68K:tg68k|data_read[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "TG68K:tg68k|data_read[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "TG68K:tg68k|dtack" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "TG68K:tg68k|lds" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "TG68K:tg68k|rw" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "TG68K:tg68k|uds" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to VGA_HS -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "data_io:data_io|bus_cycle[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "data_io:data_io|bus_cycle[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "mfp:mfp|clk" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "mfp:mfp|dtack" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "mfp:mfp|ipr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "mfp:mfp|ipr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "mfp:mfp|ipr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "mfp:mfp|ipr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "mfp:mfp|ipr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "mfp:mfp|ipr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "mfp:mfp|ipr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "mfp:mfp|ipr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "mfp:mfp|ipr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "mfp:mfp|ipr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "mfp:mfp|ipr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "mfp:mfp|ipr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "mfp:mfp|ipr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "mfp:mfp|ipr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "mfp:mfp|ipr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "mfp:mfp|ipr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "mfp:mfp|isr[0]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "mfp:mfp|isr[10]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "mfp:mfp|isr[11]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "mfp:mfp|isr[12]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "mfp:mfp|isr[13]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "mfp:mfp|isr[14]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "mfp:mfp|isr[15]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "mfp:mfp|isr[1]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "mfp:mfp|isr[2]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "mfp:mfp|isr[3]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "mfp:mfp|isr[4]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "mfp:mfp|isr[5]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "mfp:mfp|isr[6]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "mfp:mfp|isr[7]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "mfp:mfp|isr[8]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "mfp:mfp|isr[9]" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "mfp:mfp|sel" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "mmu:mmu|reset" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "sdram:sdram|chipCycle" -section_id auto_signaltap_0
-set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to tg68_berr -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "TG68K:tg68k|berr_in" -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to hsD -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to hsD2 -section_id auto_signaltap_0
-set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to hsI -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=175" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=175" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=549" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=471" -section_id auto_signaltap_0
-set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=22929" -section_id auto_signaltap_0
+
+# Copyright (C) 1991-2007 Altera Corporation
+# Your use of Altera Corporation's design tools, logic functions 
+# and other software and tools, and its AMPP partner logic 
+# functions, and any output files from any of the foregoing 
+# (including device programming or simulation files), and any 
+# associated documentation or information are expressly subject 
+# to the terms and conditions of the Altera Program License 
+# Subscription Agreement, Altera MegaCore Function License 
+# Agreement, or other applicable license agreement, including, 
+# without limitation, that your use is for the sole purpose of 
+# programming logic devices manufactured by Altera and sold by 
+# Altera or its authorized distributors.  Please refer to the 
+# applicable agreement for further details.
+
+
+# If this file doesn't exist, and for assignments not listed, see file
+#		assignment_defaults.qdf
+
+# Altera recommends that you do not modify this file. This
+# file is updated automatically by the Quartus II software
+# and any changes you make may be lost or overwritten.
+
+
+set_global_assignment -name FAMILY "Cyclone III"
+set_global_assignment -name DEVICE EP3C25E144C8
+set_global_assignment -name TOP_LEVEL_ENTITY mist_top
+set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.2
+set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:27:29  OCTOBER 30, 2007"
+set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
+set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
+set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
+set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
+set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
+set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
+set_global_assignment -name FITTER_EFFORT "AUTO FIT"
+set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
+set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
+set_global_assignment -name CYCLONEIII_CONFIGURATION_SCHEME "PASSIVE SERIAL"
+set_global_assignment -name GENERATE_RBF_FILE ON
+set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
+set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
+
+set_location_assignment PIN_7 -to LED
+set_location_assignment PIN_22 -to CLOCK_50[0]
+set_location_assignment PIN_23 -to CLOCK_50[1]
+set_location_assignment PIN_128 -to CLOCK_32[0]
+set_location_assignment PIN_129 -to CLOCK_32[1]
+set_location_assignment PIN_54 -to CLOCK_27[0]
+set_location_assignment PIN_55 -to CLOCK_27[1]
+set_location_assignment PIN_144 -to VGA_R[5]
+set_location_assignment PIN_143 -to VGA_R[4]
+set_location_assignment PIN_142 -to VGA_R[3]
+set_location_assignment PIN_141 -to VGA_R[2]
+set_location_assignment PIN_137 -to VGA_R[1]
+set_location_assignment PIN_135 -to VGA_R[0]
+set_location_assignment PIN_133 -to VGA_B[5]
+set_location_assignment PIN_132 -to VGA_B[4]
+set_location_assignment PIN_125 -to VGA_B[3]
+set_location_assignment PIN_121 -to VGA_B[2]
+set_location_assignment PIN_120 -to VGA_B[1]
+set_location_assignment PIN_115 -to VGA_B[0]
+set_location_assignment PIN_114 -to VGA_G[5]
+set_location_assignment PIN_113 -to VGA_G[4]
+set_location_assignment PIN_112 -to VGA_G[3]
+set_location_assignment PIN_111 -to VGA_G[2]
+set_location_assignment PIN_110 -to VGA_G[1]
+set_location_assignment PIN_106 -to VGA_G[0]
+set_location_assignment PIN_136 -to VGA_VS
+set_location_assignment PIN_119 -to VGA_HS
+set_location_assignment PIN_65 -to AUDIO_L
+set_location_assignment PIN_80 -to AUDIO_R
+set_location_assignment PIN_46 -to UART_TX
+set_location_assignment PIN_31 -to UART_RX
+set_location_assignment PIN_105 -to SPI_DO
+set_location_assignment PIN_88 -to SPI_DI
+set_location_assignment PIN_126 -to SPI_SCK
+set_location_assignment PIN_127 -to SPI_SS2
+set_location_assignment PIN_91 -to SPI_SS3
+set_location_assignment PIN_90 -to SPI_SS4
+set_location_assignment PIN_13 -to CONF_DATA0
+
+set_location_assignment PIN_49 -to SDRAM_A[0]
+set_location_assignment PIN_44 -to SDRAM_A[1]
+set_location_assignment PIN_42 -to SDRAM_A[2]
+set_location_assignment PIN_39 -to SDRAM_A[3]
+set_location_assignment PIN_4 -to SDRAM_A[4]
+set_location_assignment PIN_6 -to SDRAM_A[5]
+set_location_assignment PIN_8 -to SDRAM_A[6]
+set_location_assignment PIN_10 -to SDRAM_A[7]
+set_location_assignment PIN_11 -to SDRAM_A[8]
+set_location_assignment PIN_28 -to SDRAM_A[9]
+set_location_assignment PIN_50 -to SDRAM_A[10]
+set_location_assignment PIN_30 -to SDRAM_A[11]
+set_location_assignment PIN_32 -to SDRAM_A[12]
+set_location_assignment PIN_83 -to SDRAM_DQ[0]
+set_location_assignment PIN_79 -to SDRAM_DQ[1]
+set_location_assignment PIN_77 -to SDRAM_DQ[2]
+set_location_assignment PIN_76 -to SDRAM_DQ[3]
+set_location_assignment PIN_72 -to SDRAM_DQ[4]
+set_location_assignment PIN_71 -to SDRAM_DQ[5]
+set_location_assignment PIN_69 -to SDRAM_DQ[6]
+set_location_assignment PIN_68 -to SDRAM_DQ[7]
+set_location_assignment PIN_86 -to SDRAM_DQ[8]
+set_location_assignment PIN_87 -to SDRAM_DQ[9]
+set_location_assignment PIN_98 -to SDRAM_DQ[10]
+set_location_assignment PIN_99 -to SDRAM_DQ[11]
+set_location_assignment PIN_100 -to SDRAM_DQ[12]
+set_location_assignment PIN_101 -to SDRAM_DQ[13]
+set_location_assignment PIN_103 -to SDRAM_DQ[14]
+set_location_assignment PIN_104 -to SDRAM_DQ[15]
+set_location_assignment PIN_58 -to SDRAM_BA[0]
+set_location_assignment PIN_51 -to SDRAM_BA[1]
+set_location_assignment PIN_85 -to SDRAM_DQMH
+set_location_assignment PIN_67 -to SDRAM_DQML
+set_location_assignment PIN_60 -to SDRAM_nRAS
+set_location_assignment PIN_64 -to SDRAM_nCAS
+set_location_assignment PIN_66 -to SDRAM_nWE
+set_location_assignment PIN_59 -to SDRAM_nCS
+set_location_assignment PIN_33 -to SDRAM_CKE
+set_location_assignment PIN_43 -to SDRAM_CLK
+
+set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
+set_global_assignment -name SMART_RECOMPILE ON
+set_global_assignment -name ENABLE_SIGNALTAP ON
+set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL
+set_global_assignment -name FMAX_REQUIREMENT "114 MHz"
+set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
+set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
+set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
+set_global_assignment -name USE_CONFIGURATION_DEVICE ON
+set_global_assignment -name TPD_REQUIREMENT "2 ns"
+set_global_assignment -name TSU_REQUIREMENT "2 ns"
+set_global_assignment -name TCO_REQUIREMENT "2 ns"
+set_global_assignment -name ALLOW_POWER_UP_DONT_CARE OFF
+set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS OFF
+set_global_assignment -name AUTO_RAM_TO_LCELL_CONVERSION OFF
+set_global_assignment -name AUTO_RAM_RECOGNITION ON
+set_global_assignment -name AUTO_ROM_RECOGNITION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
+set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
+set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
+set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
+set_global_assignment -name PARTITION_COLOR 2147039 -section_id Top
+set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
+
+set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA OFF
+set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
+
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY out
+set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 4.0
+set_global_assignment -name ROUTER_EFFORT_MULTIPLIER 4.0
+set_global_assignment -name CYCLONEII_M4K_COMPATIBILITY OFF
+
+set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
+set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
+set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQ[15]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[2]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[3]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[4]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[5]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[6]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[7]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[8]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[9]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[10]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[11]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_A[12]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[0]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_BA[1]
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQMH
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_DQML
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nRAS
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCAS
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nWE
+set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to SDRAM_nCS
+
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_OUTPUT_ENABLE_REGISTER ON -to SDRAM_DQ[15]
+
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[0]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[1]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[2]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[3]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[4]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[5]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[6]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[7]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[8]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[9]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[10]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[11]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[12]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[13]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14]
+set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15]
+
+set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_8
+set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_128
+set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SDRAM_CLK
+set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SPI_SCK
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[6]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[7]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[8]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[9]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[10]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[11]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[12]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[13]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[14]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQ[15]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[0]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_BA[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQML
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_DQMH
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nRAS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCAS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nWE
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_R[0]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_G[0]
+
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[5]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[4]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1]
+set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0]
+
+set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_32
+
+set_global_assignment -name VERILOG_FILE mfp_timer.v
+set_global_assignment -name VHDL_FILE vol_table_array.vhd
+set_global_assignment -name VHDL_FILE YM2149_volmix.vhd
+set_global_assignment -name VERILOG_FILE acia.v
+set_global_assignment -name VERILOG_FILE blitter.v
+set_global_assignment -name VHDL_FILE TG68K.vhd
+set_global_assignment -name VHDL_FILE TG68K_ALU.vhd
+set_global_assignment -name VHDL_FILE TG68K_Pack.vhd
+set_global_assignment -name VHDL_FILE TG68KdotC_Kernel.vhd
+set_global_assignment -name SDC_FILE mist.sdc
+set_global_assignment -name VHDL_FILE sdram.vhd
+set_global_assignment -name VERILOG_FILE clock.v
+set_global_assignment -name VERILOG_FILE mist_top.v
+set_global_assignment -name VERILOG_FILE user_io.v
+set_global_assignment -name VERILOG_FILE video.v
+set_global_assignment -name VERILOG_FILE data_io.v
+set_global_assignment -name VERILOG_FILE mfp.v
+set_global_assignment -name VERILOG_FILE dma.v
+set_global_assignment -name VERILOG_FILE sigma_delta_dac.v
+set_global_assignment -name VERILOG_FILE mmu.v
+
+set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION ON
+set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "clock:clock|altpll:altpll_component|clk[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "TG68K:tg68k|IPL[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "TG68K:tg68k|IPL[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "TG68K:tg68k|IPL[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[3] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[4] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[5] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[6] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[7] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[8] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[9] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[10] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[11] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[12] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[13] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[14] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[15] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[16] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[17] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[18] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[19] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[20] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[21] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[22] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[23] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[24] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[25] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[26] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[27] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[28] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[29] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[30] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[31] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[32] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[33] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[34] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[35] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[36] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[37] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[38] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[39] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[40] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[41] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[42] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[43] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[44] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[45] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[46] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[47] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[48] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[49] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[50] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[51] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[52] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[53] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[54] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[55] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[56] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[57] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[58] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[59] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[60] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[61] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[62] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[63] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[64] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[65] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[66] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[67] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[68] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[69] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[70] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[71] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[72] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[73] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[74] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[75] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[76] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[77] -to "TG68K:tg68k|addr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[78] -to "TG68K:tg68k|addr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[79] -to "TG68K:tg68k|addr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[80] -to "TG68K:tg68k|addr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[81] -to "TG68K:tg68k|addr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[82] -to "TG68K:tg68k|addr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[83] -to "TG68K:tg68k|addr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[84] -to "TG68K:tg68k|addr[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[85] -to "TG68K:tg68k|addr[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[86] -to "TG68K:tg68k|addr[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[87] -to "TG68K:tg68k|addr[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[88] -to "TG68K:tg68k|addr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[89] -to "TG68K:tg68k|addr[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[90] -to "TG68K:tg68k|addr[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[91] -to "TG68K:tg68k|addr[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[92] -to "TG68K:tg68k|addr[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "TG68K:tg68k|addr[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "TG68K:tg68k|addr[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "TG68K:tg68k|addr[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "TG68K:tg68k|addr[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "TG68K:tg68k|addr[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "TG68K:tg68k|addr[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "TG68K:tg68k|addr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "TG68K:tg68k|addr[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "TG68K:tg68k|addr[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "TG68K:tg68k|addr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "TG68K:tg68k|addr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "TG68K:tg68k|addr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "TG68K:tg68k|addr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "TG68K:tg68k|addr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "TG68K:tg68k|addr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "TG68K:tg68k|addr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "TG68K:tg68k|as" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "TG68K:tg68k|data_read[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "TG68K:tg68k|data_read[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "TG68K:tg68k|data_read[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "TG68K:tg68k|data_read[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "TG68K:tg68k|data_read[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "TG68K:tg68k|data_read[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "TG68K:tg68k|data_read[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "TG68K:tg68k|data_read[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "TG68K:tg68k|data_read[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "TG68K:tg68k|data_read[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "TG68K:tg68k|data_read[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "TG68K:tg68k|data_read[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "TG68K:tg68k|data_read[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "TG68K:tg68k|data_read[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "TG68K:tg68k|data_read[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "TG68K:tg68k|data_read[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "TG68K:tg68k|dtack" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "TG68K:tg68k|lds" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "TG68K:tg68k|rw" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "TG68K:tg68k|uds" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to VGA_HS -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "data_io:data_io|bus_cycle[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "data_io:data_io|bus_cycle[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "mfp:mfp|clk" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "mfp:mfp|dtack" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "mfp:mfp|ipr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[136] -to "mfp:mfp|ipr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[137] -to "mfp:mfp|ipr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[138] -to "mfp:mfp|ipr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[139] -to "mfp:mfp|ipr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[140] -to "mfp:mfp|ipr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[141] -to "mfp:mfp|ipr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[142] -to "mfp:mfp|ipr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[143] -to "mfp:mfp|ipr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[144] -to "mfp:mfp|ipr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[145] -to "mfp:mfp|ipr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[146] -to "mfp:mfp|ipr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[147] -to "mfp:mfp|ipr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[148] -to "mfp:mfp|ipr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[149] -to "mfp:mfp|ipr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[150] -to "mfp:mfp|ipr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[151] -to "mfp:mfp|isr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[152] -to "mfp:mfp|isr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[153] -to "mfp:mfp|isr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[154] -to "mfp:mfp|isr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[155] -to "mfp:mfp|isr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[156] -to "mfp:mfp|isr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[157] -to "mfp:mfp|isr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[158] -to "mfp:mfp|isr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[159] -to "mfp:mfp|isr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[160] -to "mfp:mfp|isr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[161] -to "mfp:mfp|isr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[162] -to "mfp:mfp|isr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[163] -to "mfp:mfp|isr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[164] -to "mfp:mfp|isr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[165] -to "mfp:mfp|isr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[166] -to "mfp:mfp|isr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[167] -to "mfp:mfp|sel" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[168] -to "mmu:mmu|reset" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[169] -to "sdram:sdram|chipCycle" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[170] -to tg68_berr -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[171] -to "TG68K:tg68k|berr_in" -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[172] -to hsD -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[173] -to hsD2 -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[174] -to hsI -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[0] -to "TG68K:tg68k|IPL[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[1] -to "TG68K:tg68k|IPL[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[2] -to "TG68K:tg68k|IPL[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[3] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[4] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[5] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[6] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[7] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[8] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[9] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[10] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[11] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[12] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[13] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[14] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[15] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[16] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[17] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[18] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[19] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[20] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[21] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[22] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[23] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[24] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[25] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[26] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[27] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[28] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[29] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[30] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[31] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[32] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[33] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[34] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|TG68_PC[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[35] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[36] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[37] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[38] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[39] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[40] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[41] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[42] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[43] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[44] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[45] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[46] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[47] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[48] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[49] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[50] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|data_write[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[51] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[52] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[53] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[54] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[55] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[56] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[57] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[58] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[59] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[60] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[61] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[62] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[63] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[64] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[65] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[66] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|exe_opcode[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[67] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[68] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|state[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[69] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[70] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[71] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[72] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[73] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[74] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[75] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[76] -to "TG68K:tg68k|TG68KdotC_Kernel:pf68K_Kernel_inst|trap_vector[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[77] -to "TG68K:tg68k|addr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[78] -to "TG68K:tg68k|addr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[79] -to "TG68K:tg68k|addr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[80] -to "TG68K:tg68k|addr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[81] -to "TG68K:tg68k|addr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[82] -to "TG68K:tg68k|addr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[83] -to "TG68K:tg68k|addr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[84] -to "TG68K:tg68k|addr[16]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[85] -to "TG68K:tg68k|addr[17]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[86] -to "TG68K:tg68k|addr[18]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[87] -to "TG68K:tg68k|addr[19]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[88] -to "TG68K:tg68k|addr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[89] -to "TG68K:tg68k|addr[20]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[90] -to "TG68K:tg68k|addr[21]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[91] -to "TG68K:tg68k|addr[22]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[92] -to "TG68K:tg68k|addr[23]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "TG68K:tg68k|addr[24]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "TG68K:tg68k|addr[25]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "TG68K:tg68k|addr[26]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "TG68K:tg68k|addr[27]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "TG68K:tg68k|addr[28]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "TG68K:tg68k|addr[29]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "TG68K:tg68k|addr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "TG68K:tg68k|addr[30]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "TG68K:tg68k|addr[31]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "TG68K:tg68k|addr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "TG68K:tg68k|addr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "TG68K:tg68k|addr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "TG68K:tg68k|addr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "TG68K:tg68k|addr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "TG68K:tg68k|addr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "TG68K:tg68k|addr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "TG68K:tg68k|as" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "TG68K:tg68k|data_read[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "TG68K:tg68k|data_read[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "TG68K:tg68k|data_read[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "TG68K:tg68k|data_read[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "TG68K:tg68k|data_read[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "TG68K:tg68k|data_read[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "TG68K:tg68k|data_read[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "TG68K:tg68k|data_read[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "TG68K:tg68k|data_read[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "TG68K:tg68k|data_read[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "TG68K:tg68k|data_read[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "TG68K:tg68k|data_read[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "TG68K:tg68k|data_read[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "TG68K:tg68k|data_read[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "TG68K:tg68k|data_read[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "TG68K:tg68k|data_read[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "TG68K:tg68k|dtack" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "TG68K:tg68k|lds" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "TG68K:tg68k|rw" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "TG68K:tg68k|uds" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to VGA_HS -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "data_io:data_io|bus_cycle[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "data_io:data_io|bus_cycle[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "mfp:mfp|clk" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "mfp:mfp|dtack" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "mfp:mfp|ipr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "mfp:mfp|ipr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "mfp:mfp|ipr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "mfp:mfp|ipr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "mfp:mfp|ipr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "mfp:mfp|ipr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "mfp:mfp|ipr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "mfp:mfp|ipr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "mfp:mfp|ipr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "mfp:mfp|ipr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "mfp:mfp|ipr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "mfp:mfp|ipr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "mfp:mfp|ipr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "mfp:mfp|ipr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "mfp:mfp|ipr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "mfp:mfp|ipr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "mfp:mfp|isr[0]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "mfp:mfp|isr[10]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "mfp:mfp|isr[11]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "mfp:mfp|isr[12]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "mfp:mfp|isr[13]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "mfp:mfp|isr[14]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "mfp:mfp|isr[15]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "mfp:mfp|isr[1]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "mfp:mfp|isr[2]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "mfp:mfp|isr[3]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "mfp:mfp|isr[4]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "mfp:mfp|isr[5]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "mfp:mfp|isr[6]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "mfp:mfp|isr[7]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "mfp:mfp|isr[8]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "mfp:mfp|isr[9]" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "mfp:mfp|sel" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "mmu:mmu|reset" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "sdram:sdram|chipCycle" -section_id auto_signaltap_0
+set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to tg68_berr -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "TG68K:tg68k|berr_in" -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to hsD -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to hsD2 -section_id auto_signaltap_0
+set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to hsI -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=175" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=175" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_INFO=805334528" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_POWER_UP_TRIGGER=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=549" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STORAGE_QUALIFIER_INVERSION_MASK_LENGTH=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=1024" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ATTRIBUTE_MEM_MODE=OFF" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_FLOW_USE_GENERATED=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_STATE_BITS=11" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_BUFFER_FULL_STOP=1" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_CURRENT_RESOURCE_WIDTH=1" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=471" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=22929" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL=1" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=1024" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLED=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0
+set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0
+set_global_assignment -name SLD_FILE "Z:/Proyectos/Mist/cores/mist/stp1_auto_stripped.stp"
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/cores/mist/mist_top.v b/cores/mist/mist_top.v
index 06ede8b..af3a11c 100644
--- a/cores/mist/mist_top.v
+++ b/cores/mist/mist_top.v
@@ -182,8 +182,9 @@ wire init = ~pll_locked;
 video video (
 	.reset      (init          ), // reset input
 	.clk        (clk_32        ),
+  .clk27 (CLOCK_27[0]),
 	.bus_cycle  (bus_cycle     ),
-
+  .scanlines (system_ctrl[31:30]),
 	// spi for OSD
    .sdi            (SPI_DI    ),
    .sck            (SPI_SCK   ),
@@ -320,16 +321,23 @@ wire [7:0] port_a_out;
 assign floppy_side = port_a_out[0];
 assign floppy_sel = port_a_out[2:1];
 
-wire [7:0] audio_out;
-assign AUDIO_R = AUDIO_L;
+wire [7:0] audio_out_l,audio_out_r;
+//assign AUDIO_R = AUDIO_L;
 
-sigma_delta_dac sigma_delta_dac (
+sigma_delta_dac sigma_delta_dac_l (
 	.DACout 		(AUDIO_L),
-	.DACin		(audio_out),
+	.DACin		(audio_out_l),
 	.CLK 			(clk_32),
 	.RESET 		(reset)
 );
 
+sigma_delta_dac sigma_delta_dac_r (
+  .DACout     (AUDIO_R),
+  .DACin    (audio_out_r),
+  .CLK      (clk_32),
+  .RESET    (reset)
+);
+
 YM2149 ym2149 (
 	.I_DA						( tg68_dat_out[15:8]		),
 	.O_DA						( psg_data_out				),
@@ -343,8 +351,10 @@ YM2149 ym2149 (
 	.I_BC1              	( psg_sel && !tg68_adr[1]),
 	.I_SEL_L             ( 1'b1						),
 
-	.O_AUDIO             ( audio_out					),
+	.O_AUDIO_L             (audio_out_l),
+  .O_AUDIO_R             (audio_out_r),
 
+  .stereo (system_ctrl[29]),
 	// port a
 	.I_IOA           		( 8'd0 						),
 	.O_IOA              	( port_a_out				),
diff --git a/cores/mist/video.v b/cores/mist/video.v
index 90177c0..4615ed8 100644
--- a/cores/mist/video.v
+++ b/cores/mist/video.v
@@ -19,46 +19,50 @@
 // Examples: automation 000 + 001: bottom border
 //           automation 097: top+ bottom border
 
+//Modified by Juan Carlos González Amestoy.
+
 module video (
-	// system interface
-	input         	clk,     // 31.875 MHz
-	input         	reset,   // reset
-	input [3:0]   	bus_cycle,
+  // system interface
+  input clk,     // 31.875 MHz
+  input clk27,   // 27.000 Mhz
+  input reset,   // reset
+  input [3:0] bus_cycle, //bus-cycle for sync
 
-	// SPI interface for OSD
-	input      		sck,
-   input      		ss,
-   input      		sdi,
+  input [1:0] scanlines, //scanlines (00-none 01-25% 10-50% 11-100%)
+  // SPI interface for OSD
+  input         sck,
+  input         ss,
+  input         sdi,
 
-	// memory interface
-	output reg [22:0] vaddr,   // video word address counter
-	output        	read,        // video read cycle
-	input [15:0]  	data,
-	
-	// cpu register interface
-	input         	reg_clk,
-	input         	reg_reset,
-	input [15:0]  	reg_din,
-	input         	reg_sel,
-	input [5:0]   	reg_addr,
-	input         	reg_uds,
-	input         	reg_lds,
-	input         	reg_rw,
-	output reg [15:0] reg_dout,
-	
-	// screen interface
-	output reg	  	hs,      // H_SYNC
-	output reg	  	vs,      // V_SYNC
-	output reg [5:0]  	video_r, // Red[5:0]
-	output reg [5:0]  	video_g, // Green[5:0]
-	output reg [5:0]  	video_b, // Blue[5:0]
+  // memory interface
+  output reg [22:0] vaddr,   // video word address counter
+  output          read,      // video read cycle
+  input [15:0]    data,      // video data read
+  
+  // cpu register interface
+  input           reg_clk,
+  input           reg_reset,
+  input [15:0]    reg_din,
+  input           reg_sel,
+  input [5:0]     reg_addr,
+  input           reg_uds,
+  input           reg_lds,
+  input           reg_rw,
+  output reg [15:0] reg_dout,
+  
+  // screen interface
+  output reg      hs,      // H_SYNC
+  output reg      vs,      // V_SYNC
+  output reg [5:0]    video_r, // Red[5:0]
+  output reg [5:0]    video_g, // Green[5:0]
+  output reg [5:0]    video_b, // Blue[5:0]
 
-	// system config
-	input 			pal56,   // use VGA compatible 56hz for PAL
-	
-	// for internal use
-	output        	deO,
-	output        	hsO
+  // system config
+  input       pal56,   // use VGA compatible 56hz for PAL
+  
+  // for internal use
+  output          deO,
+  output          hsO
 );
 
 // basic video parameters
@@ -69,9 +73,9 @@ localparam V_ACT = 10'd400;
 // default video mode is 
 parameter DEFAULT_MODE = 2'd2;
 
-// output a de/hs signal with half the hsyncs in color mode 
-assign deO = ~(mono?de:deC);
-assign hsO =   mono?hs:hsC;
+reg [1:0] shmode;
+wire mono = (shmode == 2'd2);
+wire low = (shmode == 2'd0);
 
 // line buffer for scan doubler for color video modes
 // the color modes have 80 words per line (320*4/16 or 640*2/16) and
@@ -84,63 +88,87 @@ reg [6:0]  sd_wptr, sd_rptr;
 
 reg [15:0] dataR;
 
-// instance of video timing module for monochrome (72hz)
+reg [1:0] syncmode;
+reg [1:0] syncmode_latch;
+wire pal = (syncmode_latch[1] == 1'b1);
+
+// instance of video timing module for monochrome (72hz) (31.875 Mhz Pixel clock)
 wire [9:0] vcnt_mono, hcnt_mono;
-wire hs_mono, vs_mono, hmax_mono, vmax_mono;
+wire hs_mono, vs_mono, hmax_mono, vmax_mono,pixel_mono,border_mono,pixel_clk_mono;
 timing timing_mono (
-		.clk 		(clk			),
-		.reset 	(reset		),
-		.vcnt 	(vcnt_mono	),
-		.hcnt 	(hcnt_mono	),
-		.vs 		(vs_mono		),
-		.hs 		(hs_mono		),
-		.vmax 	(vmax_mono	),
-		.hmax 	(hmax_mono	)
+    .clk    (clk      ),
+    .video_clk (clk),
+    .bus_cycle (bus_cycle),
+    .reset  (reset    ),
+    .border (border_mono),
+    .vcnt   (vcnt_mono  ),
+    .hcnt   (hcnt_mono  ),
+    .vs     (vs_mono    ),
+    .hs     (hs_mono    ),
+    .vmax   (vmax_mono  ),
+    .hmax   (hmax_mono  ),
+    .pixel (pixel_mono),
+    .pixel_clk (pixel_clk_mono)
 );
 
-// instance of video timing module for pal@56Hz, 32kHz
+// instance of video timing module for pal@56Hz, (31.875 Mhz Pixel Clock)
 wire [9:0] vcnt_pal56, hcnt_pal56;
-wire hs_pal56, vs_pal56, hmax_pal56, vmax_pal56, bd_pal56;
-timing #(10'd120, 10'd40, 10'd200, 10'd100, 10'd3, 10'd66) timing_pal56 (
-		.clk 		(clk			),
-		.reset 	(reset		),
-		.border 	(bd_pal56	),
-		.vcnt 	(vcnt_pal56	),
-		.hcnt 	(hcnt_pal56	),
-		.vs 		(vs_pal56	),
-		.hs 		(hs_pal56	),
-		.vmax 	(vmax_pal56	),
-		.hmax 	(hmax_pal56	)
+wire hs_pal56, vs_pal56, hmax_pal56, vmax_pal56, bd_pal56,pixel_pal56,scanline_pal56,pixel_clk_pal56;
+timing #(10'd80, 10'd40, 10'd160, 10'd100, 10'd3, 10'd66,10'd40,10'd40,10'd03) timing_pal56 (
+    .clk    (clk      ),
+    .video_clk (clk),
+    .bus_cycle (bus_cycle),
+    .reset  (reset    ),
+    .border   (bd_pal56 ),
+    .vcnt   (vcnt_pal56 ),
+    .hcnt   (hcnt_pal56 ),
+    .vs     (vs_pal56 ),
+    .hs     (hs_pal56 ),
+    .vmax   (vmax_pal56 ),
+    .hmax   (hmax_pal56 ),
+    .pixel (pixel_pal56),
+    .pixel_clk (pixel_clk_pal56),
+    .scanline (scanline_pal56)
 );
 
-// instance of video timing module for pal@50Hz, 32kHz
+// instance of video timing module for pal@50Hz, (27 Mhz pixel clock)
 wire [9:0] vcnt_pal50, hcnt_pal50;
-wire hs_pal50, vs_pal50, hmax_pal50, vmax_pal50, bd_pal50;
-timing #(10'd128, 10'd40, 10'd192, 10'd117, 10'd3, 10'd117) timing_pal50 (
- 		.clk 		(clk			),
-		.reset 	(reset		),
-		.border 	(bd_pal50	),
-		.vcnt 	(vcnt_pal50	),
-		.hcnt 	(hcnt_pal50	),
-		.vs 		(vs_pal50	),
-		.hs 		(hs_pal50	),
-		.vmax 	(vmax_pal50	),
-		.hmax 	(hmax_pal50	)
+wire hs_pal50, vs_pal50, hmax_pal50, vmax_pal50, bd_pal50,pixel_pal50,scanline_pal50,pixel_clk_pal50;
+timing #(10'd12,10'd64,10'd68,10'd93,10'd5,10'd127,10'd40,10'd88,10'd03) timing_pal50 (
+    .clk    (clk      ),
+    .video_clk (clk27),
+    .bus_cycle (bus_cycle),
+    .reset  (reset    ),
+    .border   (bd_pal50 ),
+    .vcnt   (vcnt_pal50 ),
+    .hcnt   (hcnt_pal50 ),
+    .vs     (vs_pal50 ),
+    .hs     (hs_pal50 ),
+    .vmax   (vmax_pal50 ),
+    .hmax   (hmax_pal50 ),
+    .pixel (pixel_pal50),
+    .pixel_clk (pixel_clk_pal50),
+    .scanline (scanline_pal50)
 );
 
-// instance of video timing module for ntsc@60Hz, 32kHz
+// instance of video timing module for ntsc@60Hz, (27 Mhz pixel clock)
 wire [9:0] vcnt_ntsc, hcnt_ntsc;
-wire hs_ntsc, vs_ntsc, hmax_ntsc, vmax_ntsc, bd_ntsc;
-timing #(10'd160, 10'd40, 10'd160, 10'd64, 10'd3, 10'd64) timing_ntsc (
-		.clk 		(clk			),
-		.reset 	(reset		),
-		.border 	(bd_ntsc		),
-		.vcnt 	(vcnt_ntsc	),
-		.hcnt 	(hcnt_ntsc	),
-		.vs 		(vs_ntsc		),
-		.hs 		(hs_ntsc		),
-		.vmax 	(vmax_ntsc	),
-		.hmax 	(hmax_ntsc	)
+wire hs_ntsc, vs_ntsc, hmax_ntsc, vmax_ntsc, bd_ntsc,pixel_ntsc,scanline_ntsc,pixel_clk_ntsc;
+timing #(10'd16, 10'd62, 10'd60, 10'd49, 10'd6, 10'd70,10'd40,10'd40,10'd03) timing_ntsc (
+    .clk    (clk      ),
+    .video_clk (clk27),
+    .bus_cycle (bus_cycle),
+    .reset  (reset    ),
+    .border   (bd_ntsc    ),
+    .vcnt   (vcnt_ntsc  ),
+    .hcnt   (hcnt_ntsc  ),
+    .vs     (vs_ntsc    ),
+    .hs     (hs_ntsc    ),
+    .vmax   (vmax_ntsc  ),
+    .hmax   (hmax_ntsc  ),
+    .pixel (pixel_ntsc),
+    .pixel_clk (pixel_clk_ntsc),
+    .scanline (scanline_ntsc)
 );
 
 // ----------- de-multiplex video timing signals ------------
@@ -153,6 +181,9 @@ wire hs_pal = pal56?hs_pal56:hs_pal50;
 wire vs_pal = pal56?vs_pal56:vs_pal50;
 wire hmax_pal = pal56?hmax_pal56:hmax_pal50;
 wire vmax_pal = pal56?vmax_pal56:vmax_pal50;
+wire pixel_pal=pal56?pixel_pal56:pixel_pal50;
+wire pixel_clk_pal=pal56?pixel_clk_pal56:pixel_clk_pal50;
+wire scanline_pal = pal56?scanline_pal56:scanline_pal50;
 
 // de-multiplex pal(50hz/56hz)/ntsc(60hz) timing
 wire [9:0] hcnt_color = pal?hcnt_pal:hcnt_ntsc;
@@ -162,36 +193,30 @@ wire hs_color = pal?hs_pal:hs_ntsc;
 wire vs_color = pal?vs_pal:vs_ntsc;
 wire hmax_color = pal?hmax_pal:hmax_ntsc;
 wire vmax_color = pal?vmax_pal:vmax_ntsc;
+wire pixel_color=pal?pixel_pal:pixel_ntsc;
+wire pixel_clk_color=pal?pixel_clk_pal:pixel_clk_ntsc;
+wire scanline_color=pal?scanline_pal:scanline_ntsc;
 
 // de-multiplex mono(72hz)/color(50hz/56hz/60hz) timing
 wire [9:0] hcnt = mono?hcnt_mono:hcnt_color;
 wire [9:0] vcnt = mono?vcnt_mono:vcnt_color;
-wire bd = mono?1'b0:bd_color;
-// monochome is 640x480 (hs & vs neg)
-// color is 800x600 (hs & vs pos)
+wire bd = mono?border_mono:bd_color;
 wire hmax = mono?hmax_mono:hmax_color;
 wire vmax = mono?vmax_mono:vmax_color;
 
-always @(posedge clk) begin
-   hs <= mono?~hs_mono:hs_color;
-   vs <= mono?~vs_mono:vs_color;
-end
+wire pixel_clk=mono?pixel_clk_mono:pixel_clk_color;
+wire pixel=mono?pixel_mono:pixel_color;
+wire scanline=mono?1'b0:scanline_color; //monochrome no scanlines
+
+reg [9:0] rc,wc;
 
 reg [15:0] tx, tx0, tx1, tx2, tx3;      // output shift registers
 
 localparam BASE_ADDR = 23'h8000;   // default video base address 0x010000
 reg [22:0] _v_bas_ad;              // video base address register
 
-reg [1:0] shmode;
-wire mono = (shmode == 2'd2);
-wire low = (shmode == 2'd0);
-
 // syncmode is delayed until next vsync to cope with "bottom border overscan"
-reg [1:0] syncmode;
-reg [1:0] syncmode_latch;
-wire pal = (syncmode_latch[1] == 1'b1);
-
-reg overscan;        	// overscan detected in current frame
+reg overscan;         // overscan detected in current frame
 reg overscan_latched;
 
 // 16 colors with 3*3 bits each
@@ -200,17 +225,17 @@ reg [2:0] palette_g[15:0];
 reg [2:0] palette_b[15:0];
 
 always @(reg_sel, reg_rw, reg_uds, reg_lds, reg_addr, _v_bas_ad, shmode, vaddr, syncmode) begin
-	reg_dout = 16'h0000;
+  reg_dout = 16'h0000;
 
-	// read registers
-	if(reg_sel && reg_rw) begin
-		
-		if(reg_addr == 6'h00 && ~reg_lds)
-			reg_dout = { 8'h00, _v_bas_ad[22:15]};
+  // read registers
+  if(reg_sel && reg_rw) begin
+    
+    if(reg_addr == 6'h00 && ~reg_lds)
+      reg_dout = { 8'h00, _v_bas_ad[22:15]};
 
-		if(reg_addr == 6'h01 && ~reg_lds)
-			reg_dout = { 8'h00, _v_bas_ad[14:7]};
-			
+    if(reg_addr == 6'h01 && ~reg_lds)
+      reg_dout = { 8'h00, _v_bas_ad[14:7]};
+      
       if(reg_addr == 6'h02 && ~reg_lds)
          reg_dout = { 8'h00, vaddr[22:15]};
 
@@ -220,77 +245,87 @@ always @(reg_sel, reg_rw, reg_uds, reg_lds, reg_addr, _v_bas_ad, shmode, vaddr,
       if(reg_addr == 6'h04 && ~reg_lds)
          reg_dout = { 8'h00, vaddr[6:0], 1'b0 };
 
-		if(reg_addr == 6'h05 && ~reg_uds)
-			reg_dout = { 6'h00, syncmode, 8'h00};
+    if(reg_addr == 6'h05 && ~reg_uds)
+      reg_dout = { 6'h00, syncmode, 8'h00};
 
-		// the color palette registers
-		if(reg_addr >= 6'h20 && reg_addr < 6'h30 ) begin
-			reg_dout[2:0]  = palette_b[reg_addr[3:0]];
-			reg_dout[6:4]  = palette_g[reg_addr[3:0]];
-			reg_dout[10:8] = palette_r[reg_addr[3:0]];
-		end
+    // the color palette registers
+    if(reg_addr >= 6'h20 && reg_addr < 6'h30 ) begin
+      reg_dout[2:0]  = palette_b[reg_addr[3:0]];
+      reg_dout[6:4]  = palette_g[reg_addr[3:0]];
+      reg_dout[10:8] = palette_r[reg_addr[3:0]];
+    end
 
-		if(reg_addr == 6'h30 && ~reg_uds)
-			reg_dout = { 6'h00, shmode, 8'h00};
-	end
+    if(reg_addr == 6'h30 && ~reg_uds)
+      reg_dout = { 6'h00, shmode, 8'h00};
+  end
 end
 
 always @(negedge reg_clk) begin
-	if(reg_reset) begin
-		_v_bas_ad <= BASE_ADDR;
-		shmode <= DEFAULT_MODE;	// default video mode 2 => mono
-		syncmode <= 2'b00;		// 60hz
-		
-		if(DEFAULT_MODE == 0) begin
-			// TOS default palette, can be disabled after tests
-			palette_r[ 0] <= 3'b111; palette_g[ 0] <= 3'b111; palette_b[ 0] <= 3'b111;
-			palette_r[ 1] <= 3'b111; palette_g[ 1] <= 3'b000; palette_b[ 1] <= 3'b000;
-			palette_r[ 2] <= 3'b000; palette_g[ 2] <= 3'b111; palette_b[ 2] <= 3'b000;
-			palette_r[ 3] <= 3'b111; palette_g[ 3] <= 3'b111; palette_b[ 3] <= 3'b000;
-			palette_r[ 4] <= 3'b000; palette_g[ 4] <= 3'b000; palette_b[ 4] <= 3'b111;
-			palette_r[ 5] <= 3'b111; palette_g[ 5] <= 3'b000; palette_b[ 5] <= 3'b111;
-			palette_r[ 6] <= 3'b000; palette_g[ 6] <= 3'b111; palette_b[ 6] <= 3'b111;
-			palette_r[ 7] <= 3'b101; palette_g[ 7] <= 3'b101; palette_b[ 7] <= 3'b101;
-			palette_r[ 8] <= 3'b011; palette_g[ 8] <= 3'b011; palette_b[ 8] <= 3'b011;
-			palette_r[ 9] <= 3'b111; palette_g[ 9] <= 3'b011; palette_b[ 9] <= 3'b011;
-			palette_r[10] <= 3'b011; palette_g[10] <= 3'b111; palette_b[10] <= 3'b011;
-			palette_r[11] <= 3'b111; palette_g[11] <= 3'b111; palette_b[11] <= 3'b011;
-			palette_r[12] <= 3'b011; palette_g[12] <= 3'b011; palette_b[12] <= 3'b111;
-			palette_r[13] <= 3'b111; palette_g[13] <= 3'b011; palette_b[13] <= 3'b111;
-			palette_r[14] <= 3'b011; palette_g[14] <= 3'b111; palette_b[14] <= 3'b111;
-			palette_r[15] <= 3'b000; palette_g[15] <= 3'b000; palette_b[15] <= 3'b000;
-		end else	
-			palette_b[ 0] <= 3'b111;
-				
-	end else begin
-		// write registers
-		if(reg_sel && ~reg_rw) begin
-			if(reg_addr == 6'h00 && ~reg_lds) _v_bas_ad[22:15] <= reg_din[7:0];
-			if(reg_addr == 6'h01 && ~reg_lds) _v_bas_ad[14:7] <= reg_din[7:0];
+  if(reg_reset) begin
+    _v_bas_ad <= BASE_ADDR;
+    shmode <= DEFAULT_MODE; // default video mode 2 => mono
+    syncmode <= 2'b00;    // 60hz
+    
+    if(DEFAULT_MODE == 0) begin
+      // TOS default palette, can be disabled after tests
+      palette_r[ 0] <= 3'b111; palette_g[ 0] <= 3'b111; palette_b[ 0] <= 3'b111;
+      palette_r[ 1] <= 3'b111; palette_g[ 1] <= 3'b000; palette_b[ 1] <= 3'b000;
+      palette_r[ 2] <= 3'b000; palette_g[ 2] <= 3'b111; palette_b[ 2] <= 3'b000;
+      palette_r[ 3] <= 3'b111; palette_g[ 3] <= 3'b111; palette_b[ 3] <= 3'b000;
+      palette_r[ 4] <= 3'b000; palette_g[ 4] <= 3'b000; palette_b[ 4] <= 3'b111;
+      palette_r[ 5] <= 3'b111; palette_g[ 5] <= 3'b000; palette_b[ 5] <= 3'b111;
+      palette_r[ 6] <= 3'b000; palette_g[ 6] <= 3'b111; palette_b[ 6] <= 3'b111;
+      palette_r[ 7] <= 3'b101; palette_g[ 7] <= 3'b101; palette_b[ 7] <= 3'b101;
+      palette_r[ 8] <= 3'b011; palette_g[ 8] <= 3'b011; palette_b[ 8] <= 3'b011;
+      palette_r[ 9] <= 3'b111; palette_g[ 9] <= 3'b011; palette_b[ 9] <= 3'b011;
+      palette_r[10] <= 3'b011; palette_g[10] <= 3'b111; palette_b[10] <= 3'b011;
+      palette_r[11] <= 3'b111; palette_g[11] <= 3'b111; palette_b[11] <= 3'b011;
+      palette_r[12] <= 3'b011; palette_g[12] <= 3'b011; palette_b[12] <= 3'b111;
+      palette_r[13] <= 3'b111; palette_g[13] <= 3'b011; palette_b[13] <= 3'b111;
+      palette_r[14] <= 3'b011; palette_g[14] <= 3'b111; palette_b[14] <= 3'b111;
+      palette_r[15] <= 3'b000; palette_g[15] <= 3'b000; palette_b[15] <= 3'b000;
+    end else  
+      palette_b[ 0] <= 3'b111;
+        
+  end else begin
+    // write registers
+    if(reg_sel && ~reg_rw) begin
+      if(reg_addr == 6'h00 && ~reg_lds) _v_bas_ad[22:15] <= reg_din[7:0];
+      if(reg_addr == 6'h01 && ~reg_lds) _v_bas_ad[14:7] <= reg_din[7:0];
 
-			if(reg_addr == 6'h05 && ~reg_uds) begin
-				// writing to sync mode toggles between 50 and 60 hz modes
-				syncmode <= reg_din[9:8];
-			end
+      if(reg_addr == 6'h05 && ~reg_uds) begin
+        // writing to sync mode toggles between 50 and 60 hz modes
+        syncmode <= reg_din[9:8];
+      end
 
-			// the color palette registers
-			if(reg_addr >= 6'h20 && reg_addr < 6'h30 ) begin
-				if(~reg_uds) begin 
-					palette_r[reg_addr[3:0]] <= reg_din[10:8];
-				end
-					
-				if(~reg_lds) begin
-					palette_g[reg_addr[3:0]] <= reg_din[6:4];
-					palette_b[reg_addr[3:0]] <= reg_din[2:0];
-				end
-			end
-				
-			if(reg_addr == 6'h30 && ~reg_uds) shmode <= reg_din[9:8];
+      // the color palette registers
+      if(reg_addr >= 6'h20 && reg_addr < 6'h30 ) begin
+        if(~reg_uds) begin 
+          palette_r[reg_addr[3:0]] <= reg_din[10:8];
+        end
+          
+        if(~reg_lds) begin
+          palette_g[reg_addr[3:0]] <= reg_din[6:4];
+          palette_b[reg_addr[3:0]] <= reg_din[2:0];
+        end
+      end
+        
+      if(reg_addr == 6'h30 && ~reg_uds) shmode <= reg_din[9:8];
 
-		end
-	end
+    end
+  end
 end
 
+wire [9:0] overscan_bottom = overscan_latched?10'd60:10'd0;
+// display enable signal
+// the color modes use a scan doubler and output the data with 2 lines delay
+wire [9:0] v_offset = mono?10'd0:10'd2; 
+wire de = (hcnt >= H_PRE) && (hcnt < H_ACT+H_PRE) && (vcnt >= v_offset && vcnt < V_ACT+v_offset+overscan_bottom);
+
+reg deFake; //Fake de signal for color modes
+
+wire osd_oe,osd_pixel;
+
 // ------------ monochrome video signal ----------------
 wire [2:0] blue0 = palette_b[0];
 wire mono_bit = blue0[0]?~tx[15]:tx[15];
@@ -299,32 +334,86 @@ wire [2:0] mono_rgb = de?{mono_bit, mono_bit, mono_bit}:3'b000;
 // --------------- colour video signal ------------------
 // border color is taken from palette[0]
 wire [3:0] index16 = { tx3[15], tx2[15], tx1[15], tx0[15] };
-wire [2:0] color_r = de?palette_r[index16]:(bd?palette_r[0]:3'b000);
-wire [2:0] color_g = de?palette_g[index16]:(bd?palette_g[0]:3'b000);
-wire [2:0] color_b = de?palette_b[index16]:(bd?palette_b[0]:3'b000);
+wire [2:0] color_r = de?palette_r[index16]:palette_r[0];
+wire [2:0] color_g = de?palette_g[index16]:palette_g[0];
+wire [2:0] color_b = de?palette_b[index16]:palette_b[0];
 
 // de-multiplex color and mono into one vga signal ...
 wire [2:0] stvid_r = mono?mono_rgb:color_r;
 wire [2:0] stvid_g = mono?mono_rgb:color_g;
 wire [2:0] stvid_b = mono?mono_rgb:color_b;
 
-// ... add OSD overlay and feed into VGA outputs
+wire [17:0] wPixel,rPixel; //Pixel's read and write from the dual clock memory
+
+//Dual clock memory for line buffer
+dram m(
+  .rClk (pixel_clk),
+  .wClk (clk),
+  .rA ({~vcnt[0],rc}),
+  .wA ({vcnt[0],wc}),
+  .w (1'b1),
+  .wD (wPixel),
+  .D (rPixel)
+);
+
+assign wPixel=!osd_oe?{stvid_r,stvid_r,stvid_g,stvid_g,stvid_b,stvid_b}:{osd_pixel,1'b1,1'b1,stvid_r,osd_pixel,osd_pixel,osd_pixel,stvid_g,osd_pixel,osd_pixel,osd_pixel,stvid_b};
+
+//Read address
 always @(posedge clk) begin
-   video_r <= !osd_oe?{stvid_r,stvid_r}:{osd_pixel, osd_pixel, osd_pixel, stvid_r};
-   video_g <= !osd_oe?{stvid_g,stvid_g}:{osd_pixel, osd_pixel,      1'b1, stvid_g};
-   video_b <= !osd_oe?{stvid_b,stvid_b}:{osd_pixel, osd_pixel, osd_pixel, stvid_b};
+  wc<=bd?wc+10'd1:10'd0;
 end
 
-wire [9:0] overscan_bottom = overscan_latched?10'd60:10'd0;
+//Screen output
+always @(posedge pixel_clk) begin
+  if(!scanline || scanlines==2'b00) begin //if no scanlines or not a scanline
+    video_r<=pixel?rPixel[17:12]:6'b000000;
+    video_g<=pixel?rPixel[11:6]:6'b000000;
+    video_b<=pixel?rPixel[5:0]:6'b000000;
+  end else begin
+    case(scanlines)
+      2'b01: begin //25%
+        video_r<=pixel?(({1'b0,rPixel[17:12],1'b0}+{2'b00,rPixel[17:12]})>>2):6'b000000;
+        video_g<=pixel?(({1'b0,rPixel[11:6],1'b0}+{2'b00,rPixel[11:6]})>>2):6'b000000;
+        video_b<=pixel?(({1'b0,rPixel[5:0],1'b0}+{2'b00,rPixel[5:0]})>>2):6'b000000;
+      end
 
-// display enable signal
-// the color modes use a scan doubler and output the data with 2 lines delay
-wire [9:0] v_offset = mono?10'd0:10'd2; 
-wire de = (hcnt >= H_PRE) && (hcnt < H_ACT+H_PRE) && (vcnt >= v_offset && vcnt < V_ACT+v_offset+overscan_bottom);
+      2'b10: begin //50%
+        video_r<=pixel?{1'b0,rPixel[17:13]}:6'b000000;
+        video_g<=pixel?{1'b0,rPixel[11:7]}:6'b000000;
+        video_b<=pixel?{1'b0,rPixel[5:1]}:6'b000000;
+      end
+
+      2'b11: begin //75%
+        video_r<=pixel?{2'b00,rPixel[17:14]}:6'b000000;
+        video_g<=pixel?{2'b00,rPixel[11:8]}:6'b000000;
+        video_b<=pixel?{2'b00,rPixel[5:2]}:6'b000000;
+      end
+    endcase
+  end
+  
+  hs <= mono?~hs_mono:((pal && pal56)?hs_color:~hs_color); //All modes neg sync least pal 56
+  vs <= mono?~vs_mono:((pal && pal56)?vs_color:~vs_color);
+
+  rc<=pixel?rc+10'd1:10'd0; 
+end
+
+//Fake de signal generation
+always @(posedge clk) begin
+  if(reset) begin
+    deFake<=1'b0;
+  end else begin
+    if(hcnt==H_PRE && !vcnt[0]) begin
+      deFake<=1'b1;
+    end else begin
+      if(hcnt==H_ACT+H_PRE-10'd161 && vcnt[0]) begin
+        deFake<=1'b0;
+      end
+    end
+  end
+end
 
 // a fake de signal for timer a for color modes with half the hsync frequency
-wire deC = (((hcnt >= H_PRE) && !vcnt[0]) || ((hcnt < H_ACT+H_PRE-10'd160) && vcnt[0])) && 
-	(vcnt >= (v_offset-10'd0) && vcnt < (V_ACT+v_offset+overscan_bottom-10'd0));
+wire deC=deFake && (vcnt >= (v_offset) && vcnt < (V_ACT+v_offset+overscan_bottom));
 
 // a fake hsync pulse for the scan doubled color modes
 wire hsC = vcnt[0] && hs; 
@@ -332,116 +421,120 @@ wire hsC = vcnt[0] && hs;
 // create a read signal that's 16 clocks ahead of oe
 assign read = (bus_cycle[3:2] == 0) && (hcnt < H_ACT) && (vcnt < V_ACT + overscan_bottom);
 
+// output a de/hs signal with half the hsyncs in color mode 
+assign deO = ~(mono?de:deC);
+assign hsO =   mono?hs:hsC;
+
 reg line;
 reg last_syncmode;
 
 always @(posedge clk) begin
-	if(reset) begin
-		vaddr <= _v_bas_ad;
-	end else begin
-		last_syncmode <= syncmode[1];  // delay syncmode to detect changes
-		line <= vcnt[1];
-		
-		// ---- scan doubler pointer handling -----
-		if(hmax) begin
-			// reset counters at and of each line
-			sd_rptr <= 7'd0;
-			
-			if(vcnt[0])
-				sd_wptr <= 7'd0;
-		end
-		
-		// ------------ memory fetch --------------
-		if(read) begin
-			if(bus_cycle == 3) begin
-				// 16bit buffer for direct mono generation
-				dataR <= data;
-				
-				// two line buffer for scan doubling
-				case(sd_wptr[1:0])
-					2'b00: 	sd_buffer0[{!line, sd_wptr[6:2]}] <= data;
-					2'b01: 	sd_buffer1[{!line, sd_wptr[6:2]}] <= data;
-					2'b10:	sd_buffer2[{!line, sd_wptr[6:2]}] <= data;
-					2'b11:	sd_buffer3[{!line, sd_wptr[6:2]}] <= data;
-				endcase
-					
-				// increase scan doubler address
-				sd_wptr <= sd_wptr + 7'd1;
-					
-				// increase video address to next word
-				vaddr <= vaddr + 23'd1;
-			end
-		end else begin
-		
-			// this is also the magic used to do "overscan".
-			// the magic actually involves more than writing zero (60hz)
-			// within line 200. But htis is sufficient for our detection
-			if(vcnt[9:1] == 8'd200) begin
-				// syncmode has changed from 1 to 0 (50 to 60 hz)
-				if((syncmode[1] == 1'b0) && (last_syncmode == 1'b1))
-					overscan <= 1'b1;
-			end
-		
-			// reached last possible pixel pos
-			if(hmax && vmax) begin
-				// reset video address counter
-				vaddr <= _v_bas_ad;
-				
-				// copy syncmode
-				syncmode_latch <= syncmode;
-				
-				// save and reset overscan
-				overscan_latched <= overscan;
-				overscan <= 1'b0;
-			end
-		end
-		
-		// ------------ screen output ----------------
+  if(reset) begin
+    vaddr <= _v_bas_ad;
+  end else begin
+    last_syncmode <= syncmode[1];  // delay syncmode to detect changes
+    line <= vcnt[1];
+    
+    // ---- scan doubler pointer handling -----
+    if(hmax) begin
+      // reset counters at and of each line
+      sd_rptr <= 7'd0;
+      
+      if(vcnt[0])
+        sd_wptr <= 7'd0;
+    end
+    
+    // ------------ memory fetch --------------
+    if(read) begin
+      if(bus_cycle == 3) begin
+        // 16bit buffer for direct mono generation
+        dataR <= data;
+        
+        // two line buffer for scan doubling
+        case(sd_wptr[1:0])
+          2'b00:  sd_buffer0[{!line, sd_wptr[6:2]}] <= data;
+          2'b01:  sd_buffer1[{!line, sd_wptr[6:2]}] <= data;
+          2'b10:  sd_buffer2[{!line, sd_wptr[6:2]}] <= data;
+          2'b11:  sd_buffer3[{!line, sd_wptr[6:2]}] <= data;
+        endcase
+          
+        // increase scan doubler address
+        sd_wptr <= sd_wptr + 7'd1;
+          
+        // increase video address to next word
+        vaddr <= vaddr + 23'd1;
+      end
+    end else begin
+    
+      // this is also the magic used to do "overscan".
+      // the magic actually involves more than writing zero (60hz)
+      // within line 200. But htis is sufficient for our detection
+      if(vcnt[9:1] == 8'd200) begin
+        // syncmode has changed from 1 to 0 (50 to 60 hz)
+        if((syncmode[1] == 1'b0) && (last_syncmode == 1'b1))
+          overscan <= 1'b1;
+      end
+    
+      // reached last possible pixel pos
+      if(hmax && vmax) begin
+        // reset video address counter
+        vaddr <= _v_bas_ad;
+        
+        // copy syncmode
+        syncmode_latch <= syncmode;
+        
+        // save and reset overscan
+        overscan_latched <= overscan;
+        overscan <= 1'b0;
+      end
+    end
+    
+    // ------------ screen output ----------------
 
-		// hires mode: reload shift register every 16 clocks
-		if(hcnt[3:0] == 4'b1111)
-			tx <= dataR;
-		else
-			tx[15:1] <= tx[14:0];
+    // hires mode: reload shift register every 16 clocks
+    if(hcnt[3:0] == 4'b1111)
+      tx <= dataR;
+    else
+      tx[15:1] <= tx[14:0];
 
-		// double buffered color mode: reload every 32 clocks
-		// low rez 320x200
-		if(low) begin
-			if((hcnt < H_ACT) && (hcnt[4:0] == 5'b01110)) begin
-				// read words for all four planes
-				tx0 <= sd_buffer0[{line, sd_rptr[6:2]}];
-				tx1 <= sd_buffer1[{line, sd_rptr[6:2]}];
-				tx2 <= sd_buffer2[{line, sd_rptr[6:2]}];
-				tx3 <= sd_buffer3[{line, sd_rptr[6:2]}];
-				sd_rptr <= sd_rptr + 7'd4;
-			end else if(hcnt[0] == 1'b0) begin
-				// shift every second pixel			
-				tx0[15:1] <= tx0[14:0];
-				tx1[15:1] <= tx1[14:0];
-				tx2[15:1] <= tx2[14:0];
-				tx3[15:1] <= tx3[14:0];
-			end
-		end else begin
-			// med rez 640x200
-			if((hcnt < H_ACT) && (hcnt[3:0] == 4'b1111)) begin
-				// read words for all four planes
-				if(sd_rptr[1] == 1'b0) begin
-					tx0 <= sd_buffer0[{line, sd_rptr[6:2]}];
-					tx1 <= sd_buffer1[{line, sd_rptr[6:2]}];
-				end else begin
-					tx0 <= sd_buffer2[{line, sd_rptr[6:2]}];
-					tx1 <= sd_buffer3[{line, sd_rptr[6:2]}];
-				end
-				sd_rptr <= sd_rptr + 7'd2;
-			end else begin
-				// shift every pixel			
-				tx0[15:1] <= tx0[14:0];
-				tx1[15:1] <= tx1[14:0];
-				tx2[15:1] <= 15'h0000;
-				tx3[15:1] <= 15'h0000;
-			end
-		end
-	end
+    // double buffered color mode: reload every 32 clocks
+    // low rez 320x200
+    if(low) begin
+      if((hcnt < H_ACT) && (hcnt[4:0] == 5'b01110)) begin
+        // read words for all four planes
+        tx0 <= sd_buffer0[{line, sd_rptr[6:2]}];
+        tx1 <= sd_buffer1[{line, sd_rptr[6:2]}];
+        tx2 <= sd_buffer2[{line, sd_rptr[6:2]}];
+        tx3 <= sd_buffer3[{line, sd_rptr[6:2]}];
+        sd_rptr <= sd_rptr + 7'd4;
+      end else if(hcnt[0] == 1'b0) begin
+        // shift every second pixel     
+        tx0[15:1] <= tx0[14:0];
+        tx1[15:1] <= tx1[14:0];
+        tx2[15:1] <= tx2[14:0];
+        tx3[15:1] <= tx3[14:0];
+      end
+    end else begin
+      // med rez 640x200
+      if((hcnt < H_ACT) && (hcnt[3:0] == 4'b1111)) begin
+        // read words for all four planes
+        if(sd_rptr[1] == 1'b0) begin
+          tx0 <= sd_buffer0[{line, sd_rptr[6:2]}];
+          tx1 <= sd_buffer1[{line, sd_rptr[6:2]}];
+        end else begin
+          tx0 <= sd_buffer2[{line, sd_rptr[6:2]}];
+          tx1 <= sd_buffer3[{line, sd_rptr[6:2]}];
+        end
+        sd_rptr <= sd_rptr + 7'd2;
+      end else begin
+        // shift every pixel      
+        tx0[15:1] <= tx0[14:0];
+        tx1[15:1] <= tx1[14:0];
+        tx2[15:1] <= 15'h0000;
+        tx3[15:1] <= 15'h0000;
+      end
+    end
+  end
 end
 
 // ----------------------------------- OSD -----------------------------------
@@ -454,44 +547,45 @@ reg [7:0]       cmd;
 reg [4:0]       cnt;
 reg [10:0]      bcnt;
 
+reg osd_enable;
+reg [7:0] osd_buffer [2047:0];  // the OSD buffer itself
+
 // the OSD has its own SPI interface to the io controller
 always@(posedge sck, posedge ss) begin
-	if(ss == 1'b1) begin
+  if(ss == 1'b1) begin
       cnt <= 5'd0;
       bcnt <= 11'd0;
-	end else begin
-		sbuf <= { sbuf[6:0], sdi};
+  end else begin
+    sbuf <= { sbuf[6:0], sdi};
 
-		// 0:7 is command, rest payload
-		if(cnt < 15)
-			cnt <= cnt + 4'd1;
-		else
-			cnt <= 4'd8;
+    // 0:7 is command, rest payload
+    if(cnt < 15)
+      cnt <= cnt + 4'd1;
+    else
+      cnt <= 4'd8;
 
       if(cnt == 7) begin
-		   cmd <= {sbuf[6:0], sdi};
-			
-			// lower three command bits are line address
-			bcnt <= { sbuf[1:0], sdi, 8'h00};
+       cmd <= {sbuf[6:0], sdi};
+      
+      // lower three command bits are line address
+      bcnt <= { sbuf[1:0], sdi, 8'h00};
 
-			// command 0x40: OSDCMDENABLE, OSDCMDDISABLE
-			if(sbuf[6:3] == 4'b0100)
-				osd_enable <= sdi;
-		end
+      // command 0x40: OSDCMDENABLE, OSDCMDDISABLE
+      if(sbuf[6:3] == 4'b0100)
+        osd_enable <= sdi;
+    end
 
-		// command 0x20: OSDCMDWRITE
-		if((cmd[7:3] == 5'b00100) && (cnt == 15)) begin
-			osd_buffer[bcnt] <= {sbuf[6:0], sdi};
-			bcnt <= bcnt + 11'd1;
-		end
-	end
+    // command 0x20: OSDCMDWRITE
+    if((cmd[7:3] == 5'b00100) && (cnt == 15)) begin
+      osd_buffer[bcnt] <= {sbuf[6:0], sdi};
+      bcnt <= bcnt + 11'd1;
+    end
+  end
 end
 
 // input from video controller
 // vcnt (0..399) / hcnt (0..639)
 
-reg osd_enable;
-reg [7:0] osd_buffer [2047:0];	// the OSD buffer itself
 
 localparam OSD_WIDTH  = 10'd256;
 localparam OSD_HEIGHT = 10'd128;   // pixels are doubled vertically
@@ -501,44 +595,52 @@ localparam OSD_POS_Y  = (V_ACT-OSD_HEIGHT)>>1;
 
 localparam OSD_BORDER  = 10'd2;
 
-wire osd_oe    = osd_enable && (
-	(hcnt >=  OSD_POS_X-OSD_BORDER) &&
-	(hcnt <  (OSD_POS_X + OSD_WIDTH + OSD_BORDER)) &&
-	(vcnt >=  OSD_POS_Y - OSD_BORDER) &&
-	(vcnt <  (OSD_POS_Y + OSD_HEIGHT + OSD_BORDER)));
+assign osd_oe    = osd_enable && (
+  (hcnt >=  OSD_POS_X-OSD_BORDER) &&
+  (hcnt <  (OSD_POS_X + OSD_WIDTH + OSD_BORDER)) &&
+  (vcnt >=  OSD_POS_Y - OSD_BORDER) &&
+  (vcnt <  (OSD_POS_Y + OSD_HEIGHT + OSD_BORDER)));
 
 wire osd_content_area =
-	(hcnt >=  OSD_POS_X) &&
-	(hcnt <  (OSD_POS_X + OSD_WIDTH)) &&
-	(vcnt >=  OSD_POS_Y) &&
-	(vcnt <  (OSD_POS_Y + OSD_HEIGHT));
+  (hcnt >=  OSD_POS_X) &&
+  (hcnt <  (OSD_POS_X + OSD_WIDTH)) &&
+  (vcnt >=  OSD_POS_Y) &&
+  (vcnt <  (OSD_POS_Y + OSD_HEIGHT));
 
 wire [7:0] osd_hcnt = hcnt - OSD_POS_X + 7'd1;  // one pixel offset for osd_byte register
 wire [6:0] osd_vcnt = vcnt - OSD_POS_Y;
-	
-wire osd_pixel = osd_content_area?osd_byte[osd_vcnt[3:1]]:1'b0;
 
-reg [7:0] osd_byte;
+reg [7:0] osd_byte; 
+assign osd_pixel = osd_content_area?osd_byte[osd_vcnt[3:1]]:1'b0;
+
+
 always @(posedge clk)
-	osd_byte <= osd_buffer[{osd_vcnt[6:4], osd_hcnt}];
-	
+  osd_byte <= osd_buffer[{osd_vcnt[6:4], osd_hcnt}];
+  
 endmodule
 
 // generic video timing generator
 module timing (
-	input         	clk,     // 31.875 MHz pixel clock
-	input         	reset,
+  input clk,     // 31.875 MHz pixel clock
+  input video_clk, //Pixel clock frecuency
+  input [3:0] bus_cycle,
+  input reset,
 
-	output border,              // border (incl active area)
+  output border,              // border (incl active area) (Atari clock)
 
-	output reg [9:0]   vcnt,    // vertical pixel counter
-	output reg [9:0]   hcnt,    // horizontal pixel counter
+  output reg [9:0] vcnt,    // vertical pixel counter (Video clock)
+  output reg [9:0] hcnt,    // horizontal pixel counter (Atari clock)
 
-	output vs,              // vertical sync signal
-	output hs,              // horizontal sync signal
-	
-	output vmax,            // max vertical pixel position reached
-	output hmax             // max horizontal pixel position reached
+  output vs,              // vertical sync signal (Video clock)
+  output hs,              // horizontal sync signal (Video clock)
+  
+  output vmax,            // max vertical pixel position reached 
+  output hmax,             // max horizontal pixel position reached
+
+  output pixel_clk, //(pixel clock output)
+  output pixel, //Active when a pixel must be draw (video_clock)
+
+  output reg scanline //Active when a scanline must be draw
 );
 
 localparam H_PRE = 10'd16;
@@ -546,57 +648,116 @@ localparam H_ACT = 10'd640;
 localparam V_ACT = 10'd400;
 
 // default: VESA 640x480x72 timing (2*40 blank lines added)
-// VESA == 31.5 MHz, Atari ST == 32 Mhz, MIST == 31.875MHz
 parameter H_FP  = 10'd24;
 parameter H_S   = 10'd40;
 parameter H_BP  = 10'd128;
-localparam H_TOT = H_ACT + H_FP + H_S + H_BP;
+
 
 parameter V_FP  = 10'd55;
 parameter V_S   = 10'd3;
 parameter V_BP  = 10'd73;
+
+
+parameter H_BORDER = 10'd0; //Horizontal border
+parameter V_BORDER = 10'd40; //Vertical Border
+
+parameter V_OFFSET = 10'd1; //Line Offset
+
+localparam H_TOT = H_BORDER + H_ACT + H_BORDER + H_FP + H_S + H_BP;
 localparam V_TOT = V_ACT + V_FP + V_S + V_BP;
 
+reg [9:0] pxc;
+
 // generate sync pulses
-assign hs = (hcnt >= (H_ACT+H_FP+H_PRE)) && (hcnt < (H_ACT+H_FP+H_S+H_PRE));
-assign vs = (vcnt >= (V_ACT+V_FP)) && (vcnt < (V_ACT+V_FP+V_S));
+assign hs = (pxc >= (H_BORDER+H_ACT+H_BORDER+H_FP)) && (pxc < (H_BORDER+H_ACT+H_BORDER+H_FP+H_S));
+assign vs = (vcnt >= (V_ACT+V_FP+V_OFFSET)) && (vcnt < (V_ACT+V_FP+V_S+V_OFFSET));
 
 // max is not really the max possible position but something "far" behind the
 // visible area to allow for counter resets etc
-assign hmax = (hcnt == H_ACT + H_FP + H_PRE);
-assign vmax = (vcnt == V_ACT + V_FP);
+assign hmax = (hcnt == H_ACT + H_BORDER + H_FP + H_PRE);
+assign vmax = (vcnt == V_ACT + V_BORDER + V_FP);
 
-localparam H_BORDER = 10'd40;
-localparam V_BORDER = 10'd40;
+reg b;
+assign border=b;
 
-// the following only works if H_BORDER > H_PRE
-wire rborder = (hcnt < H_ACT+H_PRE+H_BORDER)  && ((vcnt < V_ACT+V_BORDER)   || (vcnt >= V_TOT-V_BORDER));
-wire lborder = (hcnt >= H_TOT-H_BORDER+H_PRE) && ((vcnt < V_ACT+V_BORDER-1) || (vcnt >= V_TOT-V_BORDER-1));
+assign pixel_clk=video_clk;
+//assign pixel=((pxc>=0 && pxc<H_ACT+H_BORDER) || pxc>H_TOT-H_BORDER) &&;
+assign pixel=(pxc<H_BORDER+H_ACT+H_BORDER) && (vcnt<V_BORDER+V_ACT || vcnt>=V_TOT-V_BORDER);
 
-assign border = lborder || rborder;
-
-always @(posedge clk) begin
-	// ------------ video counters --------------
-	if(reset) begin
-		// using reset here is important to make sure video counters
-		// run synchronous to bus state machine
-		hcnt <= 10'd0;
-		vcnt <= 10'd0;
-	end else begin
-		// horizontal video counter
-		if(hcnt < H_TOT - 10'd1)
-			hcnt <= hcnt + 10'd1;
-		else begin
-			hcnt <= 10'd0;
-			// vertical video counter
-			if(vcnt < V_TOT - 10'd1)
-				vcnt <= vcnt + 10'd1;
-			else begin
-				vcnt <= 10'd0;
-			end
-		end
-	end
+always @(posedge video_clk) begin
+  // ------------ video counters --------------
+  if(reset) begin
+    // using reset here is important to make sure video counters
+    // run synchronous to bus state machine
+    pxc <= 10'd0;
+    vcnt <= 10'd0;
+    scanline <= 1'b0;
+  end else begin
+    // horizontal video counter
+    if(pxc < H_TOT - 10'd1)
+      pxc <= pxc + 10'd1;
+    else begin
+      pxc <= 10'd0;
+      // vertical video counter
+      if(vcnt < V_TOT - 10'd1) begin
+        vcnt <= vcnt + 10'd1;
+        if(vcnt<V_ACT+V_BORDER || vcnt>=V_TOT-V_BORDER) begin
+          scanline<=scanline+1'b1;
+        end
+      end else begin
+        vcnt <= 10'd0;
+        scanline<= 1'b0;
+      end
+    end
+  end
 end
 
+wire reseth=(pxc>=H_TOT-6 || pxc<6); //Sync window between the two clocks
+
+always @(posedge clk) begin
+  if(reset) begin
+    hcnt<=10'd0;
+    b<=1'b1;
+  end else begin
+    if(reseth && bus_cycle==4'b0100) begin //b0100 is the magic value for sync
+      hcnt<=10'b0-H_BORDER;
+    end else begin
+      if(hcnt==H_ACT+H_BORDER+H_PRE) begin
+        b<=1'b0;
+      end
+      
+      if(hcnt==((10'b0-H_BORDER)+H_PRE)) begin
+        b<=1'b1;
+      end
+
+      hcnt<=hcnt+10'd1;
+    end
+  end
+end
+
+endmodule
+
+//Dual clock ram.
+module dram(
+  input rClk,
+  input wClk,
+  input w,
+  input [11:0] rA,
+  input [11:0] wA,
+  input [17:0] wD,
+  output reg [17:0] D
+);
+
+reg [17:0] mem [2047:0];
+
+always @(posedge wClk) begin
+  if(w) begin
+    mem[wA]<=wD;
+  end
+end
+
+always @(posedge rClk) begin
+  D<=mem[rA];
+end
 
 endmodule
\ No newline at end of file