From c6dcd407408eacb3d59813e861da835f11dd65e6 Mon Sep 17 00:00:00 2001 From: Gyorgy Szombathelyi Date: Fri, 13 Dec 2019 18:13:29 +0100 Subject: [PATCH] C64: update .sdc --- cores/c64/C64_mist.sdc | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/cores/c64/C64_mist.sdc b/cores/c64/C64_mist.sdc index 6d8da58..889af13 100644 --- a/cores/c64/C64_mist.sdc +++ b/cores/c64/C64_mist.sdc @@ -43,14 +43,11 @@ set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|cl set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min -5 [get_ports {VGA_*}] # SDRAM delays -set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 6.4 [get_ports SDRAM_DQ[*]] -set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min 3.2 [get_ports SDRAM_DQ[*]] +set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -max 6.4 [get_ports SDRAM_DQ[*]] +set_input_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -min 3.2 [get_ports SDRAM_DQ[*]] -set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] -set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] - -set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -max 1.5 [get_ports {SDRAM_CLK}] -set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -min -0.8 [get_ports {SDRAM_CLK}] +set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -max 1.5 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] +set_output_delay -clock [get_clocks {pll|altpll_component|auto_generated|pll1|clk[0]}] -reference_pin [get_ports {SDRAM_CLK}] -min -0.8 [get_ports {SDRAM_D* SDRAM_A* SDRAM_BA* SDRAM_n* SDRAM_CKE}] set_multicycle_path -from {video_mixer:vmixer|scandoubler:scandoubler|Hq2x:Hq2x|*} -setup 4 set_multicycle_path -from {video_mixer:vmixer|scandoubler:scandoubler|Hq2x:Hq2x|*} -hold 3 @@ -58,6 +55,7 @@ set_multicycle_path -from {video_mixer:vmixer|scandoubler:scandoubler|Hq2x:Hq2x| set_multicycle_path -to {VGA_*[*]} -setup 4 set_multicycle_path -to {VGA_*[*]} -hold 3 +set_false_path -to [get_ports {SDRAM_CLK}] set_false_path -from [get_ports {UART_RX}] set_false_path -to [get_ports {UART_TX}] set_false_path -to [get_ports {AUDIO_L}]