From ddb5bedd54470739d4b2a6a0485eff9686c86f7c Mon Sep 17 00:00:00 2001 From: Till Harbaum Date: Tue, 17 Nov 2015 21:59:13 +0100 Subject: [PATCH] [PLUS TOO] Initial SCSI implementation --- cores/plus_too/addrController_top.v | 97 ++-- cores/plus_too/addrDecoder.v | 56 +- cores/plus_too/dataController_top.v | 72 ++- cores/plus_too/floppy.v | 10 +- cores/plus_too/floppy_track_encoder.v | 3 - cores/plus_too/ncr5380.v | 277 ++++++++++ cores/plus_too/pll.v | 44 +- cores/plus_too/plusToo_top.qsf | 740 +++++++++++++------------- cores/plus_too/plusToo_top.v | 99 ++-- cores/plus_too/scsi.v | 379 +++++++++++++ 10 files changed, 1243 insertions(+), 534 deletions(-) create mode 100644 cores/plus_too/ncr5380.v create mode 100644 cores/plus_too/scsi.v diff --git a/cores/plus_too/addrController_top.v b/cores/plus_too/addrController_top.v index 1224dec..854460e 100644 --- a/cores/plus_too/addrController_top.v +++ b/cores/plus_too/addrController_top.v @@ -8,11 +8,9 @@ module addrController_top( // 68000 CPU memory interface: input [23:0] cpuAddr, - input _cpuAS, input _cpuUDS, input _cpuLDS, input _cpuRW, - output _cpuDTACK, // RAM/ROM: output [21:0] memoryAddr, @@ -23,8 +21,10 @@ module addrController_top( output _ramWE, output videoBusControl, output dioBusControl, + output cpuBusControl, // peripherals: + output selectSCSI, output selectSCC, output selectIWM, output selectVIA, @@ -52,7 +52,7 @@ module addrController_top( // -------------- audio engine (may be moved into seperate module) --------------- assign loadSound = sndReadAck; - localparam SIZE = 20'd67704; // 168*608/2 clk8 events per frame + localparam SIZE = 20'd135408; // 168*806 clk8 events per frame localparam STEP = 20'd5920; // one step every 16*370 clk8 events reg [21:0] audioAddr; @@ -86,22 +86,41 @@ module addrController_top( // interleaved RAM access for CPU and video reg [1:0] busCycle; + reg [1:0] extra_slot_count; + reg [1:0] subCycle; + always @(posedge clk8) busCycle <= busCycle + 2'd1; + + reg extra_slot_advance; + always @(negedge clk8) + extra_slot_advance <= (busCycle == 2'b11); + // allocate memory slots in the extra cycle + always @(posedge clk8) begin + if(extra_slot_advance) begin + extra_slot_count <= extra_slot_count + 2'd1; + + // the subcycle counter counts 0-1-2-0-1-2 and is used to give + // the cpu 2 out of three bus cycles for a speed close to a real mac + + // Update: Counter now runs 0-1-2-3-0-1-2... so the CPU runs 3 out of + // 4 cycles. Making it slower (e.g. 2/3) will cause the floppy ot stop + // working reliably. Making it faster will cause scsi to stop working ... + + // if(subCycle == 2'd2) subCycle <= 2'd0; + // else + subCycle <= subCycle + 2'd1; + end + end + // video controls memory bus during the first clock of the four-clock cycle assign videoBusControl = (busCycle == 2'b00); // cpu controls memory bus during the third clock of the four-clock cycle - wire cpuBusControl = (busCycle == 2'b10); - + assign cpuBusControl = (busCycle == 2'b10) && (subCycle != 2'd2); // wire extraBusControl = (busCycle == 2'b01); - - // DTACK generation - // TODO: delay DTACK for once full bus cycle when RAM is accessed, to match Mac Plus memory timing - // TODO: according to datasheet, /DTACK should continue to be asserted through the final bus cycle too - assign _cpuDTACK = ~(_cpuAS == 1'b0 && cpuBusControl); - + // interconnects wire selectRAM, selectROM; wire [21:0] videoAddr; @@ -110,12 +129,12 @@ module addrController_top( wire videoControlActive = _hblank; wire extraRomRead = dskReadAckInt || dskReadAckExt; - assign _romOE = ~(extraRomRead || (cpuBusControl && selectROM == 1'b1 && _cpuRW == 1'b1)); + assign _romOE = ~(extraRomRead || (cpuBusControl && selectROM && _cpuRW)); wire extraRamRead = sndReadAck; - assign _ramOE = ~((videoBusControl && videoControlActive == 1'b1) || (extraRamRead) || - (cpuBusControl && selectRAM == 1'b1 && _cpuRW == 1'b1)); - assign _ramWE = ~(cpuBusControl && selectRAM && _cpuRW == 1'b0); + assign _ramOE = ~((videoBusControl && videoControlActive) || (extraRamRead) || + (cpuBusControl && selectRAM && _cpuRW)); + assign _ramWE = ~(cpuBusControl && selectRAM && !_cpuRW); assign _memoryUDS = cpuBusControl ? _cpuUDS : 1'b0; assign _memoryLDS = cpuBusControl ? _cpuLDS : 1'b0; @@ -147,11 +166,6 @@ module addrController_top( rom_access ? 1'b0 : // force A21 to 0 for ROM access addrMux[21]; - // allocate memory slots in the extra cycle - reg [2:0] extra_slot_count; - always @(posedge clk8) - if(busCycle == 2'b11) - extra_slot_count <= extra_slot_count + 2'd1; // floppy emulation gets extra slots 0 and 1 assign dskReadAckInt = (extraBusControl == 1'b1) && (extra_slot_count == 0); @@ -165,49 +179,16 @@ module addrController_top( macAddr; // address decoding - wire selectSCCByAddress; - wire selectIWMByAddress; - wire selectVIAByAddress; addrDecoder ad( .address(cpuAddr), - .enable(!videoBusControl), - ._cpuAS(_cpuAS), .memoryOverlayOn(memoryOverlayOn), .selectRAM(selectRAM), .selectROM(selectROM), - .selectSCC(selectSCCByAddress), - .selectIWM(selectIWMByAddress), - .selectVIA(selectVIAByAddress)); - - /* TH: The following isn't 100% true anymore but kept for now for documentation purposes ... - - SCC register access is a mess. Reads and writes can have side-effects that alter the meaning of subsequent reads - and writes to the same address. It's not safe to do multiple reads of the same address, or multiple writes of the - same value to the same address. So we need to be sure we only perform one read or write per 4-clock CPU bus cycle. - - To complicate things, the CPU latches read data half-way through the last clock of the cycle, then deasserts the - address, address strobe, and data for the remainder of the cycle (although RW remains valid). This behavior may - be specified to TG68 and not shared by the real 68000. - - For writes to the SCC, we enable SCC only on clock 2, to guarantee one write per bus cycle. - - For reads, it's more difficult. If we enable SCC only on clock 2, then it won't be enabled during clock 3 when the - CPU latches the data, so the read will fail. If we enable it only on clock 3, then the AS won't be asserted all - the way to the end of the clock, so the read side-effect will fail. If we enable it on clock 2 and 3, then the - CPU will read the post-side-effect value instead of the pre-side-effect value. - - The solution used here is to enable reads on clock 2 (when the side-effect is performed), and for the first half - of clock 3, and to apply a one cycle delay to CPU data reads from the SCC. Reads only enable for the first half - of clock 3 in case a later 68000 variant continues to assert AS all the way to the end of the clock, to ensure - side-effects are not applied again. - - Another solution would be to create a custom clock for the SCC, whose positive edge is the negative edge of - clock 3 of the bus cycle. - */ - assign selectSCC = selectSCCByAddress && cpuBusControl; - assign selectIWM = selectIWMByAddress && cpuBusControl; - assign selectVIA = selectVIAByAddress && cpuBusControl; - + .selectSCSI(selectSCSI), + .selectSCC(selectSCC), + .selectIWM(selectIWM), + .selectVIA(selectVIA)); + // video videoTimer vt( .clk8(clk8), diff --git a/cores/plus_too/addrDecoder.v b/cores/plus_too/addrDecoder.v index e889275..41d6083 100644 --- a/cores/plus_too/addrDecoder.v +++ b/cores/plus_too/addrDecoder.v @@ -81,11 +81,10 @@ module addrDecoder( input [23:0] address, - input enable, - input _cpuAS, input memoryOverlayOn, output reg selectRAM, output reg selectROM, + output reg selectSCSI, output reg selectSCC, output reg selectIWM, output reg selectVIA @@ -94,37 +93,40 @@ module addrDecoder( always @(*) begin selectRAM = 0; selectROM = 0; + selectSCSI = 0; selectSCC = 0; selectIWM = 0; selectVIA = 0; - if (_cpuAS == 0 && enable == 1'b1) begin - casez (address[23:20]) - 4'b00??: begin - if (memoryOverlayOn == 0) - selectRAM = 1'b1; - else begin - if (address[23:20] == 0) begin - // Mac Plus: repeated images of overlay ROM only extend to $0F0000 - // Mac 512K: more repeated ROM images at $020000-$02FFFF - selectROM = 1'b1; - end + casez (address[23:20]) + 4'b00??: begin + if (memoryOverlayOn == 0) + selectRAM = 1'b1; + else begin + if (address[23:20] == 0) begin + // Mac Plus: repeated images of overlay ROM only extend to $0F0000 + // Mac 512K: more repeated ROM images at $020000-$02FFFF + selectROM = 1'b1; end end - 4'b0100: + end + 4'b0100: + if( address[17] == 1'b0) // <- this detects SCSI!!! selectROM = 1'b1; - 4'b0110: - if (memoryOverlayOn) - selectRAM = 1'b1; - 4'b10?1: - selectSCC = 1'b1; - 4'b1101: - selectIWM = 1'b1; - 4'b1110: - selectVIA = 1'b1; - default: - ; // select nothing - endcase - end + 4'b0101: + if (address[19:12] == 8'h80) + selectSCSI = 1'b1; + 4'b0110: + if (memoryOverlayOn) + selectRAM = 1'b1; + 4'b10?1: + selectSCC = 1'b1; + 4'b1101: + selectIWM = 1'b1; + 4'b1110: + selectVIA = 1'b1; + default: + ; // select nothing + endcase end endmodule diff --git a/cores/plus_too/dataController_top.v b/cores/plus_too/dataController_top.v index 8042c89..5eab83f 100644 --- a/cores/plus_too/dataController_top.v +++ b/cores/plus_too/dataController_top.v @@ -13,6 +13,7 @@ module dataController_top( // 68000 CPU memory interface: input [15:0] cpuDataIn, input [3:0] cpuAddrRegHi, // A12-A9 + input [2:0] cpuAddrRegMid, // A6-A4 input [1:0] cpuAddrRegLo, // A2-A1 input _cpuUDS, input _cpuLDS, @@ -20,25 +21,27 @@ module dataController_top( output [15:0] cpuDataOut, // peripherals: + input selectSCSI, input selectSCC, input selectIWM, input selectVIA, // RAM/ROM: input videoBusControl, + input cpuBusControl, input [15:0] memoryDataIn, output [15:0] memoryDataOut, // keyboard: - input keyClk, // need pull-up - input keyData, // need pull-up + input keyClk, + input keyData, // mouse: - input mouseClk, // need pull-up - input mouseData, // need pull-up + input mouseClk, + input mouseData, // serial: - input serialIn, // need pull-up + input serialIn, output serialOut, // video: @@ -61,7 +64,17 @@ module dataController_top( output [21:0] dskReadAddrInt, input dskReadAckInt, output [21:0] dskReadAddrExt, - input dskReadAckExt + input dskReadAckExt, + + // connections to io controller + output [31:0] io_lba, + output io_rd, + output io_wr, + input io_ack, + input [7:0] io_din, + input io_din_strobe, + output [7:0] io_dout, + input io_dout_strobe ); // add binary volume levels according to volume setting @@ -70,27 +83,28 @@ module dataController_top( (snd_vol[1]?audio_x2:11'd0) + (snd_vol[2]?audio_x4:11'd0); - // three binary volume levels *1, *2 and *4 - wire [10:0] audio_x1 = { 3'b000, audio_latch }; - wire [10:0] audio_x2 = { 2'b00, audio_latch, 1'b0 }; - wire [10:0] audio_x4 = { 1'b0, audio_latch, 2'b00}; + // three binary volume levels *1, *2 and *4, sign expanded + wire [10:0] audio_x1 = { {3{audio_latch[7]}}, audio_latch }; + wire [10:0] audio_x2 = { {2{audio_latch[7]}}, audio_latch, 1'b0 }; + wire [10:0] audio_x4 = { audio_latch[7] , audio_latch, 2'b00}; reg loadSoundD; always @(negedge clk8) loadSoundD <= loadSound; + // read audio data and convert to signed for further volume adjustment reg [7:0] audio_latch; always @(posedge clk8) begin if(loadSoundD) begin - if(snd_ena) audio_latch <= 8'h80; - else audio_latch <= memoryDataIn[15:8]; + if(snd_ena) audio_latch <= 8'h00; + else audio_latch <= memoryDataIn[15:8] - 8'd128; end end // divide 32.5 MHz clock by four to get CPU clock reg [1:0] clkPhase; always @(posedge clk32) - clkPhase <= clkPhase + 1'b1; + clkPhase <= clkPhase + 2'd1; assign clk8 = clkPhase[1]; // CPU reset generation @@ -119,6 +133,7 @@ module dataController_top( wire [15:0] viaDataOut; wire [15:0] iwmDataOut; wire [7:0] sccDataOut; + wire [7:0] scsiDataOut; wire mouseX1, mouseX2, mouseY1, mouseY2, mouseButton; // interrupt control @@ -134,20 +149,43 @@ module dataController_top( assign cpuDataOut = selectIWM ? iwmDataOut : selectVIA ? viaDataOut : selectSCC ? { sccDataOut, 8'hEF } : + selectSCSI ? { scsiDataOut, 8'hEF } : memoryDataIn; // Memory-side assign memoryDataOut = cpuDataIn; + // SCSI + ncr5380 scsi( + .sysclk(clk8), + .reset(!_cpuReset), + .bus_cs(selectSCSI && cpuBusControl), + .bus_we(!_cpuRW), + .bus_rs(cpuAddrRegMid), + .dack(cpuAddrRegHi[0]), // A9 + .wdata(cpuDataIn[15:8]), + .rdata(scsiDataOut), + + // connections to io controller + .io_lba ( io_lba ), + .io_rd ( io_rd ), + .io_wr ( io_wr ), + .io_ack ( io_ack ), + .io_din ( io_din ), + .io_din_strobe ( io_din_strobe ), + .io_dout ( io_dout ), + .io_dout_strobe ( io_dout_strobe ) + ); + + // VIA wire [2:0] snd_vol; wire snd_ena; - // VIA via v( .clk8(clk8), ._reset(_cpuReset), - .selectVIA(selectVIA), + .selectVIA(selectVIA && cpuBusControl), ._cpuRW(_cpuRW), ._cpuUDS(_cpuUDS), .dataIn(cpuDataIn), @@ -177,7 +215,7 @@ module dataController_top( iwm i( .clk8(clk8), ._reset(_cpuReset), - .selectIWM(selectIWM), + .selectIWM(selectIWM && cpuBusControl), ._cpuRW(_cpuRW), ._cpuLDS(_cpuLDS), .dataIn(cpuDataIn), @@ -199,7 +237,7 @@ module dataController_top( scc s( .sysclk(clk8), .reset_hw(~_cpuReset), - .cs(selectSCC && (_cpuLDS == 1'b0 || _cpuUDS == 1'b0)), + .cs(selectSCC && (_cpuLDS == 1'b0 || _cpuUDS == 1'b0) && cpuBusControl), .we(!_cpuRW), .rs(cpuAddrRegLo), .wdata(cpuDataIn[15:8]), diff --git a/cores/plus_too/floppy.v b/cores/plus_too/floppy.v index bb9fcc5..c0b2e61 100644 --- a/cores/plus_too/floppy.v +++ b/cores/plus_too/floppy.v @@ -115,12 +115,7 @@ module floppy( always @(posedge clk8) if(dskReadAckD) dskReadDataLatch <= dskReadData; - - // generate glitch free data clock - reg data_clock; - always @(posedge clk8) - data_clock <= (diskDataByteTimer == 0); - + wire [7:0] dskReadDataEnc; // include track encoder @@ -207,8 +202,7 @@ module floppy( wire lstrbEdge = lstrb == 1'b0 && lstrbPrev == 1'b1; - assign readData = _enable == 1'b1 ? 8'hZZ : - (driveReadAddr == `DRIVE_REG_RDDATA0 || driveReadAddr == `DRIVE_REG_RDDATA1) ? diskDataIn : + assign readData = (driveReadAddr == `DRIVE_REG_RDDATA0 || driveReadAddr == `DRIVE_REG_RDDATA1) ? diskDataIn : { driveRegsAsRead[driveReadAddr], 7'h00 }; // write drive registers diff --git a/cores/plus_too/floppy_track_encoder.v b/cores/plus_too/floppy_track_encoder.v index aadfa4a..6deb8f4 100644 --- a/cores/plus_too/floppy_track_encoder.v +++ b/cores/plus_too/floppy_track_encoder.v @@ -152,9 +152,6 @@ assign addr = (count == 2)?8'had: sony_to_disk_byte; - wire [7:0] odata_dsum = - sony_to_disk_byte; - wire [7:0] odata_dtrl = (count == 0)?8'hde: (count == 1)?8'haa: diff --git a/cores/plus_too/ncr5380.v b/cores/plus_too/ncr5380.v new file mode 100644 index 0000000..55bbd30 --- /dev/null +++ b/cores/plus_too/ncr5380.v @@ -0,0 +1,277 @@ +/* verilator lint_off UNUSED */ + +/* based on minimigmac by Benjamin Herrenschmidt */ + +/* Read registers */ +`define RREG_CDR 3'h0 /* Current SCSI data */ +`define RREG_ICR 3'h1 /* Initiator Command */ +`define RREG_MR 3'h2 /* Mode register */ +`define RREG_TCR 3'h3 /* Target Command */ +`define RREG_CSR 3'h4 /* SCSI bus status */ +`define RREG_BSR 3'h5 /* Bus and status */ +`define RREG_IDR 3'h6 /* Input data */ +`define RREG_RST 3'h7 /* Reset */ + +/* Write registers */ +`define WREG_ODR 3'h0 /* Ouptut data */ +`define WREG_ICR 3'h1 /* Initiator Command */ +`define WREG_MR 3'h2 /* Mode register */ +`define WREG_TCR 3'h3 /* Target Command */ +`define WREG_SER 3'h4 /* Select Enable */ +`define WREG_DMAS 3'h5 /* Start DMA Send */ +`define WREG_DMATR 3'h6 /* Start DMA Target receive */ +`define WREG_IDMAR 3'h7 /* Start DMA Initiator receive */ + +/* MR bit numbers */ +`define MR_DMA_MODE 1 +`define MR_ARB 0 + +/* ICR bit numbers */ +`define ICR_A_RST 7 +`define ICR_TEST_MODE 6 +`define ICR_DIFF_ENBL 5 +`define ICR_A_ACK 4 +`define ICR_A_BSY 3 +`define ICR_A_SEL 2 +`define ICR_A_ATN 1 +`define ICR_A_DATA 0 + +/* TCR bit numbers */ +`define TCR_A_REQ 3 +`define TCR_A_MSG 2 +`define TCR_A_CD 1 +`define TCR_A_IO 0 + +module ncr5380(input sysclk, + input reset, + + /* Bus interface. 3-bit address, to be wired + * appropriately upstream (to A4..A6) plus one + * more bit (A9) wired as dack. + */ + input bus_cs, + input bus_we, + input [2:0] bus_rs, + input dack, + input [7:0] wdata, + output [7:0] rdata, + + + // connections to io controller + output [31:0] io_lba, + output io_rd, + output io_wr, + input io_ack, + output [7:0] io_dout, + input io_dout_strobe, + input [7:0] io_din, + input io_din_strobe + ); + + reg [7:0] mr; /* Mode Register */ + reg [7:0] icr; /* Initiator Command Register */ + reg [3:0] tcr; /* Target Command Register */ + wire [7:0] csr; /* SCSI bus status register */ + + /* Data in and out latches and associated + * control logic for DMA + */ + wire [7:0] din; + reg [7:0] dout; + reg dphase; + reg dma_en; + + /* --- Main host-side interface --- */ + + /* Register & DMA accesses decodes */ + wire dma_rd = bus_cs & dack & ~bus_we; + wire dma_wr = bus_cs & dack & bus_we; + wire reg_rd = bus_cs & ~dack & ~bus_we; + wire reg_wr = bus_cs & ~dack & bus_we; + + /* System bus reads */ + assign rdata = dack ? cur_data : + bus_rs == `RREG_CDR ? cur_data : + bus_rs == `RREG_ICR ? icr_read : + bus_rs == `RREG_MR ? mr : + bus_rs == `RREG_TCR ? { 4'h0, tcr } : + bus_rs == `RREG_CSR ? csr : + bus_rs == `RREG_BSR ? bsr : + bus_rs == `RREG_IDR ? cur_data : + bus_rs == `RREG_RST ? 8'hff : + 8'hff; + + /* DMA handhsaking logic. Two phase logic, in phase 0 + * DRQ follows SCSI _REQ until we see DACK. In phase 1 + * we just wait for SCSI _REQ to go down and go back to + * phase 0. We assert SCSI _ACK in phase 1. + */ + always@(negedge sysclk or posedge reset) begin + if (reset) begin + dphase <= 0; + end else begin + if (!dma_en) begin + dphase <= 0; + end else if (dphase == 0) begin + /* Be careful to do that in bus phase 1, + * not phase 0, or we would incorrectly + * assert bus_hold and lock up the system + */ + if ((dma_rd || dma_wr) && scsi_req) begin + dphase <= 1; + end + end else if (!scsi_req) begin + dphase <= 0; + end + end + end + + /* Data out latch (in DMA mode, this is one cycle after we've + * asserted ACK) + */ + always@(negedge sysclk) + if ((reg_wr && bus_rs == `WREG_ODR) || dma_wr) + dout <= wdata; + + /* Current data register. Simplified logic: We loop back the + * output data if we are asserting the bus, else we get the + * input latch + */ + wire [7:0] cur_data = out_en ? dout : din; + + /* Logic for "asserting the bus" simplified */ + wire out_en = icr[`ICR_A_DATA] | mr[`MR_ARB]; + + /* ICR read wires */ + wire [7:0] icr_read = { icr[`ICR_A_RST], + icr_aip, + icr_la, + icr[`ICR_A_ACK], + icr[`ICR_A_BSY], + icr[`ICR_A_SEL], + icr[`ICR_A_ATN], + icr[`ICR_A_DATA] }; + + /* ICR write */ + always@(negedge sysclk or posedge reset) begin + if (reset) begin + icr <= 0; + end else if (reg_wr && (bus_rs == `WREG_ICR)) begin + icr <= wdata; + end + end + + /* MR write */ + always@(negedge sysclk or posedge reset) begin + if (reset) + mr <= 8'b0; + else if (reg_wr && (bus_rs == `WREG_MR)) + mr <= wdata; + end + + /* TCR write */ + always@(negedge sysclk or posedge reset) begin + if (reset) + tcr <= 4'b0; + else if (reg_wr && (bus_rs == `WREG_TCR)) + tcr <= wdata[3:0]; + end + + /* DMA start send & receive registers. We currently ignore + * the direction. + */ + always@(negedge sysclk or posedge reset) begin + if (reset) begin + dma_en <= 0; + end else begin + if (!mr[`MR_DMA_MODE]) begin + dma_en <= 0; + end else if (reg_wr && (bus_rs == `WREG_DMAS)) begin + dma_en <= 1; + end else if (reg_wr && (bus_rs == `WREG_IDMAR)) begin + dma_en <= 1; + end + end + end + + /* CSR (read only). We don't do parity */ + assign csr = { scsi_rst, scsi_bsy, scsi_req, scsi_msg, + scsi_cd, scsi_io, scsi_sel, 1'b0 }; + + /* Bus and Status register */ + /* BSR (read only). We don't do a few things... */ + wire bsr_eodma = 1'b0; /* We don't do EOP */ + wire bsr_dmarq = scsi_req & ~dphase & dma_en; + wire bsr_perr = 1'b0; /* We don't do parity */ + wire bsr_irq = 1'b0; /* XXX ? Does MacOS use this ? */ + wire bsr_pmatch = + tcr[`TCR_A_MSG] == scsi_msg && + tcr[`TCR_A_CD ] == scsi_cd && + tcr[`TCR_A_IO ] == scsi_io; + + wire bsr_berr = 1'b0; /* XXX ? Does MacOS use this ? */ + wire [7:0] bsr = { bsr_eodma, bsr_dmarq, bsr_perr, bsr_irq, + bsr_pmatch, bsr_berr, scsi_atn, scsi_ack }; + + /* --- Simulated SCSI Signals --- */ + + /* BSY logic (simplified arbitration, see notes) */ + wire scsi_bsy = + icr[`ICR_A_BSY] | + scsi2_bsy | + mr[`MR_ARB]; + + /* Remains of simplified arbitration logic */ + wire icr_aip = mr[`MR_ARB]; + wire icr_la = 0; + + reg dma_ack; + always @(posedge sysclk) + dma_ack <= dphase; + + /* Other ORed SCSI signals */ + wire scsi_sel = icr[`ICR_A_SEL]; + wire scsi_rst = icr[`ICR_A_RST]; + wire scsi_ack = icr[`ICR_A_ACK] | dma_ack; + wire scsi_atn = icr[`ICR_A_ATN]; + + /* Other trivial lines set by target */ + wire scsi_cd = scsi2_cd; + wire scsi_io = scsi2_io; + wire scsi_msg = scsi2_msg; + wire scsi_req = scsi2_req; + + assign din = scsi2_bsy?scsi2_dout:8'h55; + + // input signals from target 2 + wire scsi2_bsy, scsi2_msg, scsi2_io, scsi2_cd, scsi2_req; + wire [7:0] scsi2_dout; + + // connect a target + scsi #(.ID(2)) scsi2(.sysclk ( sysclk ), + .rst ( scsi_rst ), + .sel ( scsi_sel ), + .atn ( scsi_atn ), + .bsy ( scsi2_bsy ), + .msg ( scsi2_msg ), + .cd ( scsi2_cd ), + .io ( scsi2_io ), + .req ( scsi2_req ), + .ack ( scsi_ack ), + .dout ( scsi2_dout ), + .din ( dout ), + + // connection to io controller to read and write sectors + // to sd card + .io_lba ( io_lba ), + .io_rd ( io_rd ), + .io_wr ( io_wr ), + .io_ack ( io_ack ), + .io_dout ( io_dout ), + .io_dout_strobe ( io_dout_strobe ), + .io_din ( io_din ), + .io_din_strobe ( io_din_strobe ) + ); + + +endmodule diff --git a/cores/plus_too/pll.v b/cores/plus_too/pll.v index 44cfaa9..cb441c4 100644 --- a/cores/plus_too/pll.v +++ b/cores/plus_too/pll.v @@ -39,23 +39,27 @@ module pll ( inclk0, c0, + c1, locked); input inclk0; output c0; + output c1; output locked; wire [4:0] sub_wire0; wire sub_wire2; - wire [0:0] sub_wire5 = 1'h0; - wire [0:0] sub_wire1 = sub_wire0[0:0]; - wire c0 = sub_wire1; + wire [0:0] sub_wire6 = 1'h0; + wire [0:0] sub_wire3 = sub_wire0[0:0]; + wire [1:1] sub_wire1 = sub_wire0[1:1]; + wire c1 = sub_wire1; wire locked = sub_wire2; - wire sub_wire3 = inclk0; - wire [1:0] sub_wire4 = {sub_wire5, sub_wire3}; + wire c0 = sub_wire3; + wire sub_wire4 = inclk0; + wire [1:0] sub_wire5 = {sub_wire6, sub_wire4}; altpll altpll_component ( - .inclk (sub_wire4), + .inclk (sub_wire5), .clk (sub_wire0), .locked (sub_wire2), .activeclock (), @@ -98,6 +102,10 @@ module pll ( altpll_component.clk0_duty_cycle = 50, altpll_component.clk0_multiply_by = 65, altpll_component.clk0_phase_shift = "0", + altpll_component.clk1_divide_by = 27, + altpll_component.clk1_duty_cycle = 50, + altpll_component.clk1_multiply_by = 65, + altpll_component.clk1_phase_shift = "-2500", altpll_component.compensate_clock = "CLK0", altpll_component.inclk0_input_frequency = 37037, altpll_component.intended_device_family = "Cyclone III", @@ -131,7 +139,7 @@ module pll ( altpll_component.port_scanread = "PORT_UNUSED", altpll_component.port_scanwrite = "PORT_UNUSED", altpll_component.port_clk0 = "PORT_USED", - altpll_component.port_clk1 = "PORT_UNUSED", + altpll_component.port_clk1 = "PORT_USED", altpll_component.port_clk2 = "PORT_UNUSED", altpll_component.port_clk3 = "PORT_UNUSED", altpll_component.port_clk4 = "PORT_UNUSED", @@ -172,8 +180,11 @@ endmodule // Retrieval info: PRIVATE: CUR_FBIN_CLK STRING "c0" // Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8" // Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1" // Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000" +// Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000" // Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "65.000000" +// Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "65.000000" // Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0" // Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0" // Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1" @@ -194,18 +205,26 @@ endmodule // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE STRING "Not Available" // Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0" // Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "ps" // Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any" // Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0" +// Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0" // Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "1" +// Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "1" // Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1" // Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "65.00000000" +// Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "65.00000000" // Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "1" +// Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "1" // Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz" +// Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz" // Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000" +// Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "-2500.00000000" // Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0" // Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg" +// Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "ps" // Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "0" // Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1" @@ -228,11 +247,14 @@ endmodule // Retrieval info: PRIVATE: SPREAD_USE STRING "0" // Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0" // Retrieval info: PRIVATE: STICKY_CLK0 STRING "1" +// Retrieval info: PRIVATE: STICKY_CLK1 STRING "1" // Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1" // Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1" // Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0" // Retrieval info: PRIVATE: USE_CLK0 STRING "1" +// Retrieval info: PRIVATE: USE_CLK1 STRING "1" // Retrieval info: PRIVATE: USE_CLKENA0 STRING "0" +// Retrieval info: PRIVATE: USE_CLKENA1 STRING "0" // Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0" // Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0" // Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all @@ -241,6 +263,10 @@ endmodule // Retrieval info: CONSTANT: CLK0_DUTY_CYCLE NUMERIC "50" // Retrieval info: CONSTANT: CLK0_MULTIPLY_BY NUMERIC "65" // Retrieval info: CONSTANT: CLK0_PHASE_SHIFT STRING "0" +// Retrieval info: CONSTANT: CLK1_DIVIDE_BY NUMERIC "27" +// Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50" +// Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "65" +// Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "-2500" // Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0" // Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "37037" // Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III" @@ -273,7 +299,7 @@ endmodule // Retrieval info: CONSTANT: PORT_SCANREAD STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED" -// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_UNUSED" +// Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED" // Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED" // Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED" @@ -292,11 +318,13 @@ endmodule // Retrieval info: CONSTANT: WIDTH_CLOCK NUMERIC "5" // Retrieval info: USED_PORT: @clk 0 0 5 0 OUTPUT_CLK_EXT VCC "@clk[4..0]" // Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0" +// Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1" // Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0" // Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked" // Retrieval info: CONNECT: @inclk 0 0 1 1 GND 0 0 0 0 // Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0 // Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0 +// Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1 // Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0 // Retrieval info: GEN_FILE: TYPE_NORMAL pll.v TRUE // Retrieval info: GEN_FILE: TYPE_NORMAL pll.ppf TRUE diff --git a/cores/plus_too/plusToo_top.qsf b/cores/plus_too/plusToo_top.qsf index 4da4991..ce32bd5 100644 --- a/cores/plus_too/plusToo_top.qsf +++ b/cores/plus_too/plusToo_top.qsf @@ -237,8 +237,8 @@ set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[13] set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[14] set_instance_assignment -name FAST_INPUT_REGISTER ON -to SDRAM_DQ[15] -set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_8 -set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_128 +set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk8 +set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk64 set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SDRAM_CLK set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to SPI_SCK set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_A[0] @@ -281,7 +281,7 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_nCS set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CKE set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to SDRAM_CLK -set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk_32 +set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk32 set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_R[5] set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to VGA_R[4] @@ -339,7 +339,6 @@ set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to UART_RX set_global_assignment -name SLD_NODE_CREATOR_ID 110 -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_ENTITY_NAME sld_signaltap -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "pll:cs0|c0" -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[0] -to "TG68:m68k|data_in[0]" -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[1] -to "TG68:m68k|data_in[10]" -section_id auto_signaltap_0 set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[2] -to "TG68:m68k|data_in[11]" -section_id auto_signaltap_0 @@ -540,22 +539,8 @@ set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_IN_ENABLE set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ADVANCED_TRIGGER_ENTITY=basic,1," -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_LEVEL_PIPELINE=1" -section_id auto_signaltap_0 set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_ENABLE_ADVANCED_TRIGGER=0" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "addrController_top:ac0|_hblank" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "addrController_top:ac0|_memoryLDS" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "addrController_top:ac0|_memoryUDS" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "addrController_top:ac0|_hblank" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "addrController_top:ac0|_memoryLDS" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "addrController_top:ac0|_memoryUDS" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=128" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=128" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "addrController_top:ac0|_ramOE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "addrController_top:ac0|_ramWE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "addrController_top:ac0|_romOE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "addrController_top:ac0|_vblank" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "addrController_top:ac0|_ramOE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "addrController_top:ac0|_ramWE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "addrController_top:ac0|_romOE" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "addrController_top:ac0|_vblank" -section_id auto_signaltap_0 +set_global_assignment -name VERILOG_FILE scsi.v +set_global_assignment -name VERILOG_FILE ncr5380.v set_global_assignment -name VERILOG_FILE sigma_delta_dac.v set_global_assignment -name VERILOG_FILE floppy_track_encoder.v set_global_assignment -name VERILOG_FILE ps2_kbd.v @@ -581,367 +566,358 @@ set_global_assignment -name VERILOG_FILE plusToo_top.v set_global_assignment -name VERILOG_FILE floppy.v set_global_assignment -name SIGNALTAP_FILE stp1.stp set_global_assignment -name QIP_FILE pll.qip -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "addrController_top:ac0|audioAddr[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "addrController_top:ac0|audioAddr[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "addrController_top:ac0|audioAddr[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "addrController_top:ac0|audioAddr[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "addrController_top:ac0|audioAddr[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "addrController_top:ac0|audioAddr[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "addrController_top:ac0|audioAddr[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "addrController_top:ac0|audioAddr[16]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "addrController_top:ac0|audioAddr[17]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "addrController_top:ac0|audioAddr[18]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "addrController_top:ac0|audioAddr[19]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "addrController_top:ac0|audioAddr[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "addrController_top:ac0|audioAddr[20]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "addrController_top:ac0|audioAddr[21]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "addrController_top:ac0|audioAddr[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "addrController_top:ac0|audioAddr[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "addrController_top:ac0|audioAddr[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "addrController_top:ac0|audioAddr[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "addrController_top:ac0|audioAddr[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "addrController_top:ac0|audioAddr[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "addrController_top:ac0|audioAddr[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "addrController_top:ac0|audioAddr[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "addrController_top:ac0|busCycle[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "addrController_top:ac0|busCycle[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "addrController_top:ac0|extra_slot_count[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "addrController_top:ac0|extra_slot_count[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "addrController_top:ac0|loadSound" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "addrController_top:ac0|snd_alt" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "addrController_top:ac0|snd_div[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "addrController_top:ac0|snd_div[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to "addrController_top:ac0|snd_div[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "addrController_top:ac0|snd_div[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "addrController_top:ac0|snd_div[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "addrController_top:ac0|snd_div[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "addrController_top:ac0|snd_div[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "addrController_top:ac0|snd_div[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[136] -to "addrController_top:ac0|snd_div[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[137] -to "addrController_top:ac0|snd_div[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[138] -to "addrController_top:ac0|videoBusControl" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[139] -to "clock325MHz:cs0|locked" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[140] -to "dataController_top:dc0|audioOut[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[141] -to "dataController_top:dc0|audioOut[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[142] -to "dataController_top:dc0|audioOut[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[143] -to "dataController_top:dc0|audioOut[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[144] -to "dataController_top:dc0|audioOut[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[145] -to "dataController_top:dc0|audioOut[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[146] -to "dataController_top:dc0|audioOut[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[147] -to "dataController_top:dc0|audioOut[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[148] -to "dataController_top:dc0|audioOut[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[149] -to "dataController_top:dc0|audioOut[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[150] -to "dataController_top:dc0|audioOut[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[151] -to "dataController_top:dc0|audio_latch[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[152] -to "dataController_top:dc0|audio_latch[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[153] -to "dataController_top:dc0|audio_latch[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[154] -to "dataController_top:dc0|audio_latch[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[155] -to "dataController_top:dc0|audio_latch[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[156] -to "dataController_top:dc0|audio_latch[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[157] -to "dataController_top:dc0|audio_latch[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[158] -to "dataController_top:dc0|audio_latch[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[159] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[160] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[161] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[162] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[163] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[164] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[165] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[166] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[167] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[168] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[169] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[170] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[171] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[172] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[173] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[174] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[175] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[176] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[177] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[178] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[179] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[180] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[181] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[182] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[183] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[184] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[185] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[186] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[187] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[188] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[189] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[190] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[191] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[192] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[193] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[194] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[195] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[196] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[197] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[198] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[199] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[200] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[201] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[202] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[203] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[204] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[205] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|clk" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[206] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[207] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[208] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[209] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[210] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[211] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[212] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[213] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[214] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[215] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[216] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[217] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[218] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[219] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[220] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[221] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[222] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[223] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[224] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|newByteReady" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[225] -to "dataController_top:dc0|snd_alt" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[226] -to "dataController_top:dc0|via:v|snd_ena" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[227] -to "dataController_top:dc0|via:v|snd_vol[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[228] -to "dataController_top:dc0|via:v|snd_vol[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[229] -to "dataController_top:dc0|via:v|snd_vol[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[230] -to "sdram:sdram|addr[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[231] -to "sdram:sdram|addr[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[232] -to "sdram:sdram|addr[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[233] -to "sdram:sdram|addr[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[234] -to "sdram:sdram|addr[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[235] -to "sdram:sdram|addr[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[236] -to "sdram:sdram|addr[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[237] -to "sdram:sdram|addr[16]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[238] -to "sdram:sdram|addr[17]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[239] -to "sdram:sdram|addr[18]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[240] -to "sdram:sdram|addr[19]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[241] -to "sdram:sdram|addr[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[242] -to "sdram:sdram|addr[20]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[243] -to "sdram:sdram|addr[21]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[244] -to "sdram:sdram|addr[22]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[245] -to "sdram:sdram|addr[23]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[246] -to "sdram:sdram|addr[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[247] -to "sdram:sdram|addr[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[248] -to "sdram:sdram|addr[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[249] -to "sdram:sdram|addr[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[250] -to "sdram:sdram|addr[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[251] -to "sdram:sdram|addr[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[252] -to "sdram:sdram|addr[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[253] -to "sdram:sdram|addr[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[254] -to "sdram:sdram|dout[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[255] -to "sdram:sdram|dout[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[256] -to "sdram:sdram|dout[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[257] -to "sdram:sdram|dout[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[258] -to "sdram:sdram|dout[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[259] -to "sdram:sdram|dout[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[260] -to "sdram:sdram|dout[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[261] -to "sdram:sdram|dout[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[262] -to "sdram:sdram|dout[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[263] -to "sdram:sdram|dout[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[264] -to "sdram:sdram|dout[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[265] -to "sdram:sdram|dout[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[266] -to "sdram:sdram|dout[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[267] -to "sdram:sdram|dout[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[268] -to "sdram:sdram|dout[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[269] -to "sdram:sdram|dout[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[270] -to "sdram:sdram|sd_cas" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[271] -to "sdram:sdram|sd_cs" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[272] -to "sdram:sdram|sd_ras" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[273] -to "sdram:sdram|sd_we" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[274] -to "sdram:sdram|t[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[275] -to "sdram:sdram|t[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[276] -to "sdram:sdram|t[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[277] -to "sdram:sdram|we" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "addrController_top:ac0|audioAddr[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "addrController_top:ac0|audioAddr[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "addrController_top:ac0|audioAddr[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "addrController_top:ac0|audioAddr[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "addrController_top:ac0|audioAddr[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "addrController_top:ac0|audioAddr[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "addrController_top:ac0|audioAddr[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "addrController_top:ac0|audioAddr[16]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "addrController_top:ac0|audioAddr[17]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "addrController_top:ac0|audioAddr[18]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "addrController_top:ac0|audioAddr[19]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "addrController_top:ac0|audioAddr[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "addrController_top:ac0|audioAddr[20]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "addrController_top:ac0|audioAddr[21]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "addrController_top:ac0|audioAddr[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "addrController_top:ac0|audioAddr[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "addrController_top:ac0|audioAddr[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "addrController_top:ac0|audioAddr[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "addrController_top:ac0|audioAddr[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "addrController_top:ac0|audioAddr[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "addrController_top:ac0|audioAddr[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "addrController_top:ac0|audioAddr[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "addrController_top:ac0|busCycle[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "addrController_top:ac0|busCycle[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "addrController_top:ac0|extra_slot_count[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "addrController_top:ac0|extra_slot_count[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "addrController_top:ac0|loadSound" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "addrController_top:ac0|snd_alt" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "addrController_top:ac0|snd_div[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "addrController_top:ac0|snd_div[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to "addrController_top:ac0|snd_div[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "addrController_top:ac0|snd_div[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "addrController_top:ac0|snd_div[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "addrController_top:ac0|snd_div[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "addrController_top:ac0|snd_div[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "addrController_top:ac0|snd_div[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "addrController_top:ac0|snd_div[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "addrController_top:ac0|snd_div[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "addrController_top:ac0|videoBusControl" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "clock325MHz:cs0|locked" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "dataController_top:dc0|audioOut[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "dataController_top:dc0|audioOut[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "dataController_top:dc0|audioOut[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "dataController_top:dc0|audioOut[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "dataController_top:dc0|audioOut[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "dataController_top:dc0|audioOut[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "dataController_top:dc0|audioOut[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "dataController_top:dc0|audioOut[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "dataController_top:dc0|audioOut[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "dataController_top:dc0|audioOut[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "dataController_top:dc0|audioOut[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "dataController_top:dc0|audio_latch[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "dataController_top:dc0|audio_latch[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "dataController_top:dc0|audio_latch[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "dataController_top:dc0|audio_latch[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "dataController_top:dc0|audio_latch[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "dataController_top:dc0|audio_latch[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "dataController_top:dc0|audio_latch[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "dataController_top:dc0|audio_latch[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskDataByteTimer[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|diskImageData[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[175] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[176] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[177] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[178] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[179] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[180] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|driveTrack[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[181] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[182] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[183] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[184] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[185] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[186] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[187] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[188] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c1[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[189] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[190] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[191] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[192] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[193] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[194] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[195] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[196] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c2[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[197] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[198] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[199] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[200] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[201] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[202] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[203] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[204] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|c3[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[205] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|clk" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[206] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[207] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[208] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[209] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[210] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[211] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[212] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[213] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[214] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[215] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|count[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[216] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[217] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[218] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[219] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[220] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[221] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[222] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[223] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|floppy_track_encoder:enc|data_latch[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[224] -to "dataController_top:dc0|iwm:i|floppy:floppyInt|newByteReady" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[225] -to "dataController_top:dc0|snd_alt" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[226] -to "dataController_top:dc0|via:v|snd_ena" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[227] -to "dataController_top:dc0|via:v|snd_vol[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[228] -to "dataController_top:dc0|via:v|snd_vol[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[229] -to "dataController_top:dc0|via:v|snd_vol[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[230] -to "sdram:sdram|addr[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[231] -to "sdram:sdram|addr[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[232] -to "sdram:sdram|addr[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[233] -to "sdram:sdram|addr[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[234] -to "sdram:sdram|addr[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[235] -to "sdram:sdram|addr[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[236] -to "sdram:sdram|addr[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[237] -to "sdram:sdram|addr[16]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[238] -to "sdram:sdram|addr[17]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[239] -to "sdram:sdram|addr[18]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[240] -to "sdram:sdram|addr[19]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[241] -to "sdram:sdram|addr[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[242] -to "sdram:sdram|addr[20]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[243] -to "sdram:sdram|addr[21]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[244] -to "sdram:sdram|addr[22]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[245] -to "sdram:sdram|addr[23]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[246] -to "sdram:sdram|addr[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[247] -to "sdram:sdram|addr[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[248] -to "sdram:sdram|addr[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[249] -to "sdram:sdram|addr[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[250] -to "sdram:sdram|addr[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[251] -to "sdram:sdram|addr[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[252] -to "sdram:sdram|addr[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[253] -to "sdram:sdram|addr[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[254] -to "sdram:sdram|dout[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[255] -to "sdram:sdram|dout[10]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[256] -to "sdram:sdram|dout[11]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[257] -to "sdram:sdram|dout[12]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[258] -to "sdram:sdram|dout[13]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[259] -to "sdram:sdram|dout[14]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[260] -to "sdram:sdram|dout[15]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[261] -to "sdram:sdram|dout[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[262] -to "sdram:sdram|dout[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[263] -to "sdram:sdram|dout[3]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[264] -to "sdram:sdram|dout[4]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[265] -to "sdram:sdram|dout[5]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[266] -to "sdram:sdram|dout[6]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[267] -to "sdram:sdram|dout[7]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[268] -to "sdram:sdram|dout[8]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[269] -to "sdram:sdram|dout[9]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[270] -to "sdram:sdram|sd_cas" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[271] -to "sdram:sdram|sd_cs" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[272] -to "sdram:sdram|sd_ras" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[273] -to "sdram:sdram|sd_we" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[274] -to "sdram:sdram|t[0]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[275] -to "sdram:sdram|t[1]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[276] -to "sdram:sdram|t[2]" -section_id auto_signaltap_0 -set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[277] -to "sdram:sdram|we" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=278" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=278" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=855" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=42733" -section_id auto_signaltap_0 -set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=17167" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[93] -to "addrController_top:ac0|_memoryLDS" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[94] -to "addrController_top:ac0|_memoryUDS" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[93] -to "addrController_top:ac0|_memoryLDS" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[94] -to "addrController_top:ac0|_memoryUDS" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SEGMENT_SIZE=256" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_SAMPLE_DEPTH=256" -section_id auto_signaltap_0 +set_instance_assignment -name POST_FIT_CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "pll:cs0|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[95] -to "addrController_top:ac0|videoBusControl" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[96] -to "clock325MHz:cs0|locked" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[97] -to "dataController_top:dc0|ncr5380:scsi|bus_cs" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[98] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[99] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[100] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[101] -to "dataController_top:dc0|ncr5380:scsi|bus_we" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[102] -to "dataController_top:dc0|ncr5380:scsi|dack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[103] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|ack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[104] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|bsy" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[105] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[106] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[107] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[108] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[109] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[110] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[111] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[112] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[113] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cd" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[95] -to "addrController_top:ac0|videoBusControl" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[96] -to "clock325MHz:cs0|locked" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[97] -to "dataController_top:dc0|ncr5380:scsi|bus_cs" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[98] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[99] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[100] -to "dataController_top:dc0|ncr5380:scsi|bus_rs[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[101] -to "dataController_top:dc0|ncr5380:scsi|bus_we" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[102] -to "dataController_top:dc0|ncr5380:scsi|dack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[103] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|ack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[104] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|bsy" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[105] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[106] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[107] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[108] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[109] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[110] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[111] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[112] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|buffer_dout[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[113] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cd" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[114] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[115] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[116] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[117] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[118] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[119] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[120] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[121] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[122] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[123] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[124] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[125] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[126] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cpl" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[127] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_read" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[128] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[129] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[130] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[131] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[132] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[133] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[134] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[135] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[136] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[137] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[138] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[139] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[140] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[141] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[142] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[143] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[144] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[145] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[146] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[147] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[148] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[149] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[150] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[151] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[152] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[153] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[154] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[155] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[156] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[157] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[158] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[159] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[160] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[161] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[162] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[163] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[164] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[165] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[166] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[167] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[168] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[169] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[170] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[171] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[172] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[173] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[174] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[175] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[176] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[177] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[178] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[179] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[180] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[181] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[182] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[183] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[184] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_ack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[185] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[186] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[187] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[188] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[189] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[190] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[191] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[192] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[193] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[194] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[195] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[196] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[197] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[198] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[199] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[200] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[201] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[202] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[203] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[204] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[205] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[206] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[207] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[208] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[209] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[210] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[211] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[212] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[213] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[214] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[215] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[216] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[217] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_rd" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[114] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[115] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[116] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[117] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[118] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[119] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[120] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[121] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd[0][7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[122] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[123] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[124] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[125] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[126] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_cpl" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[127] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|cmd_read" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[128] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[129] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[130] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[131] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[132] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[133] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[134] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[135] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[136] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[137] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[138] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[139] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[140] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[141] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[142] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[143] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[144] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[145] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[146] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[147] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[148] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[149] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[150] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[151] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[152] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[153] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[154] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[155] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[156] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[157] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[158] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[159] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|data_cnt[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[160] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[161] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[162] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[163] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[164] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[165] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[166] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[167] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dbg_cmds[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[168] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[169] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[170] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[171] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[172] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[173] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[174] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[175] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|din[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[176] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[177] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[178] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[179] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[180] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[181] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[182] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[183] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|dout[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[184] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_ack" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[185] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[186] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[187] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[188] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[189] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[190] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[191] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[192] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[16]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[193] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[17]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[194] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[18]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[195] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[19]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[196] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[197] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[20]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[198] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[21]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[199] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[22]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[200] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[23]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[201] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[24]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[202] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[25]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[203] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[26]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[204] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[27]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[205] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[28]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[206] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[29]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[207] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[208] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[30]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[209] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[31]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[210] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[211] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[212] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[213] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[214] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[215] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[216] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_lba[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[217] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_rd" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_DATA_BITS=265" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_TRIGGER_BITS=265" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK=0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_INVERSION_MASK_LENGTH=817" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_HIWORD=40745" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[218] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_wr" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[219] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.000" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[220] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.001" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[221] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.010" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[222] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.011" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[223] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.100" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[224] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.101" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[225] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|req" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[226] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|rst" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[227] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|sel" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[228] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[229] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[230] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[231] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[232] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[233] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[234] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[235] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[236] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[237] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[238] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[239] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[240] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[241] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[242] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[243] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[244] -to "dataController_top:dc0|ncr5380:scsi|scsi_bsy" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[245] -to "user_io:user_io|bit_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[246] -to "user_io:user_io|bit_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[247] -to "user_io:user_io|bit_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[248] -to "user_io:user_io|byte_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[249] -to "user_io:user_io|byte_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[250] -to "user_io:user_io|byte_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[251] -to "user_io:user_io|byte_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[252] -to "user_io:user_io|byte_cnt[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[253] -to "user_io:user_io|byte_cnt[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[254] -to "user_io:user_io|byte_cnt[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[255] -to "user_io:user_io|byte_cnt[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[256] -to "user_io:user_io|sd_din[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[257] -to "user_io:user_io|sd_din[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[258] -to "user_io:user_io|sd_din[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[259] -to "user_io:user_io|sd_din[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[260] -to "user_io:user_io|sd_din[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[261] -to "user_io:user_io|sd_din[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[262] -to "user_io:user_io|sd_din[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[263] -to "user_io:user_io|sd_din[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_trigger_in[264] -to "user_io:user_io|sd_din_strobe" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[218] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|io_wr" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[219] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.000" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[220] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.001" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[221] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.010" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[222] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.011" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[223] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.100" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[224] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|phase.101" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[225] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|req" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[226] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|rst" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[227] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|sel" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[228] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[229] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[10]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[230] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[11]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[231] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[12]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[232] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[13]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[233] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[14]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[234] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[15]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[235] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[236] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[237] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[238] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[239] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[240] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[241] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[242] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[8]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[243] -to "dataController_top:dc0|ncr5380:scsi|scsi:scsi2|tlen[9]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[244] -to "dataController_top:dc0|ncr5380:scsi|scsi_bsy" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[245] -to "user_io:user_io|bit_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[246] -to "user_io:user_io|bit_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[247] -to "user_io:user_io|bit_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[248] -to "user_io:user_io|byte_cnt[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[249] -to "user_io:user_io|byte_cnt[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[250] -to "user_io:user_io|byte_cnt[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[251] -to "user_io:user_io|byte_cnt[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[252] -to "user_io:user_io|byte_cnt[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[253] -to "user_io:user_io|byte_cnt[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[254] -to "user_io:user_io|byte_cnt[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[255] -to "user_io:user_io|byte_cnt[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[256] -to "user_io:user_io|sd_din[0]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[257] -to "user_io:user_io|sd_din[1]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[258] -to "user_io:user_io|sd_din[2]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[259] -to "user_io:user_io|sd_din[3]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[260] -to "user_io:user_io|sd_din[4]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[261] -to "user_io:user_io|sd_din[5]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[262] -to "user_io:user_io|sd_din[6]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[263] -to "user_io:user_io|sd_din[7]" -section_id auto_signaltap_0 +set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_data_in[264] -to "user_io:user_io|sd_din_strobe" -section_id auto_signaltap_0 +set_global_assignment -name SLD_NODE_PARAMETER_ASSIGNMENT "SLD_NODE_CRC_LOWORD=9780" -section_id auto_signaltap_0 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top set_global_assignment -name SLD_FILE db/stp1_auto_stripped.stp \ No newline at end of file diff --git a/cores/plus_too/plusToo_top.v b/cores/plus_too/plusToo_top.v index 0892aca..92a69c7 100644 --- a/cores/plus_too/plusToo_top.v +++ b/cores/plus_too/plusToo_top.v @@ -152,8 +152,6 @@ wire mouseData; wire keyClk; wire keyData; -assign SDRAM_CLK = !clk64; - // synthesize a 32.5 MHz clock wire clk64; wire pll_locked; @@ -165,6 +163,7 @@ assign SDRAM_CLK = !clk64; pll cs0( .inclk0 ( CLOCK_27[0] ), .c0 ( clk64 ), + .c1 ( SDRAM_CLK ), .locked ( pll_locked ) ); @@ -178,11 +177,11 @@ assign SDRAM_CLK = !clk64; localparam serialIn = 1'b0, configROMSize = 1'b1; // 128K ROM - wire [1:0] configRAMSize = status[3]?2'b11:2'b10; // 1MB/4MB + wire [1:0] configRAMSize = status_mem?2'b11:2'b10; // 1MB/4MB // interconnects // CPU - wire clk8, _cpuReset, _cpuAS, _cpuUDS, _cpuLDS, _cpuRW, _cpuDTACK; + wire clk8, _cpuReset, _cpuUDS, _cpuLDS, _cpuRW; wire [2:0] _cpuIPL; wire [7:0] cpuAddrHi; wire [23:0] cpuAddr; @@ -194,12 +193,13 @@ assign SDRAM_CLK = !clk64; wire _memoryUDS, _memoryLDS; wire videoBusControl; wire dioBusControl; + wire cpuBusControl; wire [21:0] memoryAddr; wire [15:0] memoryDataOut; // peripherals wire loadPixels, pixelOut, _hblank, _vblank; - wire memoryOverlayOn, selectSCC, selectIWM, selectVIA; + wire memoryOverlayOn, selectSCSI, selectSCC, selectIWM, selectVIA; wire [15:0] dataControllerDataOut; // audio @@ -223,39 +223,63 @@ assign SDRAM_CLK = !clk64; "PLUS_TOO;;", "F1,DSK;", "F2,DSK;", - "O3,Memory,1MB,4MB;", - "T4,Reset" + "S3,IMG;", + "O4,Memory,1MB,4MB;", + "T5,Reset" }; - parameter CONF_STR_LEN = 10+7+7+18+8; + wire status_mem = status[4]; + wire status_reset = status[5]; + + parameter CONF_STR_LEN = 10+7+7+7+18+8; // the status register is controlled by the on screen display (OSD) wire [7:0] status; wire [1:0] buttons; + wire [31:0] io_lba; + wire io_rd; + wire io_wr; + wire io_ack; + wire [7:0] io_din; + wire io_din_strobe; + wire [7:0] io_dout; + wire io_dout_strobe; + // include user_io module for arm controller communication user_io #(.STRLEN(CONF_STR_LEN)) user_io ( - .conf_str ( CONF_STR ), + .conf_str ( CONF_STR ), - .SPI_CLK ( SPI_SCK ), - .SPI_SS_IO ( CONF_DATA0 ), - .SPI_MISO ( SPI_DO ), - .SPI_MOSI ( SPI_DI ), + .SPI_CLK ( SPI_SCK ), + .SPI_SS_IO ( CONF_DATA0 ), + .SPI_MISO ( SPI_DO ), + .SPI_MOSI ( SPI_DI ), - .status ( status ), - .buttons ( buttons ), + .status ( status ), + .buttons ( buttons ), // ps2 interface - .ps2_clk ( ps2_clk ), - .ps2_kbd_clk ( keyClk ), - .ps2_kbd_data ( keyData ), - .ps2_mouse_clk ( mouseClk ), - .ps2_mouse_data( mouseData ) + .ps2_clk ( ps2_clk ), + .ps2_kbd_clk ( keyClk ), + .ps2_kbd_data ( keyData ), + .ps2_mouse_clk ( mouseClk ), + .ps2_mouse_data( mouseData ), + + // SD/block device interface + .sd_lba ( io_lba ), + .sd_rd ( io_rd ), + .sd_wr ( io_wr ), + .sd_ack ( io_ack ), + .sd_conf ( 1'b0 ), + .sd_sdhc ( 1'b1 ), + .sd_dout ( io_din ), + .sd_dout_strobe( io_din_strobe ), + .sd_din ( io_dout ), + .sd_din_strobe ( io_dout_strobe ) ); - assign _cpuAS = !(cpu_busstate != 2'b01); wire [1:0] cpu_busstate; - wire cpu_clkena = (!_cpuDTACK) || (cpu_busstate == 2'b01); + wire cpu_clkena = cpuBusControl || (cpu_busstate == 2'b01); TG68KdotC_Kernel #(0,0,0,0,0,0) m68k ( .clk ( clk8 ), .nReset ( _cpuReset ), @@ -280,11 +304,9 @@ assign SDRAM_CLK = !clk64; addrController_top ac0( .clk8(clk8), .cpuAddr(cpuAddr), - ._cpuAS(_cpuAS), ._cpuUDS(_cpuUDS), ._cpuLDS(_cpuLDS), ._cpuRW(_cpuRW), - ._cpuDTACK(_cpuDTACK), .configROMSize(configROMSize), .configRAMSize(configRAMSize), .memoryAddr(memoryAddr), @@ -295,6 +317,8 @@ assign SDRAM_CLK = !clk64; ._ramWE(_ramWE), .videoBusControl(videoBusControl), .dioBusControl(dioBusControl), + .cpuBusControl(cpuBusControl), + .selectSCSI(selectSCSI), .selectSCC(selectSCC), .selectIWM(selectIWM), .selectVIA(selectVIA), @@ -322,11 +346,11 @@ assign SDRAM_CLK = !clk64; reg [15:0] rst_cnt; reg last_mem_config; always @(posedge clk8) begin - last_mem_config <= status[3]; + last_mem_config <= status_mem; // various source can reset the mac - if(!pll_locked || status[0] || status[4] || buttons[1] || - rom_download || (last_mem_config != status[3])) + if(!pll_locked || status[0] || status_reset || buttons[1] || + rom_download || (last_mem_config != status_mem)) rst_cnt <= 16'd65535; else if(rst_cnt != 0) rst_cnt <= rst_cnt - 16'd1; @@ -335,8 +359,8 @@ assign SDRAM_CLK = !clk64; wire [10:0] audio; sigma_delta_dac dac ( .clk ( clk32 ), - .ldatasum ( { audio, 3'h0 } ), - .rdatasum ( { audio, 3'h0 } ), + .ldatasum ( { audio, 4'h0 } ), + .rdatasum ( { audio, 4'h0 } ), .left ( AUDIO_L ), .right ( AUDIO_R ) ); @@ -353,10 +377,13 @@ assign SDRAM_CLK = !clk64; .cpuDataIn(cpuDataOut), .cpuDataOut(dataControllerDataOut), .cpuAddrRegHi(cpuAddr[12:9]), + .cpuAddrRegMid(cpuAddr[6:4]), // for SCSI .cpuAddrRegLo(cpuAddr[2:1]), + .selectSCSI(selectSCSI), .selectSCC(selectSCC), .selectIWM(selectIWM), .selectVIA(selectVIA), + .cpuBusControl(cpuBusControl), .videoBusControl(videoBusControl), .memoryDataOut(memoryDataOut), .memoryDataIn(sdram_do), @@ -387,8 +414,18 @@ assign SDRAM_CLK = !clk64; .dskReadAddrInt(dskReadAddrInt), .dskReadAckInt(dskReadAckInt), .dskReadAddrExt(dskReadAddrExt), - .dskReadAckExt(dskReadAckExt) - ); + .dskReadAckExt(dskReadAckExt), + + // block device interface for scsi disk + .io_lba ( io_lba ), + .io_rd ( io_rd ), + .io_wr ( io_wr ), + .io_ack ( io_ack ), + .io_din ( io_din ), + .io_din_strobe ( io_din_strobe ), + .io_dout ( io_dout ), + .io_dout_strobe( io_dout_strobe ) + ); // sdram used for ram/rom maps directly into 68k address space wire download_cycle = dio_download && dioBusControl; diff --git a/cores/plus_too/scsi.v b/cores/plus_too/scsi.v new file mode 100644 index 0000000..b1261f7 --- /dev/null +++ b/cores/plus_too/scsi.v @@ -0,0 +1,379 @@ +/* verilator lint_off UNUSED */ +/* verilator lint_off SYNCASYNCNET */ + +// scsi.v +// implements a target only scsi device + +module scsi(input sysclk, + + // scsi interface + input rst, // bus reset from initiator + input sel, + input atn, // initiator requests to send a message + output bsy, // target holds bus + + output msg, + output cd, + output io, + + output req, + input ack, // initiator acknowledges a request + + input [7:0] din, // data from initiator to target + output [7:0] dout, // data from target to initiator + + // interface to io controller + output [31:0] io_lba, + output reg io_rd, + output reg io_wr, + input io_ack, + + // data sent to io controller + output reg [7:0] io_dout, + input io_dout_strobe, + + // data coming in from io controller + input [7:0] io_din, + input io_din_strobe + + ); + + + // SCSI device id + parameter ID = 0; + + `define PHASE_IDLE 3'd0 + `define PHASE_CMD_IN 3'd1 + `define PHASE_DATA_OUT 3'd2 + `define PHASE_DATA_IN 3'd3 + `define PHASE_STATUS_OUT 3'd4 + `define PHASE_MESSAGE_OUT 3'd5 + reg [2:0] phase; + + reg cmd_in; + always @(posedge sysclk) + cmd_in <= (phase == `PHASE_CMD_IN); + + // ---------------- buffer read engine ----------------------- + // the buffer itself. Can hold one sector + reg [7:0] buffer_out [511:0]; + reg [8:0] buffer_out_rptr; + reg buffer_out_read_strobe; + + always @(posedge io_dout_strobe or posedge cmd_cpl_strobe) begin + if(cmd_cpl_strobe) buffer_out_rptr <= 9'd0; + else begin + io_dout <= buffer_out[buffer_out_rptr]; + buffer_out_rptr <= buffer_out_rptr + 9'd1; + end + end + + + // ---------------- buffer write engine ----------------------- + // the buffer itself. Can hold one sector + reg [7:0] buffer_in [511:0]; + reg [8:0] buffer_in_wptr; + reg buffer_in_write_strobe; + + always @(posedge io_din_strobe) + buffer_in[buffer_in_wptr] <= io_din; + + wire cmd_cpl_strobe = cmd_in && cmd_cpl; + always @(negedge io_din_strobe or posedge cmd_cpl_strobe) begin + if(cmd_cpl_strobe) buffer_in_wptr <= 9'd0; + else buffer_in_wptr <= buffer_in_wptr + 9'd1; + end + + // status replies + reg [7:0] status; + `define STATUS_OK 8'h00 + `define STATUS_CHECK_CONDITION 8'h02 + + // message codes + `define MSG_CMD_COMPLETE 8'h00 + + // drive scsi signals according to phase + assign msg = (phase == `PHASE_MESSAGE_OUT); + assign cd = (phase == `PHASE_CMD_IN) || (phase == `PHASE_STATUS_OUT) || (phase == `PHASE_MESSAGE_OUT); + assign io = (phase == `PHASE_DATA_OUT) || (phase == `PHASE_STATUS_OUT) || (phase == `PHASE_MESSAGE_OUT); + assign req = (phase != `PHASE_IDLE) && !ack && !io_rd && !io_wr; + assign bsy = (phase != `PHASE_IDLE); + + assign dout = (phase == `PHASE_STATUS_OUT)?status: + (phase == `PHASE_MESSAGE_OUT)?`MSG_CMD_COMPLETE: + (phase == `PHASE_DATA_OUT)?cmd_dout: + 8'h00; + + // de-multiplex different data sources + wire [7:0] cmd_dout = + cmd_read?buffer_dout: + cmd_inquiry?inquiry_dout: + cmd_read_capacity?read_capacity_dout: + 8'h00; + + // output of inquiry command, identify as "SEAGATE ST225N" + wire [7:0] inquiry_dout = + (data_cnt == 32'd4 )?8'd32: // length + + (data_cnt == 32'd8 )?" ":(data_cnt == 32'd9 )?"S": + (data_cnt == 32'd10)?"E":(data_cnt == 32'd11)?"A": + (data_cnt == 32'd12)?"G":(data_cnt == 32'd13)?"A": + (data_cnt == 32'd14)?"T":(data_cnt == 32'd15)?"E": + (data_cnt == 32'd16)?" ":(data_cnt == 32'd17)?" ": + (data_cnt == 32'd18)?" ":(data_cnt == 32'd19)?" ": + (data_cnt == 32'd20)?" ":(data_cnt == 32'd21)?" ": + (data_cnt == 32'd22)?" ":(data_cnt == 32'd23)?" ": + (data_cnt == 32'd24)?" ":(data_cnt == 32'd25)?" ": + + (data_cnt == 32'd26)?"S":(data_cnt == 32'd27)?"T": + (data_cnt == 32'd28)?"2":(data_cnt == 32'd29)?"2": + (data_cnt == 32'd30)?"5":(data_cnt == 32'd31)?"N": + 8'h00; + + // output of read capacity command + wire [31:0] capacity = 32'd41055; // 40960 + 96 blocks = 20MB + wire [7:0] read_capacity_dout = + (data_cnt == 32'd0 )?capacity[31:24]: + (data_cnt == 32'd1 )?capacity[23:16]: + (data_cnt == 32'd2 )?capacity[15:8]: + (data_cnt == 32'd3 )?capacity[7:0]: + (data_cnt == 32'd6 )?8'd2: // 512 bytes per sector + 8'h00; + + // clock data out of buffer to allow for embedded ram + reg [7:0] buffer_dout; + wire buffer_out_clk = req && !io_rd; + always @(posedge sysclk) // buffer_out_clk) + buffer_dout <= buffer_in[data_cnt]; + + // debug signals + reg [7:0] dbg_cmds /* synthesis noprune */; + always @(posedge cmd_cpl or posedge rst) begin + if(rst) dbg_cmds <= 8'd0; + else dbg_cmds <= dbg_cmds + 8'd1; + end + + // buffer to store incoming commands + reg [3:0] cmd_cnt; + reg [7:0] cmd [9:0]; + + /* ----------------------- request data from/to io controller ----------------------- */ + + // base address of current block. Subtract one when writing since the writing happens + // after a block has been transferred and data_cnt has thus already been increased by 512 + assign io_lba = lba + { 9'd0, data_cnt[31:9] } - + (cmd_write ? 32'd1 : 32'd0); + + reg req_io_rd, req_io_wr; + always @(posedge sysclk) begin + // generate an io_rd signal whenever the first byte of a 512 byte block is required and io_wr whenever + // the last byte of a 512 byte block has been revceived + req_io_rd <= (phase == `PHASE_DATA_OUT) && cmd_read && (data_cnt[8:0] == 0) && !data_complete; + // generate an io_wr signal whenever a 512 byte block has been received or when the status + // phase of a write command has been reached + req_io_wr <= (((phase == `PHASE_DATA_IN) && (data_cnt[8:0] == 0) && (data_cnt != 0)) || + (phase == `PHASE_STATUS_OUT)) && cmd_write; + end + + always @(posedge req_io_rd or posedge io_ack) begin + if(io_ack) io_rd <= 1'b0; + else io_rd <= 1'b1; + end + + always @(posedge req_io_wr or posedge io_ack) begin + if(io_ack) io_wr <= 1'b0; + else io_wr <= 1'b1; + end + + // store incoming command in buffer + reg cmd_idle; + always @(posedge sysclk) + cmd_idle <= (phase == `PHASE_IDLE); + + // store data on rising edge of ack, ... + always @(posedge ack) begin + if(phase == `PHASE_CMD_IN) + cmd[cmd_cnt] <= din; + if(phase == `PHASE_DATA_IN) + buffer_out[data_cnt] <= din; + end + + // ... advance counter on falling edge + always @(negedge ack or posedge cmd_idle) begin + if(cmd_idle) cmd_cnt <= 4'd0; + else if(cmd_cnt != 15) cmd_cnt <= cmd_cnt + 4'd1; + end + + // count data bytes. don't increase counter while we are waiting for data from + // the io controller + reg [31:0] data_cnt; + reg data_complete; + + reg data_io; + always @(posedge sysclk) + data_io <= (phase == `PHASE_DATA_OUT) || (phase == `PHASE_DATA_IN) || + (phase == `PHASE_STATUS_OUT) || (phase == `PHASE_MESSAGE_OUT); + + // For block transfers tlen contains the number of 512 bytes blocks to transfer. + // Most other commands have the bytes length stored in the transfer length field. + // And some have a fixed length idependent from any header field. + // The data transfer has finished once the data counter reaches this + // number. + wire [31:0] data_len = + cmd_read_capacity?32'd8: + cmd_read?{ 7'd0, tlen, 9'd0 }: // read command length is in 512 bytes blocks + cmd_write?{ 7'd0, tlen, 9'd0 }: // write command length is in 512 bytes blocks + { 16'd0, tlen }; // inquiry etc have length in bytes + + always @(negedge ack or negedge data_io) begin + if(!data_io) begin + data_cnt <= 32'd0; + data_complete <= 1'b0; + end else begin + data_cnt <= data_cnt + 32'd1; + data_complete <= (data_len - 32'd1) == data_cnt; + end + end + + // check whether status byte has been sent + wire status_out = (phase == `PHASE_STATUS_OUT); + reg status_sent; + always @(negedge ack or negedge status_out) begin + if(!status_out) status_sent <= 1'b0; + else status_sent <= 1'b1; + end + + // check whether message byte has been sent + reg message_sent; + wire message_out = (phase == `PHASE_MESSAGE_OUT); + always @(negedge ack or negedge message_out) begin + if(!message_out) message_sent <= 1'b0; + else message_sent <= 1'b1; + end + + /* ----------------------- command decoding ------------------------------- */ + + wire cmd_wr_x = cmd_cpl && cmd_write && (tlen > 1); + + + // parse commands + wire [7:0] op_code = cmd[0]; + wire [2:0] cmd_group = op_code[7:5]; + wire [4:0] cmd_code = op_code[4:0]; + + wire cmd_unknown = cmd_cpl && !cmd_ok; + + // check if a complete command has been received + wire cmd_cpl = cmd6_cpl || cmd10_cpl; + wire cmd6_cpl = (cmd_group == 3'b000) && (cmd_cnt == 6); + wire cmd10_cpl = ((cmd_group == 3'b010) || (cmd_group == 3'b001)) && (cmd_cnt == 10); + + // https://en.wikipedia.org/wiki/SCSI_command + wire cmd_read = cmd_read6 || cmd_read10; + wire cmd_read6 = (op_code == 8'h08); + wire cmd_read10 = (op_code == 8'h28); + wire cmd_write = cmd_write6 || cmd_write10; + wire cmd_write6 = (op_code == 8'h0a); + wire cmd_write10 = (op_code == 8'h2a); + wire cmd_inquiry = (op_code == 8'h12); + wire cmd_format = (op_code == 8'h04); + wire cmd_mode_select = (op_code == 8'h15); + wire cmd_test_unit_ready = (op_code == 8'h00); + wire cmd_read_capacity = (op_code == 8'h25); + + // valid command in buffer? TODO: check for valid command parameters + wire cmd_ok = cmd_read || cmd_write || cmd_inquiry || cmd_test_unit_ready || + cmd_read_capacity || cmd_mode_select || cmd_format; + + // latch parameters once command is complete + reg [31:0] lba; + reg [15:0] tlen; + reg [2:0] lun; + + always @(posedge sysclk) begin + if(cmd_cpl && (phase == `PHASE_CMD_IN)) begin + lba <= cmd6_cpl?{11'd0, lba6}:lba10; + tlen <= cmd6_cpl?{7'd0, tlen6}:tlen10; + lun <= cmd6_cpl?lun6:3'd0; + end + end + + // logical block address + wire [7:0] cmd1 = cmd[1]; + wire [2:0] lun6 = cmd1[7:5]; + wire [20:0] lba6 = { cmd1[4:0], cmd[2], cmd[3] }; + wire [31:0] lba10 = { cmd[2], cmd[3], cmd[4], cmd[5] }; + + // transfer length + wire [8:0] tlen6 = (cmd[4] == 0)?9'd256:{1'b0,cmd[4]}; + wire [15:0] tlen10 = { cmd[7], cmd[8] }; + + + // the 5380 changes phase in the falling edge, thus we monitor it + // on the rising edge + always @(posedge sysclk) begin + if(rst) begin + phase <= `PHASE_IDLE; + end else begin +// case(phase) + if(phase == `PHASE_IDLE) begin + if(sel && din[ID]) // own id on bus during selection? + phase <= `PHASE_CMD_IN; + end + + else if(phase == `PHASE_CMD_IN) begin + // check if a full command is in the buffer + if(cmd_cpl) begin + // is this a supported and valid command? + if(cmd_ok) begin + // yes, continue + status <= `STATUS_OK; + + // continue according to command + + // these commands return data + if(cmd_read || cmd_inquiry || cmd_read_capacity) + phase <= `PHASE_DATA_OUT; + // these commands receive dataa + else if(cmd_write || cmd_mode_select) + phase <= `PHASE_DATA_IN; + // and all other valid commands are just "ok" + else + phase <= `PHASE_STATUS_OUT; + end else begin + // no, report failure + status <= `STATUS_CHECK_CONDITION; + phase <= `PHASE_STATUS_OUT; + end + end + end + + else if(phase == `PHASE_DATA_OUT) begin + if(data_complete) + phase <= `PHASE_STATUS_OUT; + end + + else if(phase == `PHASE_DATA_IN) begin + if(data_complete) + phase <= `PHASE_STATUS_OUT; + end + + else if(phase == `PHASE_STATUS_OUT) begin + if(status_sent) + phase <= `PHASE_MESSAGE_OUT; + end + + else if(phase == `PHASE_MESSAGE_OUT) begin + if(message_sent) + phase <= `PHASE_IDLE; + end + + else + phase <= `PHASE_IDLE; // should never happen + +// endcase + end + end + + +endmodule