diff --git a/cores/c16/c16.v b/cores/c16/c16.v index 1bda274..62d057e 100644 --- a/cores/c16/c16.v +++ b/cores/c16/c16.v @@ -127,6 +127,7 @@ assign kbus[7] = kbus_kbd[7] & joy1_sel[4]; ); // TED 8360 instance +wire irq_n, cpuclk, cs0, cs1; ted mos8360( .clk(CLK28), @@ -234,7 +235,7 @@ always @(posedge CLK28) // reset tries to emulate the length of a real reset if(resetcounter==24'd16777215) sreset<=0; else begin - resetcounter<=resetcounter+1; + resetcounter<=resetcounter+1'd1; sreset<=1; end end diff --git a/cores/c16/c16_mist.qsf b/cores/c16/c16_mist.qsf index 31ba997..e30e3a7 100644 --- a/cores/c16/c16_mist.qsf +++ b/cores/c16/c16_mist.qsf @@ -330,8 +330,8 @@ set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[3] set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[2] set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[1] set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_B[0] -set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_HS -set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to VGA_VS +set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_HS +set_instance_assignment -name CURRENT_STRENGTH_NEW 8MA -to VGA_VS set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to LED set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_L set_instance_assignment -name CURRENT_STRENGTH_NEW 4MA -to AUDIO_R @@ -357,6 +357,7 @@ set_global_assignment -name VERILOG_FILE colors_to_rgb.v set_global_assignment -name VERILOG_FILE c16_mist.v set_global_assignment -name VERILOG_FILE c16_keymatrix.v set_global_assignment -name VERILOG_FILE c16.v +set_global_assignment -name VERILOG_FILE ps2receiver.v set_global_assignment -name VERILOG_FILE basic_rom.v set_global_assignment -name VHDL_FILE c1541/gcr_floppy.vhd set_global_assignment -name VHDL_FILE c1541/spram.vhd diff --git a/cores/c16/c16_mist.v b/cores/c16/c16_mist.v index 373347c..c4a7d69 100644 --- a/cores/c16/c16_mist.v +++ b/cores/c16/c16_mist.v @@ -499,7 +499,7 @@ wire osd_clk = tv15khz?clk7:clk14; wire [5:0] red, green, blue; // include the on screen display -osd #(11,0,5) osd ( +osd #(10'd11,10'd0,3'd5) osd ( .clk_sys ( clk28 ), .ce_pix ( osd_clk ), diff --git a/cores/c16/osd.v b/cores/c16/osd.v index cf32be8..9151d26 100644 --- a/cores/c16/osd.v +++ b/cores/c16/osd.v @@ -172,9 +172,9 @@ end // area in which OSD is being displayed wire [9:0] h_osd_start = h_dsp_ctr + OSD_X_OFFSET - (OSD_WIDTH >> 1); -wire [9:0] h_osd_end = h_dsp_ctr + OSD_X_OFFSET + (OSD_WIDTH >> 1) - 1; +wire [9:0] h_osd_end = h_dsp_ctr + OSD_X_OFFSET + (OSD_WIDTH >> 1) - 1'd1; wire [9:0] v_osd_start = v_dsp_ctr + OSD_Y_OFFSET - (doublescan ? OSD_HEIGHT : OSD_HEIGHT >> 1); -wire [9:0] v_osd_end = v_dsp_ctr + OSD_Y_OFFSET + (doublescan ? OSD_HEIGHT : OSD_HEIGHT >> 1) - 1; +wire [9:0] v_osd_end = v_dsp_ctr + OSD_Y_OFFSET + (doublescan ? OSD_HEIGHT : OSD_HEIGHT >> 1) - 1'd1; reg h_osd_active, v_osd_active; always @(posedge clk_sys) begin diff --git a/cores/c16/ps2receiver.v b/cores/c16/ps2receiver.v index e119f08..3e349a4 100644 --- a/cores/c16/ps2receiver.v +++ b/cores/c16/ps2receiver.v @@ -56,18 +56,18 @@ always @(posedge clk) rx_done<=0; // rx_done is active only for one clk cycle if(watchdog==0) // when watchdog timer expires, reset received bits receivedbits<=0; - else watchdog<=watchdog-1; + else watchdog<=watchdog-1'd1; if(prev_ps2clkreg & ~ps2clkreg) // falling edge of ps2 clock begin watchdog<=12'd2900; // reload watchdog timer shiftreg<={ps2_data,shiftreg[10:1]}; - receivedbits<=receivedbits+1; + receivedbits<=receivedbits+1'd1; end if(receivedbits==4'd11) begin - ps2scancode<=shiftreg[9:1]; + ps2scancode<=shiftreg[8:1]; rx_done<=1; receivedbits<=0; end