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95 lines
1.8 KiB
ArmAsm
95 lines
1.8 KiB
ArmAsm
;; bcd tests
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;; http://tict.ticalc.org/docs/68kguide.txt
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;; TODO: test addressing modes
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clr.l d0 ; at startup hw registers are undefined
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clr.l d1 ; and arithmetic will fail in ghdl
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move #$66,d0
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move #$14,d1
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andi #$ef,ccr ; clear x bit
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abcd d1,d0 ; 66+14=80
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bcs fail ; carry should not be set
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cmp #$80,d0
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bne fail
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move #$32,d0
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move #$19,d1
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ori #$10,ccr ; set x bit
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abcd d1,d0 ; 32+19+1=52
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bcs fail ; carry should not be set
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cmp #$52,d0
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bne fail
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move #$81,d0
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move #$32,d1
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andi #$ef,ccr ; clear x bit
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abcd d1,d0 ; 81+32=113
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bcc fail ; carry should be set
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cmp #$13,d0
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bne fail
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move #$81,d0
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move #$32,d1
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andi #$ef,ccr ; clear x bit
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sbcd d1,d0 ; 81-32=49
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bcs fail ; carry should not be set
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cmp #$49,d0
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bne fail
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move #$32,d0
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move #$81,d1
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andi #$ef,ccr ; clear x bit
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sbcd d1,d0 ; 32-81=-49 (->100-51)
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bcc fail ; carry should be set
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cmp #$51,d0
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bne fail
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move #$19,d0
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move #$42,d1
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ori #$10,ccr ; set x bit
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sbcd d1,d0 ; 19-42-1=-24 (->100-76)
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bcc fail ; carry should be set
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cmp #$76,d0
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bne fail
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move #$33,d0
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move #$33,d1
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andi #$fb,ccr ; clear z bit
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andi #$ef,ccr ; clear x bit
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sbcd d1,d0 ; 33-33=0
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beq fail ; z flag should still not be set
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move #$42,d0
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move #$42,d1
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ori #$04,ccr ; set z bit
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andi #$ef,ccr ; clear x bit
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sbcd d1,d0 ; 42-42=0
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bne fail ; z flag should be set
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move #$19,d1
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andi #$ef,ccr ; clear x bit
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nbcd d1 ; 100-19=81
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bcc fail ; carry should be set
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beq fail ; z flag should not be set
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cmp #$81,d1
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bne fail
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move #$22,d1
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ori #$10,ccr ; set x bit
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nbcd d1 ; 100-22-1=77
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bcc fail ; carry should be set
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cmp #$77,d1
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bne fail
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move #$99,d1
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ori #$10,ccr ; set x bit
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ori #$04,ccr ; set z bit
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nbcd d1 ; 100-99-1=0
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bcc fail ; carry should be set
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bne fail ; z flag should be set
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cmp #$00,d1
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bne fail
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; move.l d1,testword1
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