mirror of
https://github.com/mist-devel/mist-firmware.git
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112 lines
4.3 KiB
C
112 lines
4.3 KiB
C
#ifndef ASIX_CONST_H
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#define ASIX_CONST_H
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#define ETH_ALEN 6
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/* ASIX AX8817X based USB 2.0 Ethernet Devices */
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#define AX_CMD_SET_SW_MII 0x06
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#define AX_CMD_READ_MII_REG 0x07
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#define AX_CMD_WRITE_MII_REG 0x08
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#define AX_CMD_SET_HW_MII 0x0a
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#define AX_CMD_READ_EEPROM 0x0b
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#define AX_CMD_WRITE_EEPROM 0x0c
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#define AX_CMD_WRITE_ENABLE 0x0d
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#define AX_CMD_WRITE_DISABLE 0x0e
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#define AX_CMD_READ_RX_CTL 0x0f
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#define AX_CMD_WRITE_RX_CTL 0x10
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#define AX_CMD_READ_IPG012 0x11
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#define AX_CMD_WRITE_IPG0 0x12
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#define AX_CMD_WRITE_IPG1 0x13
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#define AX_CMD_READ_NODE_ID 0x13
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#define AX_CMD_WRITE_IPG2 0x14
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#define AX_CMD_WRITE_MULTI_FILTER 0x16
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#define AX88172_CMD_READ_NODE_ID 0x17
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#define AX_CMD_READ_PHY_ID 0x19
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#define AX_CMD_READ_MEDIUM_STATUS 0x1a
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#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
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#define AX_CMD_READ_MONITOR_MODE 0x1c
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#define AX_CMD_WRITE_MONITOR_MODE 0x1d
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#define AX_CMD_READ_GPIOS 0x1e
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#define AX_CMD_WRITE_GPIOS 0x1f
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#define AX_CMD_SW_RESET 0x20
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#define AX_CMD_SW_PHY_STATUS 0x21
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#define AX_CMD_SW_PHY_SELECT 0x22
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#define AX_SWRESET_CLEAR 0x00
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#define AX_SWRESET_RR 0x01
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#define AX_SWRESET_RT 0x02
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#define AX_SWRESET_PRTE 0x04
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#define AX_SWRESET_PRL 0x08
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#define AX_SWRESET_BZ 0x10
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#define AX_SWRESET_IPRL 0x20
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#define AX_SWRESET_IPPD 0x40
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/* AX88772 & AX88178 RX_CTL values */
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#define AX_RX_CTL_SO 0x0080
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#define AX_RX_CTL_AP 0x0020
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#define AX_RX_CTL_AM 0x0010
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#define AX_RX_CTL_AB 0x0008
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#define AX_RX_CTL_SEP 0x0004
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#define AX_RX_CTL_AMALL 0x0002
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#define AX_RX_CTL_PRO 0x0001
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#define AX_RX_CTL_MFB_2048 0x0000
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#define AX_RX_CTL_MFB_4096 0x0100
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#define AX_RX_CTL_MFB_8192 0x0200
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#define AX_RX_CTL_MFB_16384 0x0300
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#define AX88772_IPG0_DEFAULT 0x15
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#define AX88772_IPG1_DEFAULT 0x0c
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#define AX88772_IPG2_DEFAULT 0x12
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/* AX88772 & AX88178 Medium Mode Register */
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#define AX_MEDIUM_PF 0x0080
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#define AX_MEDIUM_JFE 0x0040
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#define AX_MEDIUM_TFC 0x0020
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#define AX_MEDIUM_RFC 0x0010
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#define AX_MEDIUM_ENCK 0x0008
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#define AX_MEDIUM_AC 0x0004
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#define AX_MEDIUM_FD 0x0002
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#define AX_MEDIUM_GM 0x0001
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#define AX_MEDIUM_SM 0x1000
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#define AX_MEDIUM_SBP 0x0800
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#define AX_MEDIUM_PS 0x0200
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#define AX_MEDIUM_RE 0x0100
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#define AX88178_MEDIUM_DEFAULT \
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(AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
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AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
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AX_MEDIUM_RE )
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#define AX88772_MEDIUM_DEFAULT \
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(AX_MEDIUM_FD | AX_MEDIUM_RFC | \
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AX_MEDIUM_TFC | AX_MEDIUM_PS | \
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AX_MEDIUM_AC | AX_MEDIUM_RE )
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/* AX88772 & AX88178 RX_CTL values */
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#define AX_RX_CTL_SO 0x0080
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#define AX_RX_CTL_AP 0x0020
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#define AX_RX_CTL_AM 0x0010
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#define AX_RX_CTL_AB 0x0008
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#define AX_RX_CTL_SEP 0x0004
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#define AX_RX_CTL_AMALL 0x0002
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#define AX_RX_CTL_PRO 0x0001
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#define AX_RX_CTL_MFB_2048 0x0000
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#define AX_RX_CTL_MFB_4096 0x0100
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#define AX_RX_CTL_MFB_8192 0x0200
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#define AX_RX_CTL_MFB_16384 0x0300
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#define AX_DEFAULT_RX_CTL \
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(AX_RX_CTL_SO | AX_RX_CTL_AB )
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/* GPIO 0 .. 2 toggles */
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#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
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#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
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#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
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#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
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#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
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#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
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#define AX_GPIO_RESERVED 0x40 /* Reserved */
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#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
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#endif //ASIX_CONST_H
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