From 0519ae4a523e2ad7ee10eedaddc18ea2a538951d Mon Sep 17 00:00:00 2001
From: Olof Kindgren <olof.kindgren@gmail.com>
Date: Sun, 18 Apr 2021 23:01:26 +0200
Subject: [PATCH] Add verilator waiver file

---
 data/verilator_waiver.vlt | 7 +++++++
 serv.core                 | 1 +
 2 files changed, 8 insertions(+)
 create mode 100644 data/verilator_waiver.vlt

diff --git a/data/verilator_waiver.vlt b/data/verilator_waiver.vlt
new file mode 100644
index 0000000..dc368e4
--- /dev/null
+++ b/data/verilator_waiver.vlt
@@ -0,0 +1,7 @@
+`verilator_config
+// Bits [1:0] in i_ibus_rdt are not used at all
+lint_off -rule UNUSED -file "*/serv_top.v" -lines 51
+
+//Some bits in the instruction word are not used in serv_decode but it's easier
+//to just send in the whole word than picking out bits
+lint_off -rule UNUSED -file "*/serv_decode.v" -lines 6
diff --git a/serv.core b/serv.core
index 1068b78..00f55b3 100644
--- a/serv.core
+++ b/serv.core
@@ -5,6 +5,7 @@ name : ::serv:1.0.2
 filesets:
   core:
     files:
+      - "tool_verilator? (data/verilator_waiver.vlt)" : {file_type: vlt}
       - rtl/serv_params.vh : {is_include_file : true}
       - rtl/serv_bufreg.v
       - rtl/serv_alu.v