From 18c8c65255eafa8fd927d92ce7bb2e1305f66931 Mon Sep 17 00:00:00 2001
From: Olof Kindgren <olof.kindgren@gmail.com>
Date: Tue, 6 Jul 2021 00:20:55 +0200
Subject: [PATCH] Fix RISC-V compliance instructions

---
 README.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index cd73e7c..708643f 100644
--- a/README.md
+++ b/README.md
@@ -71,19 +71,21 @@ Other applications can be tested by compiling and converting to bin and then hex
 
 ## Run RISC-V compliance tests
 
+**Note:** The following instructions are valid for version 1.0 of the RISC-V compliance tests. The target-specific support for SERV has not yet been ported to newer versions.
+
 Build the verilator model (if not already done)
 
     fusesoc run --target=verilator_tb --build servant
 
 Download the tests repo
 
-    git clone https://github.com/riscv/riscv-compliance
+    git clone https://github.com/riscv/riscv-compliance --branch 1.0
 
 To run the RISC-V compliance tests, we need to supply the SERV-specific support files and point the test suite to where it can find a target to run (i.e. the previously built Verilator model)
 
 Run the compliance tests
 
-    cd riscv-compliance && make TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DECICE=rv32i RISCV_ISA=rv32i TARGET_SIM=$SERV/build/servant_1.0.2/verilator_tb-verilator/Vservant_sim
+    cd riscv-compliance && make TARGETDIR=$SERV/riscv-target RISCV_TARGET=serv RISCV_DEVICE=rv32i RISCV_ISA=rv32i TARGET_SIM=$WORKSPACE/build/servant_1.0.2/verilator_tb-verilator/Vservant_sim
 
 The above will run all tests in the rv32i test suite. Since SERV also implement the `rv32Zicsr` and `rv32Zifencei` extensions, these can also be tested by choosing any of them instead of rv32i as the `RISCV_ISA` variable.