From 1c5d44e5c4ee2ccb6fef993262c53af79993fadb Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Sat, 5 Oct 2024 11:27:51 +0200 Subject: [PATCH] Make CSR module 4-bit compatible --- rtl/serv_csr.v | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/rtl/serv_csr.v b/rtl/serv_csr.v index 2db8207..547accf 100644 --- a/rtl/serv_csr.v +++ b/rtl/serv_csr.v @@ -65,7 +65,17 @@ module serv_csr (i_csr_source == CSR_SOURCE_CSR) ? csr_out : {W{1'bx}}; - assign csr_out = (i_mstatus_en & i_en & ((mstatus_mie & i_cnt3) | (i_cnt11 | i_cnt12))) | + wire [B:0] mstatus; + + generate + if (W==1) begin : gen_mstatus_w1 + assign mstatus = ((mstatus_mie & i_cnt3) | (i_cnt11 | i_cnt12)); + end else if (W==4) begin : gen_mstatus_w4 + assign mstatus = {i_cnt11 | (mstatus_mie & i_cnt3), 2'b00, i_cnt12}; + end + endgenerate + + assign csr_out = ({W{i_mstatus_en & i_en}} & mstatus) | i_rf_csr_out | ({W{i_mcause_en & i_en}} & mcause);