From 25e86fdd3c551b2edf810b84befc6babbd70429c Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Wed, 26 Aug 2020 16:44:58 +0200 Subject: [PATCH] Small optimization of instruction fetching logic --- rtl/serv_ctrl.v | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/rtl/serv_ctrl.v b/rtl/serv_ctrl.v index f5899a5..108fd2a 100644 --- a/rtl/serv_ctrl.v +++ b/rtl/serv_ctrl.v @@ -72,16 +72,11 @@ module serv_ctrl pc_plus_4_cy_r <= i_pc_en & pc_plus_4_cy; pc_plus_offset_cy_r <= i_pc_en & pc_plus_offset_cy; - if (i_pc_en) begin - en_pc_r <= 1'b1; - o_ibus_adr <= {new_pc, o_ibus_adr[31:1]}; - end else if (o_ibus_cyc & i_ibus_ack) - en_pc_r <= 1'b0; + if (o_ibus_cyc & i_ibus_ack | i_pc_en | i_rst) + en_pc_r <= i_pc_en | i_rst; - if (i_rst) begin - en_pc_r <= 1'b1; - o_ibus_adr <= RESET_PC; + if (i_pc_en | i_rst) begin + o_ibus_adr <= i_rst ? RESET_PC : {new_pc, o_ibus_adr[31:1]}; end end - endmodule