diff --git a/rtl/serv_csr.v b/rtl/serv_csr.v
index 14d7d8a..087e07c 100644
--- a/rtl/serv_csr.v
+++ b/rtl/serv_csr.v
@@ -36,10 +36,8 @@ module serv_csr
 
    reg 		    mstatus;
    reg 		    mstatus_mie;
-   reg 		    mie;
    reg 		    mie_mtie;
    reg [31:0] 	    mtvec    = 32'h0;
-   reg 		    mip;
 
    reg [31:0] 	mscratch;
    reg [31:0] 	mepc;
@@ -75,8 +73,6 @@ module serv_csr
 	mie_mtie <= csr_in;
 
       mstatus <= (i_cnt == 2) ? mstatus_mie : 1'b0;
-      mie <= (i_cnt == 6) & mie_mtie;
-      mip <= (i_cnt == 6) & i_mtip & o_timer_irq_en;
 
       if (i_trap) begin
 	 mcause[31]  <= i_mtip & o_timer_irq_en;
diff --git a/rtl/serv_decode.v b/rtl/serv_decode.v
index b8d07c8..ca260b8 100644
--- a/rtl/serv_decode.v
+++ b/rtl/serv_decode.v
@@ -22,7 +22,6 @@ module serv_decode
    input wire 	     i_ctrl_misalign,
    output wire 	     o_rf_rd_en,
    output reg [4:0]  o_rf_rd_addr,
-   output wire 	     o_rf_rs_en,
    output reg [4:0]  o_rf_rs1_addr,
    output reg [4:0]  o_rf_rs2_addr,
    output wire 	     o_alu_en,
@@ -129,7 +128,6 @@ module serv_decode
 				  (!opcode[2] & opcode[4] & opcode[0]) |
 				  (!opcode[2] & !opcode[3] & !opcode[0]));
 
-   assign o_rf_rs_en = cnt_en;
    assign o_alu_en   = cnt_en;
    assign o_ctrl_en  = cnt_en;
 
@@ -213,8 +211,6 @@ module serv_decode
    assign o_mem_init = mem_op & (state == INIT);
    assign o_mem_bytecnt = cnt[4:3];
 
-   wire jal_misalign  = op21 & opcode[1] & opcode[4];
-
    assign o_alu_bool_op = o_funct3[1:0];
 
    always @(posedge clk) begin
diff --git a/rtl/serv_regfile.v b/rtl/serv_regfile.v
index 57a6de8..0140bdd 100644
--- a/rtl/serv_regfile.v
+++ b/rtl/serv_regfile.v
@@ -10,7 +10,6 @@ module serv_regfile
    input wire 	    i_rd,
    input wire [4:0] i_rs1_addr,
    input wire [4:0] i_rs2_addr,
-   input wire 	    i_rs_en,
    output wire 	    o_rs1,
    output wire 	    o_rs2);
 
@@ -39,7 +38,7 @@ module serv_regfile
    wire [1:0] wdata = {i_rd, rd_r};
    always @(posedge i_clk) begin
       rd_r <= i_rd;
-      if (i_rs_en)
+      if (i_rd_en)
 	wcnt <= wcnt + 5'd1;
 
       if (i_go)
diff --git a/rtl/serv_top.v b/rtl/serv_top.v
index ced359c..86c2ad0 100644
--- a/rtl/serv_top.v
+++ b/rtl/serv_top.v
@@ -91,7 +91,6 @@ module serv_top
    wire 	 rf_ready;
    wire          rs1;
    wire          rs2;
-   wire          rs_en;
    wire          rd_en;
 
    wire          op_b_source;
@@ -164,7 +163,6 @@ module serv_top
       .o_alu_rd_sel   (alu_rd_sel),
       .o_rf_rd_en     (rd_en),
       .o_rf_rd_addr   (rd_addr),
-      .o_rf_rs_en     (rs_en),
       .o_rf_rs1_addr  (rs1_addr),
       .o_rf_rs2_addr  (rs2_addr),
       .o_mem_en       (mem_en),
@@ -253,7 +251,6 @@ module serv_top
       .i_rd       (rd),
       .i_rs1_addr (rs1_addr),
       .i_rs2_addr (rs2_addr),
-      .i_rs_en    (rs_en),
       .o_rs1      (rs1),
       .o_rs2      (rs2));
 
@@ -326,7 +323,7 @@ module serv_top
 	rvfi_insn <= i_ibus_rdt;
 
       ctrl_pc_en_r <= ctrl_pc_en;
-      if (rs_en) begin
+      if (alu_en) begin
          rs1_fv <= {rs1,rs1_fv[31:1]};
          rs2_fv <= {rs2,rs2_fv[31:1]};
       end