From 621baeff316f8047a97227d5b28441a3a82fd0f8 Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Thu, 26 Aug 2021 09:21:51 +0200 Subject: [PATCH] Always return 0 from reads to reg x0 in serv_rf_ram --- rtl/serv_rf_ram.v | 24 +++++++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) diff --git a/rtl/serv_rf_ram.v b/rtl/serv_rf_ram.v index 9bbc503..3cedea6 100644 --- a/rtl/serv_rf_ram.v +++ b/rtl/serv_rf_ram.v @@ -7,16 +7,34 @@ module serv_rf_ram input wire [width-1:0] i_wdata, input wire i_wen, input wire [$clog2(depth)-1:0] i_raddr, - output reg [width-1:0] o_rdata); - + output wire [width-1:0] o_rdata); + reg [width-1:0] memory [0:depth-1]; + reg [width-1:0] rdata ; always @(posedge i_clk) begin if (i_wen) memory[i_waddr] <= i_wdata; - o_rdata <= memory[i_raddr]; + rdata <= memory[i_raddr]; end + /* Reads from reg x0 needs to return 0 + Check that the part of the read address corresponding to the register + is zero and gate the output + width LSB of reg index $clog2(width) + 2 4 1 + 4 3 2 + 8 2 3 + 16 1 4 + 32 0 5 + */ + reg regzero; + + always @(posedge i_clk) + regzero <= !(|i_raddr[$clog2(depth)-1:5-$clog2(width)]); + + assign o_rdata = rdata & ~{width{regzero}}; + `ifdef SERV_CLEAR_RAM integer i; initial