From 7765567cf1f717b7eccadca9c85b5e82e5f21616 Mon Sep 17 00:00:00 2001
From: Olof Kindgren <olof.kindgren@gmail.com>
Date: Wed, 29 Dec 2021 00:17:00 +0100
Subject: [PATCH] Add missing gate on mem_rd with CSR disabled

---
 rtl/serv_rf_if.v | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/rtl/serv_rf_if.v b/rtl/serv_rf_if.v
index 0c5dd67..cf23790 100644
--- a/rtl/serv_rf_if.v
+++ b/rtl/serv_rf_if.v
@@ -122,7 +122,7 @@ module serv_rf_if
    end else begin
       wire 	     rd = (i_ctrl_rd ) |
 			  (i_alu_rd & i_rd_alu_en) |
-			  (i_mem_rd);
+			  (i_mem_rd & i_rd_mem_en);
 
       assign 	     o_wdata0 = rd;
       assign	     o_wdata1 = 1'b0;