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Optimize csr address handling
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@@ -147,28 +147,27 @@ module serv_decode
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/*
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Bits 26, 22, 21 and 20 are enough to uniquely identify the eight supported CSR regs
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mtvec, mscratch, mepc and mtval are stored externally (normally in the RF) and are
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treated differently from mstatus, mie, mcause and mip which are stored in serv_csr.
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treated differently from mstatus, mie and mcause which are stored in serv_csr.
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The former get a 2-bit address (as found in serv_params.vh) while the latter get a
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The former get a 2-bit address as seen below while the latter get a
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one-hot enable signal each.
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Hex|2 222|Reg
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adr|6 210|name
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---|-----|-------
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300|0_000|mstatus
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304|0_100|mie
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305|0_101|mtvec
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340|1_000|mscratch
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341|1_001|mepc
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342|1_010|mcause
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343|1_011|mtval
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344|1_100|mip
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Hex|2 222|Reg |csr
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adr|6 210|name |addr
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---|-----|--------|----
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300|0_000|mstatus | xx
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304|0_100|mie | xx
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305|0_101|mtvec | 01
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340|1_000|mscratch| 00
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341|1_001|mepc | 10
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342|1_010|mcause | xx
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343|1_011|mtval | 11
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*/
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//true for mtvec,mscratch,mepc and mtval
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//false for mstatus, mie, mcause, mip
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wire csr_valid = op20 | (op26 & !op22 & !op21);
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//false for mstatus, mie, mcause
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wire csr_valid = op20 | (op26 & !op21);
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assign o_rd_csr_en = csr_op;
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@@ -180,11 +179,7 @@ module serv_decode
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assign o_csr_source = funct3[1:0];
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assign o_csr_d_sel = funct3[2];
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assign o_csr_imm_en = opcode[4] & opcode[2] & funct3[2];
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assign o_csr_addr = (op26 & !op20) ? CSR_MSCRATCH :
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(op26 & !op21) ? CSR_MEPC :
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(op26) ? CSR_MTVAL :
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CSR_MTVEC;
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assign o_csr_addr = {op26 & op20, !op26 | op21};
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assign o_alu_cmp_eq = funct3[2:1] == 2'b00;
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