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Add support for DECA Max 10 board
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8
data/deca.sdc
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data/deca.sdc
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# Main system clock (50 Mhz)
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create_clock -name "clk" -period 20.000ns [get_ports {i_clk}]
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# Automatically constrain PLL and other generated clocks
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derive_pll_clocks -create_base_clocks
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# Automatically calculate clock uncertainty to jitter and other effects.
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derive_clock_uncertainty
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19
data/deca.tcl
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data/deca.tcl
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#MAX10_CLK2_50 3.3V
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set_location_assignment PIN_P11 -to i_clk
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to i_clk
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#LED[0]
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set_location_assignment PIN_C7 -to q
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to q
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#P8 3 GPIO0_D0 (P8 1 GND)
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set_location_assignment PIN_W18 -to uart_txd
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart_txd
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#KEY[0]
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set_location_assignment PIN_H21 -to i_rst_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to i_rst_n
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# Configuration mode that allows Memory Initialisation
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set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE IMAGE WITH ERAM"
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