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add support for WFI instruction

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This commit is contained in:
Alfred Persson Forsberg
2025-05-12 14:40:43 +02:00
committed by Olof Kindgren
parent f5ddfaa637
commit b4216a030d
7 changed files with 311 additions and 7 deletions
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4
rtl/serv_debug.v
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@@ -182,7 +182,7 @@ module serv_debug
if (update_mcause) dbg_mcause <= dbg_csr;
end
reg LUI, AUIPC, JAL, JALR, BEQ, BNE, BLT, BGE, BLTU, BGEU, LB, LH, LW, LBU, LHU, SB, SH, SW, ADDI, SLTI, SLTIU, XORI, ORI, ANDI,SLLI, SRLI, SRAI, ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND, FENCE, ECALL, EBREAK;
reg LUI, AUIPC, JAL, JALR, BEQ, BNE, BLT, BGE, BLTU, BGEU, LB, LH, LW, LBU, LHU, SB, SH, SW, ADDI, SLTI, SLTIU, XORI, ORI, ANDI,SLLI, SRLI, SRAI, ADD, SUB, SLL, SLT, SLTU, XOR, SRL, SRA, OR, AND, FENCE, ECALL, EBREAK, WFI;
reg CSRRW, CSRRS, CSRRC, CSRRWI, CSRRSI, CSRRCI;
reg OTHER;
@@ -228,6 +228,7 @@ module serv_debug
FENCE <= 1'b0;
ECALL <= 1'b0;
EBREAK <= 1'b0;
WFI <= 1'b0;
CSRRW <= 1'b0;
CSRRS <= 1'b0;
CSRRC <= 1'b0;
@@ -279,6 +280,7 @@ module serv_debug
32'b???????_?????_?????_000_?????_00011_11 : FENCE <= 1'b1;
32'b0000000_00000_00000_000_00000_11100_11 : ECALL <= 1'b1;
32'b0000000_00001_00000_000_00000_11100_11 : EBREAK <= 1'b1;
32'b0001000_00010_00000_000_00000_11100_11 : WFI <= 1'b1;
32'b???????_?????_?????_001_?????_11100_11 : CSRRW <= 1'b1;
32'b???????_?????_?????_010_?????_11100_11 : CSRRS <= 1'b1;
32'b???????_?????_?????_011_?????_11100_11 : CSRRC <= 1'b1;

15
rtl/serv_decode.v
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@@ -19,6 +19,7 @@ module serv_decode
output reg o_cond_branch,
output reg o_e_op,
output reg o_ebreak,
output reg o_wfi,
output reg o_branch_op,
output reg o_shift_op,
output reg o_rd_op,
@@ -82,7 +83,7 @@ module serv_decode
wire co_two_stage_op =
~opcode[2] | (funct3[0] & ~funct3[1] & ~opcode[0] & ~opcode[4]) |
(funct3[1] & ~funct3[2] & ~opcode[0] & ~opcode[4]) | co_mdu_op;
(funct3[1] & ~funct3[2] & ~opcode[0] & ~opcode[4]) | co_mdu_op | o_wfi;
wire co_shift_op = (opcode[2] & ~funct3[1]) & !co_mdu_op;
wire co_branch_op = opcode[4];
wire co_dbus_en = ~opcode[2] & ~opcode[4];
@@ -133,20 +134,22 @@ module serv_decode
wire co_sh_right = funct3[2];
wire co_bne_or_bge = funct3[0];
//Matches system ops except ecall/ebreak/mret
//Matches system ops except ecall/ebreak/mret/wfi
wire csr_op = opcode[4] & opcode[2] & (|funct3);
//op20
wire co_ebreak = op20;
wire co_ebreak = op20 & !op22;
wire co_wfi = opcode[4] & opcode[2] & op22 & !(|funct3);
//opcode & funct3 & op21
wire co_ctrl_mret = opcode[4] & opcode[2] & op21 & !(|funct3);
//Matches system opcodes except CSR accesses (funct3 == 0)
//and mret (!op21)
wire co_e_op = opcode[4] & opcode[2] & !op21 & !(|funct3);
//and mret (!op21) and wfi (!op22)
wire co_e_op = opcode[4] & opcode[2] & !op21 & !op22 & !(|funct3);
//opcode & funct3 & imm30
@@ -261,6 +264,7 @@ module serv_decode
o_two_stage_op = co_two_stage_op;
o_e_op = co_e_op;
o_ebreak = co_ebreak;
o_wfi = co_wfi;
o_branch_op = co_branch_op;
o_shift_op = co_shift_op;
o_rd_op = co_rd_op;
@@ -319,6 +323,7 @@ module serv_decode
o_cond_branch <= co_cond_branch;
o_e_op <= co_e_op;
o_ebreak <= co_ebreak;
o_wfi <= co_wfi;
o_two_stage_op <= co_two_stage_op;
o_dbus_en <= co_dbus_en;
o_mtval_pc <= co_mtval_pc;

2
rtl/serv_top.v
View File

@@ -92,6 +92,7 @@ module serv_top
wire two_stage_op;
wire e_op;
wire ebreak;
wire wfi;
wire branch_op;
wire shift_op;
wire rd_op;
@@ -304,6 +305,7 @@ module serv_top
.o_dbus_en (dbus_en),
.o_e_op (e_op),
.o_ebreak (ebreak),
.o_wfi (wfi),
.o_branch_op (branch_op),
.o_shift_op (shift_op),
.o_rd_op (rd_op),