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Prevent writes to x0
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@@ -58,11 +58,11 @@ module serv_regfile
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end
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assign o_rs1 = (|i_rs1_addr) & rs1_r;
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assign o_rs2 = (|i_rs2_addr) & (rs1_en ? rs2 : rdata[0]);
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assign o_rs1 = rs1_r;
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assign o_rs2 = (rs1_en ? rs2 : rdata[0]);
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wire [8:0] waddr = {i_rd_addr, wcnt[4:1]};
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wire wr_en = wcnt[0] & i_rd_en;
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wire wr_en = wcnt[0] & i_rd_en & (|i_rd_addr);
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wire [8:0] raddr = {!rs1_en ? i_rs1_addr : i_rs2_addr, rcnt[4:1]};
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@@ -73,4 +73,12 @@ module serv_regfile
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memory[waddr] <= wdata;
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rdata <= memory[raddr];
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end
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`ifdef RISCV_FORMAL
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integer i;
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initial
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for (i=0;i<512;i=i+1)
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memory[i] = 2'd0;
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`endif
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endmodule
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