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xilinx PLL: allows to specify PLL output frequency (16 or 32 MHz)
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committed by
Olof Kindgren
parent
1f6d215d19
commit
d90030b955
@@ -75,7 +75,7 @@ targets:
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nexys_a7:
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default_tool: vivado
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filesets : [mem_files, soc, nexys_a7]
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parameters : [memfile, memsize]
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parameters : [memfile, memsize, frequency=32]
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tools:
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vivado: {part : xc7a100tcsg324-1}
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toplevel : servix
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@@ -110,6 +110,11 @@ parameters:
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description : Preload RAM with a hex file at runtime (overrides memfile)
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paramtype : plusarg
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frequency:
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datatype : int
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description : PLL output frequency
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paramtype : vlogparam
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memfile:
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datatype : file
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description : Preload RAM with a hex file at compile-time
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