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Add Alinx AX309 board as a target

Running at 32MHz with 115200 baud rate UART (using the on-board RS232)
This commit is contained in:
Inoki
2022-03-19 14:06:32 +01:00
committed by Olof Kindgren
parent 2611c89cbe
commit e996b5498a
4 changed files with 95 additions and 0 deletions

32
servant/servant_ax309.v Normal file
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`default_nettype none
module servant_ax309
(
input wire i_clk,
input wire i_rst,
output wire o_uart_tx,
output wire q);
parameter memfile = "zephyr_hello.hex";
parameter memsize = 8192;
wire wb_clk;
wire wb_rst;
assign o_uart_tx = q;
servant_ax309_clock_gen
clock_gen
(.i_clk (i_clk),
.i_rst (i_rst),
.o_clk (wb_clk),
.o_rst (wb_rst));
servant
#(.memfile (memfile),
.memsize (memsize))
servant
(.wb_clk (wb_clk),
.wb_rst (wb_rst),
.q (q));
endmodule

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`default_nettype none
module servant_ax309_clock_gen
(input wire i_clk,
input wire i_rst,
output wire o_clk,
output reg o_rst);
wire clkfb;
wire locked;
reg locked_r;
PLL_BASE
#(.BANDWIDTH("OPTIMIZED"),
.CLKFBOUT_MULT(16),
.CLKIN_PERIOD(20.0), //50MHz
.CLKOUT1_DIVIDE(25), //32MHz
.DIVCLK_DIVIDE(1))
PLL_BASE_inst
(.CLKOUT1(o_clk),
.CLKOUT2(),
.CLKOUT3(),
.CLKOUT4(),
.CLKOUT5(),
.CLKFBOUT(clkfb),
.LOCKED(locked),
.CLKIN(i_clk),
.RST(~i_rst),
.CLKFBIN(clkfb));
always @(posedge o_clk) begin
locked_r <= locked;
o_rst <= !locked_r;
end
endmodule