From fc348f3a22a1cfd30bd2cd164ebc7175306eb7bd Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Wed, 30 Oct 2019 12:38:20 +0100 Subject: [PATCH] Fix wen delays in rf --- rtl/serv_mpram.v | 15 ++++++++++----- rtl/serv_state.v | 2 +- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/rtl/serv_mpram.v b/rtl/serv_mpram.v index e3668d7..df85138 100644 --- a/rtl/serv_mpram.v +++ b/rtl/serv_mpram.v @@ -62,18 +62,23 @@ module serv_mpram wire [5:0] wreg = wport ? wreg1 : wreg0; wire [9:0] waddr = {wreg, wslot}; - wire wen = wgo & (i_trap | (wport ? i_csr_en : i_rd_wen & run_r)); + wire wen0 = i_trap | (i_rd_wen & i_run); + wire wen1 = i_trap | i_csr_en; + + wire wen = wgo & (wport ? wen1_r : wen0_r); reg wreq_r; - reg run_r; + + reg wen0_r; + reg wen1_r; always @(posedge i_clk) begin - wreq_r <= i_wreq | o_rgnt; + wen0_r <= wen0; + wen1_r <= wen1; + wreq_r <= i_wreq; wdata0_r <= wdata0; wdata1_r <= wdata1; wdata1_2r <= wdata1_r; - run_r <= i_run; - if (wgo) wcnt <= wcnt+5'd1; diff --git a/rtl/serv_state.v b/rtl/serv_state.v index 8523a97..93489f0 100644 --- a/rtl/serv_state.v +++ b/rtl/serv_state.v @@ -83,7 +83,7 @@ module serv_state assign o_rf_rreq = i_ibus_ack | (stage_two_req & trap_pending); //Prepare RF for writes when everything is ready to enter stage two - assign o_rf_wreq = ((i_shift_op & i_alu_sh_done & stage_two_pending) | (i_mem_op & i_dbus_ack) | (stage_two_req & (i_slt_op | i_branch_op))) & !trap_pending; + assign o_rf_wreq = ((i_shift_op & i_alu_sh_done & stage_two_pending) | (i_mem_op & i_dbus_ack) | (stage_two_req & (i_slt_op | i_branch_op))) & !trap_pending | i_rf_ready; //Shift operations require bufreg to hold for one cycle between INIT and RUN before shifting assign o_bufreg_hold = !cnt_en & (stage_two_req | ~i_shift_op);