Sylvain Munaut 259d5a10ed decode: Add option to pre or post register during decoding ...

Either the input from instruction bus is registered and the
outputs are generated combinatorially (PRE_REGISTER mode), or
the input from the instruction bus is decoded combinatorially
and the result of decoding is registered (POST_REGISTER mode).

First is smaller because it allows synthesis to optimize decoding
logic with its users, but is slow. The second one is faster but
slightly bigger.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>

2021-05-28 21:26:54 +02:00

..

serv_alu.v

Rewrite logic expression of alu bool operations

2021-05-15 23:07:55 +02:00

serv_bufreg.v

Optimize shift operations

2021-01-18 22:46:51 +01:00

serv_csr.v

Optimize trap handling

2021-01-23 22:42:26 +01:00

serv_ctrl.v

Syntax fixes

2021-01-18 22:47:28 +01:00

serv_decode.v

decode: Add option to pre or post register during decoding

2021-05-28 21:26:54 +02:00

serv_immdec.v

Reuse immediate regs for RF addresses

2021-05-16 00:09:18 +02:00

serv_mem_if.v

Implement byte_valid in a more efficient way

2021-04-18 22:48:55 +02:00

serv_rf_if.v

Kill off serv_params.vh

2021-04-26 17:04:18 +02:00

serv_rf_ram_if.v

Remove unused wgo register

2021-04-08 15:36:11 +02:00

serv_rf_ram.v

Add parameter to disable CSR/interrupts

2020-03-02 16:17:26 +01:00

serv_rf_top.v

Add reset_strategy parameter

2020-11-10 15:16:19 +01:00

serv_state.v

Simulator-friendly cleanup of misalign_trap_sync

2021-04-22 15:44:18 +02:00

serv_top.v

Reuse immediate regs for RF addresses

2021-05-16 00:09:18 +02:00