Olof Kindgren 40d34d204a Avoid matching misa CSR as mstatus ...

Reads from the (unimplemented) misa register matched mstatus which
in turn caused garbage data to be written to other CSRs. Make the
matching mask slightly stricter to avoid this particular issue.

2024-08-22 22:18:45 +02:00

..

serv_aligner.v

Delete trailing whitespace from RTL

2023-12-03 18:21:01 +01:00

serv_alu.v

Used named generate statements

2023-11-16 21:38:10 +01:00

serv_bufreg2.v

Move dbus_dat/rs2/shamt storage to bufreg2

2022-01-02 22:10:33 +01:00

serv_bufreg.v

bufreg refactoring in preparation of qerv integration

2024-03-06 20:22:23 +01:00

serv_compdec.v

Delete trailing whitespace from RTL

2023-12-03 18:21:01 +01:00

serv_csr.v

Set correct value of mstatus[mpp]

2024-08-22 22:18:45 +02:00

serv_ctrl.v

Support w=4 in serv_ctrl

2024-02-22 13:12:07 +01:00

serv_decode.v

Avoid matching misa CSR as mstatus

2024-08-22 22:18:45 +02:00

serv_immdec.v

Used named generate statements

2023-11-16 21:38:10 +01:00

serv_mem_if.v

support for W=4

2023-10-31 13:23:17 +01:00

serv_rf_if.v

Support w=4 in serv_rf_if

2024-02-22 13:27:04 +01:00

serv_rf_ram_if.v

Add width-agnostic serv_rf_ram_if

2024-02-23 14:35:38 +01:00

serv_rf_ram.v

Rewrite serv_rf_ram_if

2023-06-22 15:48:25 +02:00

serv_rf_top.v

Delete trailing whitespace from RTL

2023-12-03 18:21:01 +01:00

serv_state.v

Set correct value of mstatus[mpp]

2024-08-22 22:18:45 +02:00

serv_synth_wrapper.v

Remove RVFI interface from synth wrapper

2022-12-25 20:05:52 +01:00

serv_top.v

Set correct value of mstatus[mpp]

2024-08-22 22:18:45 +02:00