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IMDS-225: Initial check in of new experimental simulator for the Intel MDS-225 IPC
This commit is contained in:
committed by
Mark Pizzolato
parent
cdb94a9d9f
commit
27e65d1fa9
79
Intel-Systems/imds-225/imds-225_sys.c
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79
Intel-Systems/imds-225/imds-225_sys.c
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/* mds225_sys.c: multibus system interface
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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07 Jun 16 - Original file.
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*/
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#include "system_defs.h"
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extern DEVICE i8080_dev;
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extern REG i8080_reg[];
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extern DEVICE i8251_dev;
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extern DEVICE i8253_dev;
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extern DEVICE i8255_dev;
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extern DEVICE i8259_dev;
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extern DEVICE EPROM_dev;
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extern DEVICE RAM_dev;
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extern DEVICE ipc_cont_dev;
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extern DEVICE multibus_dev;
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/* SCP data structures
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sim_name simulator name string
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sim_PC pointer to saved PC register descriptor
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sim_emax number of words needed for examine
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sim_devices array of pointers to simulated devices
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sim_stop_messages array of pointers to stop messages
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*/
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char sim_name[] = "Intel MDS-225";
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REG *sim_PC = &i8080_reg[0];
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int32 sim_emax = 4;
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DEVICE *sim_devices[] = {
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&i8080_dev,
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&EPROM_dev,
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&RAM_dev,
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&i8251_dev,
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&i8253_dev,
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&i8255_dev,
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&i8259_dev,
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&ipc_cont_dev,
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&multibus_dev,
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NULL
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};
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const char *sim_stop_messages[] = {
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"Unknown error",
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"Unknown I/O Instruction",
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"HALT instruction",
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"Breakpoint",
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"Invalid Opcode",
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"Invalid Memory",
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"XACK Error"
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};
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143
Intel-Systems/imds-225/ipc.c
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143
Intel-Systems/imds-225/ipc.c
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/* ipc.c: Intel IPC Processor simulator
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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This software was written by Bill Beech, Dec 2010, to allow emulation of Multibus
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Computer Systems.
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07 Jun 16 - Original file.
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*/
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#include "system_defs.h"
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/* function prototypes */
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uint8 get_mbyte(uint16 addr);
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uint16 get_mword(uint16 addr);
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void put_mbyte(uint16 addr, uint8 val);
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void put_mword(uint16 addr, uint16 val);
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t_stat SBC_reset (DEVICE *dptr);
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/* external function prototypes */
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extern t_stat i8080_reset (DEVICE *dptr); /* reset the 8080 emulator */
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//extern uint8 multibus_get_mbyte(uint16 addr);
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//extern void multibus_put_mbyte(uint16 addr, uint8 val);
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extern uint8 EPROM_get_mbyte(uint16 addr);
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extern uint8 RAM_get_mbyte(uint16 addr);
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extern void RAM_put_mbyte(uint16 addr, uint8 val);
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extern UNIT i8255_unit;
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extern UNIT EPROM_unit;
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extern UNIT RAM_unit;
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extern UNIT ipc_cont_unit;
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extern UNIT ioc_cont_unit;
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extern t_stat i8251_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern t_stat i8253_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern t_stat i8255_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern t_stat i8259_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern t_stat EPROM_reset(DEVICE *dptr, uint16 size);
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extern t_stat RAM_reset(DEVICE *dptr, uint16 base, uint16 size);
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extern t_stat ipc_cont_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern t_stat ioc_cont_reset(DEVICE *dptr, uint16 base, uint8 devnum);
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extern uint32 saved_PC; /* program counter */
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/* CPU reset routine
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put here to cause a reset of the entire IPC system */
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t_stat SBC_reset (DEVICE *dptr)
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{
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sim_printf("Initializing MDS-225\n");
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i8080_reset(NULL);
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i8251_reset(NULL, I8251_BASE_0, 0);
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i8251_reset(NULL, I8251_BASE_1, 0);
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i8253_reset(NULL, I8253_BASE, 0);
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i8255_reset(NULL, I8255_BASE_0, 0);
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i8255_reset(NULL, I8255_BASE_1, 1);
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i8259_reset(NULL, I8259_BASE_0, 0);
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i8259_reset(NULL, I8259_BASE_1, 1);
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EPROM_reset(NULL, ROM_SIZE);
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RAM_reset(NULL, RAM_BASE, RAM_SIZE);
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ipc_cont_reset(NULL, ICONT_BASE, 0);
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ioc_cont_reset(NULL, DBB_BASE, 0);
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return SCPE_OK;
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}
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/* get a byte from memory - handle RAM, ROM and Multibus memory */
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uint8 get_mbyte(uint16 addr)
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{
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if (addr >= 0xF800) { //monitor ROM - always there
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// sim_printf("get_mbyte: Monitor ROM ipc_cont=%02X\n", ipc_cont_unit.u3);
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return EPROM_get_mbyte(addr - 0xF000);
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}
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if ((addr < 0x1000) && ((ipc_cont_unit.u3 & 0x01) == 0)) { //startup
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// sim_printf("get_mbyte: Startup ROM ipc_cont=%02X\n", ipc_cont_unit.u3);
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return EPROM_get_mbyte(addr);
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}
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if ((addr >= 0xE800) && (addr < 0xF000) && ((ipc_cont_unit.u3 & 0x04) == 0)) { //diagnostic ROM
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// sim_printf("get_mbyte: Diagnostic ROM ipc_cont=%02X\n", ipc_cont_unit.u3);
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return EPROM_get_mbyte(addr - 0xE800);
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}
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return RAM_get_mbyte(addr);
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}
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/* get a word from memory */
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uint16 get_mword(uint16 addr)
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{
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uint16 val;
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val = get_mbyte(addr);
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val |= (get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory - handle RAM, ROM and Multibus memory */
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void put_mbyte(uint16 addr, uint8 val)
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{
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if (addr >= 0xF800) { //monitor ROM - always there
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sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, saved_PC);
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return;
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}
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if ((addr < 0x1000) && ((ipc_cont_unit.u3 & 0x01) == 0)) { //startup
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sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, saved_PC);
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return;
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}
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if ((addr >= 0xE800) && (addr < 0xF000) && ((ipc_cont_unit.u3 & 0x04) == 0)) { //diagnostic ROM
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sim_printf("Write to R/O memory address %04X from PC=%04X - ignored\n", addr, saved_PC);
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return;
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}
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RAM_put_mbyte(addr, val);
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}
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/* put a word to memory */
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void put_mword(uint16 addr, uint16 val)
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{
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put_mbyte(addr, val & 0xff);
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put_mbyte(addr+1, val >> 8);
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}
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/* end of ipc.c */
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121
Intel-Systems/imds-225/system_defs.h
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121
Intel-Systems/imds-225/system_defs.h
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/* system_defs.h: Intel iSBC simulator definitions
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
|
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
|
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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William A. Beech BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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?? ??? 10 - Original file.
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*/
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#include <stdio.h>
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#include <ctype.h>
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#include "sim_defs.h" /* simulator defns */
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#define IPC 0
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/* set the base for the zx-200a disk controller */
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#define ZX200A_BASE_DD 0x78
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#define ZX200A_BASE_SD 0x88
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/* set the base for the DBB ports */
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#define DBB_BASE 0xC0
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/* set the base I/O address for the 8255 */
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#define I8255_BASE_0 0xE4
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#define I8255_BASE_1 0xE8
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#define I8255_NUM 2
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/* set the base I/O address for the 8253 */
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#define I8253_BASE 0xF0
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#define I8253_NUM 1
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/* set the base I/O address for the 8251 */
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#define I8251_BASE_0 0xF4
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#define I8251_BASE_1 0xF6
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#define I8251_NUM 2
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/* set the base I/O address for the 8259 */
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#define I8259_BASE_0 0xFA
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#define I8259_BASE_1 0xFC
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#define I8259_NUM 2
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/* set the base I/O address for the IPC control port */
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#define ICONT_BASE 0xFF
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/* set the base and size for the EPROM on the MDS 225 */
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#define ROM_BASE 0x0000
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#define ROM_SIZE 0x1000
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/* set the base and size for the RAM on the MDS 225 */
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#define RAM_BASE 0x0000
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#define RAM_SIZE 0xF800
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/* set INTR for CPU */
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#define INTR INT_1
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/* multibus interrupt definitions */
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#define INT_0 0x01
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#define INT_1 0x02
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#define INT_2 0x04
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#define INT_3 0x08
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#define INT_4 0x10
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#define INT_5 0x20
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#define INT_6 0x40
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#define INT_7 0x80
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/* CPU interrupts definitions */
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#define INT_R 0x200
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#define I75 0x40
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#define I65 0x20
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#define I55 0x10
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/* Memory */
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#define MAXMEMSIZE 0x10000 /* 8080 max memory size */
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#define MEMSIZE (i8080_unit.capac) /* 8080 actual memory size */
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#define ADDRMASK (MAXMEMSIZE - 1) /* 8080 address mask */
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#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
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/* debug definitions */
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#define DEBUG_flow 0x0001
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#define DEBUG_read 0x0002
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#define DEBUG_write 0x0004
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#define DEBUG_level1 0x0008
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#define DEBUG_level2 0x0010
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#define DEBUG_reg 0x0020
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#define DEBUG_asm 0x0040
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#define DEBUG_xack 0x0080
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#define DEBUG_all 0xFFFF
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/* Simulator stop codes */
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#define STOP_RSRV 1 /* must be 1 */
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#define STOP_HALT 2 /* HALT */
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#define STOP_IBKPT 3 /* breakpoint */
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#define STOP_OPCODE 4 /* Invalid Opcode */
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#define STOP_IO 5 /* I/O error */
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#define STOP_MEM 6 /* Memory error */
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#define STOP_XACK 7 /* XACK error */
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