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Initial public version of TX-0 for SIMH

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Integrate TX-0 simulation into SIMH.
This commit is contained in:
Howard M. Harte
2012-11-07 20:47:26 -08:00
parent be1e1326b3
commit 35ef1c8d24
25 changed files with 11346 additions and 0 deletions
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20
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//{{NO_DEPENDENCIES}}
// Microsoft Visual C++ generated include file.
// Used by tx0.rc
//
#define HTC_VERS_MIN 0
#define HTC_VERS_REV 0
#define HTC_VERS_MAJ 1
#define IDI_ICON1 106
#define HTC_VERS_BUILD 1746
// Next default values for new objects
//
#ifdef APSTUDIO_INVOKED
#ifndef APSTUDIO_READONLY_SYMBOLS
#define _APS_NEXT_RESOURCE_VALUE 108
#define _APS_NEXT_COMMAND_VALUE 40001
#define _APS_NEXT_CONTROL_VALUE 1001
#define _APS_NEXT_SYMED_VALUE 101
#endif
#endif

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// Microsoft Visual C++ generated resource script.
//
#include "resource.h"
#define APSTUDIO_READONLY_SYMBOLS
/////////////////////////////////////////////////////////////////////////////
//
// Generated from the TEXTINCLUDE 2 resource.
//
#include "afxres.h"
/////////////////////////////////////////////////////////////////////////////
#undef APSTUDIO_READONLY_SYMBOLS
/////////////////////////////////////////////////////////////////////////////
// English (U.S.) resources
#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU)
#ifdef _WIN32
LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US
#pragma code_page(1252)
#endif //_WIN32
#ifdef APSTUDIO_INVOKED
/////////////////////////////////////////////////////////////////////////////
//
// TEXTINCLUDE
//
1 TEXTINCLUDE
BEGIN
"resource.h\0"
END
2 TEXTINCLUDE
BEGIN
"#include ""afxres.h""\r\n"
"\0"
END
3 TEXTINCLUDE
BEGIN
"\r\n"
"\0"
END
#endif // APSTUDIO_INVOKED
/////////////////////////////////////////////////////////////////////////////
//
// Version
//
VS_VERSION_INFO VERSIONINFO
FILEVERSION 1,0,0,1746
PRODUCTVERSION 1,0,0,1746
FILEFLAGSMASK 0x17L
#ifdef _DEBUG
FILEFLAGS 0x1L
#else
FILEFLAGS 0x0L
#endif
FILEOS 0x4L
FILETYPE 0x1L
FILESUBTYPE 0x0L
BEGIN
BLOCK "StringFileInfo"
BEGIN
BLOCK "040904b0"
BEGIN
VALUE "FileDescription", "SIMH TX-0 Simulator"
VALUE "FileVersion", "1.0.0.1746"
VALUE "InternalName", "TX-0"
VALUE "LegalCopyright", "Copyright (c) 2009-2012, Howard M. Harte"
VALUE "OriginalFilename", "TX0.exe"
VALUE "ProductName", " TX-0 Application"
VALUE "ProductVersion", "1.0.0.1746"
END
END
BLOCK "VarFileInfo"
BEGIN
VALUE "Translation", 0x409, 1200
END
END
/////////////////////////////////////////////////////////////////////////////
//
// Icon
//
// Icon with lowest ID value placed first to ensure application icon
// remains consistent on all systems.
IDI_ICON1 ICON "tx0.ico"
#endif // English (U.S.) resources
/////////////////////////////////////////////////////////////////////////////
#ifndef APSTUDIO_INVOKED
/////////////////////////////////////////////////////////////////////////////
//
// Generated from the TEXTINCLUDE 3 resource.
//
/////////////////////////////////////////////////////////////////////////////
#endif // not APSTUDIO_INVOKED

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/*************************************************************************
* *
* $Id: tx0_defs.h 2059 2009-02-23 05:59:14Z hharte $ *
* *
* Copyright (c) 2009 Howard M. Harte. *
* Based on pdp1_defs.h, Copyright (c) 1993-2006, Robert M. Supnik *
* *
* Permission is hereby granted, free of charge, to any person obtaining *
* a copy of this software and associated documentation files (the *
* "Software"), to deal in the Software without restriction, including *
* without limitation the rights to use, copy, modify, merge, publish, *
* distribute, sublicense, and/or sell copies of the Software, and to *
* permit persons to whom the Software is furnished to do so, subject to *
* the following conditions: *
* *
* The above copyright notice and this permission notice shall be *
* included in all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *
* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *
* *
* Except as contained in this notice, the name of Howard M. Harte shall *
* not be used in advertising or otherwise to promote the sale, use or *
* other dealings in this Software without prior written authorization *
* of Howard M. Harte. *
* *
* Module Description: *
* cpu TX-0 Central Processor *
* *
* Environment: *
* User mode only *
* *
*************************************************************************/
#ifndef _PDP1_DEFS_H_
#define _PDP1_DEFS_H_ 0
#include "sim_defs.h"
/* Simulator stop codes */
#define STOP_RSRV 1 /* must be 1 */
#define STOP_HALT 2 /* HALT */
#define STOP_IBKPT 3 /* breakpoint */
/* Memory */
#define ASIZE 16 /* address bits */
#define MAXMEMSIZE (1u << ASIZE) /* max mem size */
#define AMASK (MAXMEMSIZE - 1) /* address mask */
#define MEMSIZE (cpu_unit.capac) /* actual memory size */
#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
/* Architectural constants */
#define SIGN 0400000 /* sign */
#define DMASK 0777777 /* data mask */
#define YMASK 0017777 /* "Y" Mask for address calculation (13 bits) */
/* I/O status flags */
#define IOS_V_LPN 17 /* light pen */
#define IOS_V_PETR 16 /* paper tape reader */
#define IOS_V_TTO 15 /* typewriter out */
#define IOS_V_TTI 14 /* typewriter in */
#define IOS_V_PTP 13 /* paper tape punch */
#define IOS_V_DRM 12 /* drum */
#define IOS_V_SQB 11 /* sequence break */
#define IOS_V_PNT 3 /* print done */
#define IOS_V_SPC 2 /* space done */
#define IOS_V_DCS 1 /* data comm sys */
#define IOS_V_DRP 0 /* parallel drum busy */
#define IOS_LPN (1 << IOS_V_LPN)
#define IOS_PETR (1 << IOS_V_PETR)
#define IOS_TTO (1 << IOS_V_TTO)
#define IOS_TTI (1 << IOS_V_TTI)
#define IOS_PTP (1 << IOS_V_PTP)
#define IOS_DRM (1 << IOS_V_DRM)
#define IOS_SQB (1 << IOS_V_SQB)
#define IOS_PNT (1 << IOS_V_PNT)
#define IOS_SPC (1 << IOS_V_SPC)
#define IOS_DCS (1 << IOS_V_DCS)
#define IOS_DRP (1 << IOS_V_DRP)
#define UNIT_V_MODE (UNIT_V_UF + 0)
#define UNIT_MODE (3 << UNIT_V_MODE)
#define UNIT_MODE_READIN (3 << UNIT_V_MODE)
#define UNIT_MODE_TEST (1 << UNIT_V_MODE)
#endif

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Programs that are known to work well:
bin_tic-tac-toe_new_code_12-16-61.bin, seems to fully work:
sim> boot petr
sim> g (will halt with 205200 in LR)
sim> e lr
LR: 205200
sim> g (again to start game.)
bin_tstDisplay.bin, makes a diagonal line on the DPY
bin_lightGunTst.bin, can draw on screen with light pen.
bin_newMouse_3-22-66.bin - These kind of work, but mouse gives up easy
bin_newMouse_8-14-61.bin - and can crash on complex mazes. Sim bug
somewhere.

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/*************************************************************************
* *
* $Id: tx0_dpy.c 2060 2009-02-24 06:49:07Z hharte $ *
* *
* Copyright (c) 2009-2012, Howard M. Harte *
* Copyright (c) 2004, Philip L. Budne *
* Copyright (c) 1993-2003, Robert M. Supnik *
* *
* Permission is hereby granted, free of charge, to any person obtaining *
* a copy of this software and associated documentation files (the *
* "Software"), to deal in the Software without restriction, including *
* without limitation the rights to use, copy, modify, merge, publish, *
* distribute, sublicense, and/or sell copies of the Software, and to *
* permit persons to whom the Software is furnished to do so, subject to *
* the following conditions: *
* *
* The above copyright notice and this permission notice shall be *
* included in all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *
* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *
* *
* Except as contained in this notice, the name of Howard M. Harte shall *
* not be used in advertising or otherwise to promote the sale, use or *
* other dealings in this Software without prior written authorization *
* of Howard M. Harte. *
* *
* Module Description: *
* TX-0 display simulator *
* *
* Environment: *
* User mode only *
* *
*************************************************************************/
#ifdef USE_DISPLAY
#include "tx0_defs.h"
#include "display/display.h"
extern int32 ios, iosta, PF;
extern int32 stop_inst;
extern int32 PEN_HIT;
t_stat dpy_svc (UNIT *uptr);
t_stat dpy_reset (DEVICE *dptr);
/* DPY data structures
dpy_dev DPY device descriptor
dpy_unit DPY unit
dpy_reg DPY register list
*/
#define CYCLE_TIME 5 /* 5us memory cycle */
#define DPY_WAIT (50/CYCLE_TIME) /* 50us */
UNIT dpy_unit = {
UDATA (&dpy_svc, UNIT_ATTABLE, 0), DPY_WAIT };
DEVICE dpy_dev = {
"DPY", &dpy_unit, NULL, NULL,
1, 10, 31, 1, 8, 8,
NULL, NULL, &dpy_reset,
NULL, NULL, NULL,
NULL, DEV_DISABLE };
/* Display Routine */
int32 dpy (int32 ac)
{
int32 pen_hit;
int32 x, y;
int level;
if (dpy_dev.flags & DEV_DIS) /* disabled? */
return SCPE_UDIS;
x = (ac >> 9) & 0777; /* X = high nine bits of AC */
y = (ac & 0777); /* Y = low nine bits of AC */
/*
* convert one's complement -255..+255 center origin
* to 0..511 (lower left origin)
*/
if (x & 0400)
x ^= 0400;
else
x += 255;
if (y & 0400)
y ^= 0400;
else
y += 255;
level = DISPLAY_INT_MAX; /* Maximum intensity */
if (display_point(x,y,level,0)) {
/* here with light pen hit */
PF = PF | 010; /* set prog flag 3 */
pen_hit = 1;
} else {
pen_hit = 0;
}
sim_activate (&dpy_unit, dpy_unit.wait); /* activate */
return pen_hit;
}
/*
* Unit service routine
*
* Under X11 this includes polling for events, so it can't be
* call TOO infrequently...
*/
t_stat dpy_svc (UNIT *uptr)
{
display_age(dpy_unit.wait*CYCLE_TIME, 1);
sim_activate (&dpy_unit, dpy_unit.wait); /* requeue! */
return SCPE_OK;
}
/* Reset routine */
t_stat dpy_reset (DEVICE *dptr)
{
display_init(DIS_TX0, RES_FULL);
display_reset();
iosta = iosta & ~(IOS_PNT | IOS_SPC); /* clear flags */
sim_cancel (&dpy_unit); /* deactivate unit */
return SCPE_OK;
}
#else /* USE_DISPLAY not defined */
char tx0_dpy_unused; /* sometimes empty object modules cause problems */
#endif /* USE_DISPLAY not defined */

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/*************************************************************************
* *
* $Id: tx0_stddev.c 2063 2009-02-25 07:37:57Z hharte $ *
* *
* Copyright (c) 2009-2012 Howard M. Harte. *
* Based on pdp1_stddev.c, Copyright (c) 1993-2006, Robert M. Supnik *
* *
* Permission is hereby granted, free of charge, to any person obtaining *
* a copy of this software and associated documentation files (the *
* "Software"), to deal in the Software without restriction, including *
* without limitation the rights to use, copy, modify, merge, publish, *
* distribute, sublicense, and/or sell copies of the Software, and to *
* permit persons to whom the Software is furnished to do so, subject to *
* the following conditions: *
* *
* The above copyright notice and this permission notice shall be *
* included in all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *
* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *
* *
* Except as contained in this notice, the name of Howard M. Harte shall *
* not be used in advertising or otherwise to promote the sale, use or *
* other dealings in this Software without prior written authorization *
* of Howard M. Harte. *
* *
* Module Description: *
* TX-0 Standard Devices *
* *
* Environment: *
* User mode only *
* *
*************************************************************************/
/*
petr paper tape reader
ptp paper tape punch
tti keyboard
tto teleprinter
Note: PTP timeout must be >10X faster than TTY output timeout for Macro
to work correctly!
*/
#include "tx0_defs.h"
#define FLEXO_STOP 061 /* stop code */
#define FLEXO_UC 071
#define FLEXO_LC 075
#define UC_V 6 /* upper case */
#define UC (1 << UC_V)
#define BOTH (1 << (UC_V + 1)) /* both cases */
#define CW (1 << (UC_V + 2)) /* char waiting */
#define TT_WIDTH 077
#define UNIT_V_ASCII (UNIT_V_UF + 0) /* ASCII/binary mode */
#define UNIT_ASCII (1 << UNIT_V_ASCII)
#define PETR_LEADER 20 /* ASCII leader chars */
#define TRACE_PRINT(dev, level, args) if(dev.dctrl & level) { \
printf args; \
}
int32 petr_state = 0;
int32 petr_wait = 0;
int32 petr_stopioe = 0;
int32 petr_uc = 0; /* upper/lower case */
int32 petr_hold = 0; /* holding buffer */
int32 petr_leader = PETR_LEADER; /* leader count */
int32 ptp_stopioe = 0;
int32 tti_hold = 0; /* tti hold buf */
int32 tty_buf = 0; /* tty buffer */
int32 tty_uc = 0; /* tty uc/lc */
int32 tto_sbs = 0;
extern int32 ios, iosta;
extern int32 PF, IR, PC, TA;
extern int32 M[];
t_stat petr_svc (UNIT *uptr);
t_stat ptp_svc (UNIT *uptr);
t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat petr_reset (DEVICE *dptr);
t_stat ptp_reset (DEVICE *dptr);
t_stat tty_reset (DEVICE *dptr);
t_stat petr_boot (int32 unitno, DEVICE *dptr);
t_stat petr_attach (UNIT *uptr, char *cptr);
/* Character translation tables */
int32 flexo_to_ascii[128] = {
/*00*/ 0, 0, 'e', '8', 0, '|', 'a', '3', /* lower case */
/*10*/ ' ', '=', 's', '4', 'i', '+', 'u', '2',
/*20*/ 0, '.', 'd', '5', 'r', '1', 'j', '7',
/*30*/ 'n', ',', 'f', '6', 'c', '-', 'k', 0,
/*40*/ 't', 0, 'z', '\b','l', '\t','w', 0,
/*50*/ 'h', '\r','y', 0, 'p', 0, 'q', 0,
/*60*/ 'o', '*', 'b', 0, 'g', 0, '9', 0,
/*70*/ 'm', 0, 'x', 0, 'v', 0, '0', 0,
/*00*/ 0, 0, 'E', '8', 0, '_', 'A', '3', /* upper case */
/*10*/ ' ', ':', 'S', '4', 'I', '/', 'U', '2',
/*20*/ 0, ')', 'D', '5', 'R', '1', 'J', '7',
/*30*/ 'N', '(', 'F', '6', 'C', '-', 'K', 0,
/*40*/ 'T', 0, 'Z', '\b','L', '\t','W', 0,
/*50*/ 'H', '\r','Y', 0, 'P', 0, 'Q', 0,
/*60*/ 'O', '*', 'B', 0, 'G', 0, '9', 0,
/*70*/ 'M', 0, 'X', 0, 'V', 0, '0', 0,
};
int32 ascii_to_flexo[128] = {
/*00*/ 0, 0, 0, BOTH+061, 0, 0, 0, 0, /* STOP mapped to ^C */
/*10*/ BOTH+043, BOTH+045, 0, 0, 0, BOTH+051, 0, 0,
/*20*/ 0, 0, 0, 0, 0, 0, 0, 0,
/*30*/ 0, 0, 0, BOTH+020, 0, 0, 0, 0, /* Color Shift mapped to ESC */
/*40*/ BOTH+010, 0, 0, 0, 0, 0, 0, 0, /* " ", */
/*50*/ UC+021, UC+031, 021, 015, 031, UC+035, UC+011, UC+015, /* ()*+,-./ */
/*60*/ 076, 025, 017, 007, 013, 023, 033, 027, /* 0-7 */
/*70*/ 003, 066, 0, 0, 0, 011, 0, 0, /* 89:;<=>? */
/*00*/ 040, UC+006, UC+062, UC+034, UC+022, UC+002, UC+032, UC+064, /* A-G */
/*10*/ UC+050, UC+014, UC+026, UC+036, UC+044, UC+070, UC+030, UC+060, /* H-O */
/*20*/ UC+054, UC+056, UC+024, UC+012, 040, 016, 074, 046, /* P-W */
/*30*/ UC+072, UC+052, UC+042, 0, 0, 0, 0, UC+005, /* X-Z, */
/*40*/ 00, 006, 062, 034, 022, 002, 032, 064, /* a-g */
/*50*/ 050, 014, 026, 036, 044, 070, 030, 060, /* h-o */
/*60*/ 054, 056, 024, 012, 040, 016, 074, 046, /* p-w */
/*70*/ 072, 052, 042, 0, 005, 0, UC+035, BOTH+077 /* x-z, */
};
/* PETR data structures
petr_dev PETR device descriptor
petr_unit PETR unit
petr_reg PETR register list
*/
UNIT petr_unit = {
UDATA (&petr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
SERIAL_IN_WAIT
};
REG petr_reg[] = {
{ ORDATA (BUF, petr_unit.buf, 18) },
{ FLDATA (UC, petr_uc, UC_V) },
{ FLDATA (DONE, iosta, IOS_V_PETR) },
{ ORDATA (HOLD, petr_hold, 9), REG_HRO },
{ ORDATA (STATE, petr_state, 5), REG_HRO },
{ FLDATA (WAIT, petr_wait, 0), REG_HRO },
{ DRDATA (POS, petr_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, petr_unit.wait, 24), PV_LEFT },
{ DRDATA (LEADER, petr_leader, 6), REG_HRO },
{ FLDATA (STOP_IOE, petr_stopioe, 0) },
{ NULL }
};
MTAB petr_mod[] = {
{ UNIT_ASCII, UNIT_ASCII, "ASCII", "ASCII", NULL },
{ UNIT_ASCII, 0, "FLEXO", "FLEXO", NULL },
{ 0 }
};
/* Debug flags */
#define ERROR_MSG (1 << 0)
#define TRACE_MSG (1 << 1)
#define VERBOSE_MSG (1 << 2)
/* Debug Flags */
static DEBTAB petr_dt[] = {
{ "ERROR", ERROR_MSG },
{ "TRACE", TRACE_MSG },
{ "VERBOSE",VERBOSE_MSG },
{ NULL, 0 }
};
DEVICE petr_dev = {
"PETR", &petr_unit, petr_reg, petr_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &petr_reset,
&petr_boot, &petr_attach, NULL,
NULL, DEV_DEBUG, (ERROR_MSG),
petr_dt, NULL
};
/* PTP data structures
ptp_dev PTP device descriptor
ptp_unit PTP unit
ptp_reg PTP register list
*/
UNIT ptp_unit = {
UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT
};
REG ptp_reg[] = {
{ ORDATA (BUF, ptp_unit.buf, 8) },
{ FLDATA (DONE, iosta, IOS_V_PTP) },
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
{ NULL }
};
MTAB ptp_mod[] = {
{ 0 }
};
DEVICE ptp_dev = {
"PTP", &ptp_unit, ptp_reg, ptp_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptp_reset,
NULL, NULL, NULL,
NULL, DEV_DEBUG, (ERROR_MSG|TRACE_MSG),
petr_dt, NULL
};
/* TTI data structures
tti_dev TTI device descriptor
tti_unit TTI unit
tti_reg TTI register list
*/
UNIT tti_unit = { UDATA (&tti_svc, 0, 0), KBD_POLL_WAIT };
REG tti_reg[] = {
{ ORDATA (BUF, tty_buf, 6) },
{ FLDATA (UC, tty_uc, UC_V) },
{ ORDATA (HOLD, tti_hold, 9), REG_HRO },
{ FLDATA (DONE, iosta, IOS_V_TTI) },
{ DRDATA (POS, tti_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tti_unit.wait, 24), REG_NZ + PV_LEFT },
{ NULL }
};
MTAB tti_mod[] = {
{ 0 }
};
DEVICE tti_dev = {
"TTI", &tti_unit, tti_reg, tti_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &tty_reset,
NULL, NULL, NULL,
NULL, DEV_DEBUG, (ERROR_MSG|TRACE_MSG),
petr_dt, NULL
};
/* TTO data structures
tto_dev TTO device descriptor
tto_unit TTO unit
tto_reg TTO register list
*/
UNIT tto_unit = { UDATA (&tto_svc, 0, 0), SERIAL_OUT_WAIT * 10 };
REG tto_reg[] = {
{ ORDATA (BUF, tty_buf, 6) },
{ FLDATA (UC, tty_uc, UC_V) },
{ FLDATA (DONE, iosta, IOS_V_TTO) },
{ DRDATA (POS, tto_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, tto_unit.wait, 24), PV_LEFT },
{ NULL }
};
MTAB tto_mod[] = {
{ 0 }
};
DEVICE tto_dev = {
"TTO", &tto_unit, tto_reg, tto_mod,
1, 10, 31, 1, 8, 8,
NULL, NULL, &tty_reset,
NULL, NULL, NULL,
NULL, DEV_DEBUG, (ERROR_MSG|TRACE_MSG),
petr_dt, NULL
};
/* Paper tape reader: IOT routine. Points to note:
- RPA (but not RPB) complements the reader clutch control. Thus,
if the reader is running, RPA will stop it.
- The status bit indicates data in the reader buffer that has not
been transfered to IR. It is cleared by any RB->IR operation,
including RRB and the completion pulse.
- A reader error on a wait mode operation could hang the simulator.
IOH is set; any retry (without RESET) will be NOP'd. Accordingly,
the PETR service routine clears IOH on any error during a rpa/rpb i.
*/
int32 petr (int32 inst, int32 dev, int32 dat)
{
int32 tmpAC = 0;
int i = 0;
t_stat result;
ios = 1;
for (i=0;i<inst;i++) {
do {
result = petr_svc(&petr_unit);
if (result != SCPE_OK) {
printf("PETR: Read error\n");
break;
}
} while ((petr_unit.buf & 0100) == 0); /* NOTE: Lines without seventh hole are ignored by PETR. */
petr_unit.buf &= 077; /* Mask to 6 bits. */
tmpAC |= ((petr_unit.buf & 001) >> 0) << 17; /* bit 0 */
tmpAC |= ((petr_unit.buf & 002) >> 1) << 14; /* bit 3 */
tmpAC |= ((petr_unit.buf & 004) >> 2) << 11; /* bit 6 */
tmpAC |= ((petr_unit.buf & 010) >> 3) << 8; /* bit 9 */
tmpAC |= ((petr_unit.buf & 020) >> 4) << 5; /* bit 12 */
tmpAC |= ((petr_unit.buf & 040) >> 5) << 2; /* bit 15 */
if (i < (inst-1)) {
uint32 bit0 = (tmpAC & 1) << 17;
TRACE_PRINT(petr_dev, TRACE_MSG, ("PETR read [%04x=0x%02x] %03o\n", petr_unit.pos-1, petr_unit.buf, petr_unit.buf));
tmpAC >>= 1;
tmpAC |= bit0;
} else {
TRACE_PRINT(petr_dev, TRACE_MSG, ("PETR read [%04x=0x%02x] %03o, tmpAC=%06o\n", petr_unit.pos-1, petr_unit.buf, petr_unit.buf, tmpAC));
}
}
return tmpAC;
/* sim_activate (&petr_unit, petr_unit.wait); */ /* start reader */
}
/* Unit service */
t_stat petr_svc (UNIT *uptr)
{
int32 temp;
if ((uptr->flags & UNIT_ATT) == 0) { /* attached? */
ios = 0;
return SCPE_OK;
}
if ((temp = getc (uptr->fileref)) != EOF) { /* no, get raw char */
uptr->pos = uptr->pos + 1; /* if not eof, count */
}
if (temp == EOF) { /* end of file? */
if (feof (uptr->fileref)) {
ios = 0;
return SCPE_IOERR;
}
else perror ("PETR I/O error");
clearerr (uptr->fileref);
ios = 0;
return SCPE_IOERR;
}
uptr->buf = temp;
ios = 0;
return SCPE_OK;
}
/* Reset routine */
t_stat petr_reset (DEVICE *dptr)
{
petr_state = 0; /* clear state */
petr_wait = 0;
petr_hold = 0;
petr_uc = 0;
petr_unit.buf = 0;
iosta = iosta & ~IOS_PETR; /* clear flag */
sim_cancel (&petr_unit); /* deactivate unit */
return SCPE_OK;
}
/* Attach routine */
t_stat petr_attach (UNIT *uptr, char *cptr)
{
petr_leader = PETR_LEADER; /* set up leader */
return attach_unit (uptr, cptr);
}
/* Bootstrap routine */
extern t_stat cpu_set_mode (UNIT *uptr, int32 val, char *cptr, void *desc);
extern UNIT cpu_unit;
//#define SANITY_CHECK_TAPE
/* Switches the CPU to READIN mode and starts execution. */
t_stat petr_boot (int32 unitno, DEVICE *dptr)
{
t_stat reason = SCPE_OK;
#ifdef SANITY_CHECK_TAPE
int32 AC, MBR, MAR, IR = 0;
int32 blkcnt, chksum = 0, fa, la;
int32 addr, tdata;
#endif /* SANITY_CHECK_TAPE */
/* Switch to READIN mode. */
cpu_set_mode(&cpu_unit, UNIT_MODE_READIN, NULL, NULL);
#ifdef SANITY_CHECK_TAPE
for(;(IR != 2) && (IR != 1);) {
AC = petr(3,0,0); /* Read three chars from tape into AC */
MAR = AC & AMASK; /* Set memory address */
IR = AC >> 16;
if (!MEM_ADDR_OK(MAR)) {
TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: Tape address out of range.\n"));
reason = SCPE_FMT;
}
switch (IR) {
case 00: /* Storage (sto x) */
case 03: /* Storage (opr x) */
MBR = petr(3,0,0); /* Read three characters from tape. */
TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: sto @%06o = %06o\n", MAR, MBR));
printf("[%06o] = %06o\n", MAR, MBR);
break;
case 02: /* Transfer Control (trn x) Start Execution */
PC = MAR;
reason = SCPE_OK; /* let SIMH start execution. */
TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: trn %06o (Start Execution)\n", PC));
reason = cpu_set_mode(&cpu_unit, 0, NULL, NULL);
break;
case 01: /* Transfer (add x) - Halt */
PC = MAR;
reason = SCPE_STOP; /* let SIMH halt. */
TRACE_PRINT(petr_dev, ERROR_MSG, ("READIN: add %06o (Halt)\n", PC));
reason = cpu_set_mode(&cpu_unit, 0, NULL, NULL);
break;
default:
reason = SCPE_IERR;
break;
}
}
blkcnt = 0;
while (1) {
chksum = 0;
fa = petr(3,0,0); /* Read three characters from tape. */
if ((fa & 0400000) || (fa & 0200000)) {
break;
}
chksum += fa;
if (chksum > 0777777) {
chksum +=1;
}
chksum &= 0777777;
la = petr(3,0,0); /* Read three characters from tape. */
chksum += la;
if (chksum > 0777777) {
chksum +=1;
}
chksum &= 0777777;
la = (~la) & 0177777;
printf("First Address=%06o, Last Address=%06o\n", fa, la);
for(addr = fa; addr <= la; addr++) {
tdata = petr(3,0,0); /* Read three characters from tape. */
chksum += tdata;
if (chksum > 0777777) {
chksum +=1;
}
chksum &= 0777777;
}
chksum = (~chksum) & 0777777;
tdata = petr(3,0,0);
if (chksum != tdata) {
reason = SCPE_FMT;
}
printf("Block %d: Calculated checksum=%06o, real checksum=%06o, %s\n", blkcnt, chksum, tdata, chksum == tdata ? "OK" : "BAD Checksum!");
blkcnt++;
}
fseek (petr_dev.units[0].fileref, 0, SEEK_SET);
#endif /* SANITY_CHECK_TAPE */
/* Start Execution */
return (reason);
}
/* Paper tape punch: IOT routine */
int32 ptp (int32 inst, int32 dev, int32 dat)
{
iosta = iosta & ~IOS_PTP; /* clear flag */
ptp_unit.buf = dat & 0177;
ptp_svc (&ptp_unit);
/* sim_activate (&ptp_unit, ptp_unit.wait); */ /* start unit */
return dat;
}
/* Unit service */
t_stat ptp_svc (UNIT *uptr)
{
ios = 1; /* restart */
iosta = iosta | IOS_PTP; /* set flag */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
return SCPE_UNATT;
if (putc (uptr->buf, uptr->fileref) == EOF) { /* I/O error? */
perror ("PTP I/O error");
clearerr (uptr->fileref);
return SCPE_IOERR;
}
uptr->pos = uptr->pos + 1;
return SCPE_OK;
}
/* Reset routine */
t_stat ptp_reset (DEVICE *dptr)
{
ptp_unit.buf = 0; /* clear state */
iosta = iosta & ~IOS_PTP; /* clear flag */
sim_cancel (&ptp_unit); /* deactivate unit */
return SCPE_OK;
}
/* Typewriter IOT routines */
int32 tti (int32 inst, int32 dev, int32 dat)
{
iosta = iosta & ~IOS_TTI; /* clear flag */
return tty_buf & 077;
}
int32 tto (int32 inst, int32 dev, int32 dat)
{
tty_buf = dat & TT_WIDTH; /* load buffer */
ios = 0;
tto_svc(&tto_unit);
/* sim_activate (&tto_unit, tto_unit.wait); */ /* activate unit */
return dat;
}
/* Unit service routines */
t_stat tti_svc (UNIT *uptr)
{
int32 in = 0, temp = 0;
sim_activate (uptr, uptr->wait); /* continue poll */
if (tti_hold & CW) { /* char waiting? */
tty_buf = tti_hold & TT_WIDTH; /* return char */
tti_hold = 0; /* not waiting */
} else {
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG) return temp;
if (temp & SCPE_BREAK) return SCPE_OK; /* ignore break */
temp = temp & 0177;
if (temp == 0177) temp = '\b'; /* rubout? bs */
sim_putchar (temp); /* echo */
if (temp == '\r') sim_putchar ('\n'); /* cr? add nl */
in = ascii_to_flexo[temp]; /* translate char */
if (in == 0) return SCPE_OK; /* no xlation? */
if ((in & BOTH) || ((in & UC) == (tty_uc & UC))) {
tty_buf = in & TT_WIDTH;
} else { /* must shift */
tty_uc = in & UC; /* new case */
tty_buf = tty_uc? FLEXO_UC: FLEXO_LC;
tti_hold = in | CW; /* set 2nd waiting */
}
}
iosta = iosta | IOS_TTI; /* set flag */
TRACE_PRINT(tti_dev, TRACE_MSG, ("TTI read ASCII: %02x / FLEXO=%03o\n", temp, tty_buf));
uptr->pos = uptr->pos + 1;
return SCPE_OK;
}
t_stat tto_svc (UNIT *uptr)
{
int32 c = 0;
t_stat r;
if (tty_buf == FLEXO_UC) tty_uc = UC; /* upper case? */
else if (tty_buf == FLEXO_LC) tty_uc = 0; /* lower case? */
else {
c = flexo_to_ascii[tty_buf | tty_uc]; /* translate */
if (c && ((r = sim_putchar_s (c)) != SCPE_OK)) { /* output; error? */
sim_activate (uptr, uptr->wait); /* retry */
return ((r == SCPE_STALL)? SCPE_OK: r);
}
}
iosta = iosta | IOS_TTO; /* set flag */
uptr->pos = uptr->pos + 1;
if (c == '\r') { /* cr? add lf */
sim_putchar ('\n');
uptr->pos = uptr->pos + 1;
}
return SCPE_OK;
}
/* Reset routine */
t_stat tty_reset (DEVICE *dptr)
{
tty_buf = 0; /* clear buffer */
tty_uc = 0; /* clear case */
tti_hold = 0; /* clear hold buf */
iosta = (iosta & ~IOS_TTI) | IOS_TTO; /* clear flag */
sim_activate (&tti_unit, tti_unit.wait); /* activate keyboard */
sim_cancel (&tto_unit); /* stop printer */
return SCPE_OK;
}

439
TX-0/tx0_sys.c Normal file
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@@ -0,0 +1,439 @@
/*************************************************************************
* *
* $Id: tx0_sys.c 2061 2009-02-24 07:05:58Z hharte $ *
* *
* Copyright (c) 2009-2012 Howard M. Harte. *
* Based on pdp1_sys.c, Copyright (c) 1993-2007, Robert M. Supnik *
* *
* Permission is hereby granted, free of charge, to any person obtaining *
* a copy of this software and associated documentation files (the *
* "Software"), to deal in the Software without restriction, including *
* without limitation the rights to use, copy, modify, merge, publish, *
* distribute, sublicense, and/or sell copies of the Software, and to *
* permit persons to whom the Software is furnished to do so, subject to *
* the following conditions: *
* *
* The above copyright notice and this permission notice shall be *
* included in all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *
* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *
* *
* Except as contained in this notice, the name of Howard M. Harte shall *
* not be used in advertising or otherwise to promote the sale, use or *
* other dealings in this Software without prior written authorization *
* of Howard M. Harte. *
* *
* Module Description: *
* TX-0 simulator interface *
* *
* Environment: *
* User mode only *
* *
*************************************************************************/
#include "tx0_defs.h"
#include <ctype.h>
extern DEVICE cpu_dev;
extern DEVICE petr_dev;
extern DEVICE tto_dev;
extern DEVICE tti_dev;
extern DEVICE ptp_dev;
#ifdef USE_DISPLAY
extern DEVICE dpy_dev;
#endif /* USE_DISPLAY */
#ifdef USE_FPC
extern DEVICE fpc_dev;
#endif /* USE_FPC */
extern UNIT cpu_unit;
extern REG cpu_reg[];
extern int32 M[];
extern int32 PC;
extern int32 ascii_to_flexo[], flexo_to_ascii[];
extern int32 sc_map[];
extern int32 sim_switches;
/* SCP data structures and interface routines
sim_name simulator name string
sim_PC pointer to saved PC register descriptor
sim_emax number of words for examine
sim_devices array of pointers to simulated devices
sim_stop_messages array of pointers to stop messages
sim_load binary loader
*/
char sim_name[] = "TX-0";
REG *sim_PC = &cpu_reg[0];
int32 sim_emax = 1;
DEVICE *sim_devices[] = {
&cpu_dev,
&petr_dev,
&tti_dev,
&tto_dev,
&ptp_dev,
#ifdef USE_DISPLAY
&dpy_dev,
#endif/* USE_DISPLAY */
#ifdef USE_FPC
&fpc_dev,
#endif /* USE_FPC */
NULL
};
const char *sim_stop_messages[] = {
"Unknown error",
"Undefined instruction",
"HALT instruction",
"Breakpoint",
"Nested XCT's",
"Nested indirect addresses",
"Infinite I/O wait state",
"DECtape off reel"
};
int32 tx0_getw (FILE *inf)
{
int32 i, tmp, word;
word = 0;
for (i = 0; i < 3;) {
if ((tmp = getc (inf)) == EOF) return -1;
if (tmp & 0200) {
word = (word << 6) | (tmp & 077);
i++;
}
}
return word;
}
/* Symbol tables */
typedef struct {
int32 opr;
char *mnemonic;
char *desc;
} OPMAP;
typedef struct {
char *mnemonic;
char *desc;
} INSTMAP;
const INSTMAP instmap[] = {
/* Store Class */
{ "sto", "Store AC" },
{ "stx", "Store AC, Indexed" },
{ "sxa", "Store XR in Address" },
{ "ado", "Add One" },
{ "slr", "Store LR" },
{ "slx", "Store LR, Indexed" },
{ "stz", "Store Zero" },
{ "[!sto-nop]", "NOP" },
/* Add Class */
{ "add", "Add" },
{ "adx", "Add, Indexed" },
{ "ldx", "Load XR" },
{ "aux", "Augment XR" },
{ "llr", "Load LR" },
{ "llx", "Load LR, Indexed" },
{ "lda", "Load AC" },
{ "lax", "Load AC, Indexed" },
/* Transfer Class */
{ "trn", "Transfer Negative" },
{ "trz", "Transfer +/- Zero" },
{ "tsx", "Transfer and set Index" },
{ "tix", "Transfer and Index" },
{ "tra", "Transfer" },
{ "trx", "Transfer Indexed" },
{ "tlv", "Transfer on external Level" },
{ "[!tra-nop]", "NOP" }
};
const OPMAP opmap [] = {
{ 0600000, "opr", "No operation" },
{ 0600001, "xro", "Clear XR to +0" },
{ 0600003, "lxr", "Place LR in XR" },
{ 0600012, "cry", "Carry the contents of AC according to bits of LR" },
{ 0600022, "lpd", "Logical exclusive or of AC is placed in AC (partial add)" },
{ 0600032, "lad", "Add LR to AC" },
{ 0600040, "com", "Compliment the AC" },
{ 0600072, "lcd", "Contents of LR minus those of AC are placed in AC" },
{ 0600130, "xad", "Add index register to accumulator" },
{ 0600170, "xcd", "Contents of XR minus those of AC are placed in AC" },
{ 0600200, "lro", "Clear LR to +0" },
{ 0600300, "xlr", "Place XR in LR" },
{ 0600303, "ixl", "Interchange XR and LR" },
{ 0600400, "shr", "Shift accumulator right one place, bit 0 remains unchanged" },
{ 0600600, "cyr", "Cycle AC right one place" },
{ 0603000, "pen", "Contents of light pen and light cannon flip-flops replace contents of AC bits 0 and 1. The flip-flops are cleared." },
{ 0604000, "bsr", "Backspace tape unit by one record" },
{ 0604004, "rtb", "Read tape binary (odd parity)" },
{ 0604004, "rds", "Select tape unit for reading a record" },
{ 0604010, "rew", "Rewind tape unit" },
{ 0604014, "wtb", "Write tape binary (odd parity)" },
{ 0604014, "wrs", "Select tape unit for writing a record" },
{ 0604024, "rtd", "Read tape decimal (even parity)" },
{ 0604034, "wtd", "Write tape decimal (even parity)" },
{ 0607000, "cpf", "The program flag is cleared" },
{ 0620000, "cpy", "Transmit information between the live register and selected input-output unit" },
{ 0622000, "dis", "Display point on CRT corresponding to contents of AC" },
{ 0624000, "prt", "Print one on-line flexo character from bits 2, 5, etc." },
{ 0624600, "pnt", "PRT, then cycle AC right once to set up another character" },
{ 0625000, "typ", "Read one character from on-line flexowriter into LR bits 12-17" },
{ 0626600, "p6h", "Punch one line of paper tape; 6 holes from bits 2, 5, etc. of AC then cycle right once." },
{ 0627600, "p7h", "Same as p6h, but punch 7th hole" },
{ 0630000, "hlt", "Stops computer" },
{ 0631000, "cll", "Clear left half of AC to zero" },
{ 0632000, "clr", "Clear right half of AC" },
{ 0632022, "---", "CLR+PAD+LMB" },
{ 0640001, "axr", "Place AC contents in XR" },
{ 0640021, "axo", "AXR, then set AC to +0" },
{ 0640030, "cyl", "Cycle AC left one place" },
{ 0640031, "alx", "AXR, then cycle AC left once" },
{ 0640040, "amz", "Add minus zero to AC" },
{ 0640061, "axc", "AXR, then set AC to -0" },
{ 0640200, "alr", "Place accumulator contents in live register" },
{ 0640201, "---", "ALR+MBX, Place accumulator contents in live register, Transfer MBR to XR." },
{ 0640203, "rax", "Place LR in XR, then place AC in LR" },
{ 0640205, "orl", "Logical or of AC and LR is placed in LR" },
{ 0640207, "anl", "Logical and of AC and LR is placed in LR" },
{ 0640220, "alo", "ALR, then set AC to +0" },
{ 0640230, "all", "ALR, then cycle left once" },
{ 0640231, "---", "AMB+MBL+PAD+CRY+MBX" },
{ 0640232, "iad", "Interchange and add AC contents are placed in the LR and the previous contents of the LR ar added to AC" },
{ 0640260, "alc", "ALR, then set AC to -0" },
{ 0640601, "arx", "AXR, then cycle AC right once" },
{ 0647000, "spf", "Place AC in program flag register" },
{ 0662020, "dso", "DIS, then clear AC" },
{ 0664020, "pno", "PRT, then clear AC" },
{ 0664060, "pnc", "PRT, then clear AC to -0" },
{ 0666020, "p6o", "p6h then clear AC" },
{ 0667020, "p7o", "p7h then clear AC" },
{ 0700000, "cla", "Clear entire AC to +0" },
{ 0700001, "cax", "Clear AC and XR to +0" },
{ 0700012, "lal", "Place LR in AC cycled left once" },
{ 0700022, "lac", "Place LR in AC" },
{ 0700040, "clc", "Clear and complement: set AC to -0" },
{ 0700062, "lcc", "Place complement of LR in AC" },
{ 0700072, "laz", "Add LR to minus zero in AC" },
{ 0700110, "xal", "XAC, then cycle AC left once" },
{ 0700120, "xac", "Place index register in accumulator" },
{ 0700160, "xcc", "Place complement of XR in accumulator" },
{ 0700200, "cal", "Clear AC and LR to +0" },
{ 0700322, "rxe", "Place LR in AC, then place XR in LR" },
{ 0700622, "lar", "Place LR in AC cycled right once" },
{ 0701000, "tac", "Contents of test accumulator are placed in AC" },
{ 0702020, "tbr", "Contents of test buffer register are placed in AC" },
{ 0703000, "---", "Clear AC and read light pen" },
{ 0706020, "rpf", "The program flag register is placed in AC" },
{ 0721000, "rlc", "Read one line paper tape into AC bits 0, 3, etc." },
{ 0721600, "rlr", "rlc, then cycle AC right once" },
{ 0723000, "r3c", "Read three lines of paper tape" },
{ 0723032, "---", "R3C+LMB+PAD+CRY" },
{ 0726000, "p6a", "Clear AC and punch a line of blank tape" },
{ 0740025, "ora", "Logical or of AC and LR is placed in AC" },
{ 0740027, "ana", "Logical and of AC and LR is placed in AC" },
{ 0740207, "anc", "ANL, then clear AC" },
{ 0740205, "oro", "ORL, then clear AC" },
{ 0740222, "ial", "Interchange AC and LR" },
{ 0763232, "---", "AMB+CLA+R3L+MBL+LMB+PAD+CRY" },
{ 0766020, "p6b", "Punch a line of blank tape, but save AC" },
{ 0000000, NULL, NULL }
};
/* Symbolic decode
Inputs:
*of = output stream
addr = current PC
*val = pointer to values
*uptr = pointer to unit
sw = switches
Outputs:
return = status code
*/
#define FMTASC(x) ((x) < 040)? "<%03o>": "%c", (x)
#define SIXTOASC(x) flexo_to_ascii[x]
#define ASCTOSIX(x) (ascii_to_flexo[x] & 077)
extern int32 cpu_get_mode (void);
extern t_stat fprint_sym_orig (FILE *of, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
UNIT *uptr, int32 sw)
{
int32 cflag, i, inst, op;
if(!cpu_get_mode()) {
return fprint_sym_orig (of, addr, val, uptr, sw);
}
inst = val[0];
cflag = (uptr == NULL) || (uptr == &cpu_unit);
if (sw & SWMASK ('A')) { /* ASCII? */
if (inst > 0377) return SCPE_ARG;
fprintf (of, FMTASC (inst & 0177));
return SCPE_OK;
}
if (sw & SWMASK ('F')) {
fputc (flexo_to_ascii[inst & 077], of);
return SCPE_OK;
}
if (sw & SWMASK ('C')) { /* character? */
fprintf (of, "%c", SIXTOASC ((inst >> 12) & 077));
fprintf (of, "%c", SIXTOASC ((inst >> 6) & 077));
fprintf (of, "%c", SIXTOASC (inst & 077));
return SCPE_OK;
}
if (!(sw & SWMASK ('M'))) return SCPE_ARG;
/* Instruction decode */
op = (inst >> 13) & 037;
if ((op & 030) != 030) /* sto, add, trn (not an opr) */
{
fprintf (of, "%s %05o (%s)", instmap[op].mnemonic, inst & 017777, instmap[op].desc);
} else { /* opr */
for(i=0;opmap[i].opr != 0;i++) {
if(inst == opmap[i].opr) {
fprintf (of, "opr %s (%s)", opmap[i].mnemonic, opmap[i].desc);
}
}
}
return SCPE_OK;
}
/* Get 18b signed number
Inputs:
*cptr = pointer to input string
*sign = pointer to sign
*status = pointer to error status
Outputs:
val = output value
*/
t_value get_sint (char *cptr, int32 *sign, t_stat *status)
{
*sign = 1;
if (*cptr == '+') {
*sign = 0;
cptr++;
}
else if (*cptr == '-') {
*sign = -1;
cptr++;
}
return get_uint (cptr, 8, DMASK, status);
}
/* Symbolic input
Inputs:
*cptr = pointer to input string
addr = current PC
uptr = pointer to unit
*val = pointer to output values
sw = switches
Outputs:
status = error status
*/
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
{
#if 0
int32 cflag, d, i, j, k, sign;
t_stat r;
static int32 sc_enc[10] = { 0, 01, 03, 07, 017, 037, 077, 0177, 0377, 0777 };
char gbuf[CBUFSIZE];
cflag = (uptr == NULL) || (uptr == &cpu_unit);
while (isspace (*cptr)) cptr++;
for (i = 1; (i < 3) && (cptr[i] != 0); i++)
if (cptr[i] == 0) for (j = i + 1; j <= 3; j++) cptr[j] = 0;
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
val[0] = (t_value) cptr[0];
return SCPE_OK;
}
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* sixbit string? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
val[0] = ((ASCTOSIX (cptr[0]) & 077) << 12) |
((ASCTOSIX (cptr[1]) & 077) << 6) |
(ASCTOSIX (cptr[2]) & 077);
return SCPE_OK;
}
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
val[0] = opc_val[i] & DMASK; /* get value */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
switch (j) { /* case on class */
case I_V_LAW: /* LAW */
cflag = 0; /* fall through */
case I_V_MRF: case I_V_MRI: /* mem ref */
cptr = get_glyph (cptr, gbuf, 0); /* get next field */
if ((j != I_V_MRI) && strcmp (gbuf, "I") == 0) { /* indirect? */
val[0] = val[0] | IA;
cptr = get_glyph (cptr, gbuf, 0);
}
d = get_uint (gbuf, 8, AMASK, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (d <= DAMASK) val[0] = val[0] | d;
else if (cflag && (((addr ^ d) & EPCMASK) == 0))
val[0] = val[0] | (d & DAMASK);
else return SCPE_ARG;
break;
case I_V_SHF: /* shift */
cptr = get_glyph (cptr, gbuf, 0);
d = get_uint (gbuf, 10, 9, &r);
if (r != SCPE_OK) return SCPE_ARG;
val[0] = val[0] | sc_enc[d];
break;
case I_V_NPN: case I_V_IOT:
case I_V_OPR: case I_V_SKP: case I_V_SPC:
for (cptr = get_glyph (cptr, gbuf, 0); gbuf[0] != 0;
cptr = get_glyph (cptr, gbuf, 0)) {
for (i = 0; (opcode[i] != NULL) &&
(strcmp (opcode[i], gbuf) != 0); i++) ;
if (opcode[i] != NULL) {
k = opc_val[i] & DMASK;
if ((k != IA) && (((k ^ val[0]) & 0760000) != 0))
return SCPE_ARG;
val[0] = val[0] | k;
}
else {
d = get_sint (gbuf, &sign, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (sign == 0) val[0] = val[0] + d;
else if (sign < 0) val[0] = val[0] - d;
else val[0] = val[0] | d;
}
}
break;
} /* end case */
if (*cptr != 0) return SCPE_ARG; /* junk at end? */
#endif
return SCPE_ARG;
}

133
TX-0/tx0_sys_orig.c Normal file
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/*************************************************************************
* *
* $Id: tx0_sys_orig.c 2065 2009-02-25 15:05:00Z hharte $ *
* *
* Copyright (c) 2009-2012 Howard M. Harte. *
* *
* Permission is hereby granted, free of charge, to any person obtaining *
* a copy of this software and associated documentation files (the *
* "Software"), to deal in the Software without restriction, including *
* without limitation the rights to use, copy, modify, merge, publish, *
* distribute, sublicense, and/or sell copies of the Software, and to *
* permit persons to whom the Software is furnished to do so, subject to *
* the following conditions: *
* *
* The above copyright notice and this permission notice shall be *
* included in all copies or substantial portions of the Software. *
* *
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, *
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF *
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND *
* NONINFRINGEMENT. IN NO EVENT SHALL HOWARD M. HARTE BE LIABLE FOR ANY *
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, *
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE *
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. *
* *
* Except as contained in this notice, the name of Howard M. Harte shall *
* not be used in advertising or otherwise to promote the sale, use or *
* other dealings in this Software without prior written authorization *
* of Howard M. Harte. *
* *
* Module Description: *
* TX-0 simulator interface *
* *
* Environment: *
* User mode only *
* *
*************************************************************************/
#include "tx0_defs.h"
#include <ctype.h>
typedef struct {
int32 opr;
char *mnemonic;
char *desc;
} OPMAP;
const OPMAP opmap_orig [] = {
{ 0700000, "cll", "Clear the left nine digital positions of the AC" },
{ 0640000, "clr", "Clear the right nine digital positions of the AC" },
{ 0620000, "ios", "In-Out Stop" },
{ 0630000, "hlt", "Halt the computer" },
{ 0607000, "p7h", "Punch holes 1-6 in flexo tape Also punch a 7th hole on tape" },
{ 0606000, "p6h", "Punch holes 1-6 in flexo tape" },
{ 0604000, "pnt", "Print one flexowrite charater" },
{ 0601000, "r1c", "Read one line of flexo tape" },
{ 0603000, "r3c", "Read three lines of flexo tape" },
{ 0602000, "dis", "Intesnsify a point on the scope from x,y in AC" },
{ 0600400, "shr", "Shift the AC right one place" },
{ 0600600, "cyr", "Cycle the AC right one digital position (AC17 -> AC0)" },
{ 0600200, "mlr", "Store the contents of the MBR in the LR" },
{ 0600100, "pen", "Read the light pen flip flops 1 and 2 into AC0 and AC1" },
{ 0600004, "tac", "Insert a one in each digital position of the AC whereever there is a one in the corresponding digital position of the TAC" },
{ 0600040, "com", "Complement every digit in the accumulator" },
{ 0600020, "pad", "Partial add AC to MBR" },
{ 0600010, "cry", "Partial add the 18 digits of the AC to the corresponding 18 digits of the carry" },
{ 0600001, "amb", "Store the contents of the AC in the MBR" },
{ 0600003, "tbr", "Store the contents of the TBR in the MBR" },
{ 0600002, "lmb", "Store the contents of the LR in the MBR" },
/* Combined Operate Class Commands */
{ 0740000, "cla", "Clear the AC" },
{ 0600031, "cyl", "Cycle the AC left one digital position" },
{ 0740040, "clc", "Clear and complement AC" },
{ 0622000, "dis", "Display (note IOS must be included for in-out cmds)" },
{ 0760000, "ios+cll+clr", "In out stop with AC cleared" },
{ 0627600, "ios+p7h+cyr", "Punch 7 holes and cycle AC right" },
{ 0626600, "ios+p6h+cyr", "Punch 6 holes and cycle AC right" },
{ 0766000, "ios+cll+clr+p6h", "Clear the AC and punch a blank space on tape" },
{ 0624600, "ios+pnt+cyr", "Print and cycle AC right" },
{ 0627021, "ios+p7h+amb+pad", "Punch 7 holes and leave AC cleared" },
{ 0626021, "ios+p6h+amb+pad", "Punch 6 holes and leave AC cleared" },
{ 0624021, "ios+pnt+amb+pad", "Print and leave AC cleared" },
{ 0741000, "cll+clr+ric", "Clear AC and start PETR running (note computer hasn't stopped to wait for information" },
{ 0601031, "ric+amb+pad+cry", "Start PETR running and cycle AC left" },
{ 0601600, "ric+cyr", "Start PETR running and cycle right" },
{ 0763000, "cll+clr+ios+r3c", "Clear AC and read 3 lines of tape" },
{ 0761000, "cll+clr+ios+ric", "Clear AC and read one line of tape" },
{ 0761031, "cll+clr+ios+ric+pad+cry", "Read 1 line of tape and cycle AC left" },
{ 0761600, "cll+clr+ios+ric+cyr", "Read 1 line of tape and cycle right" },
{ 0740004, "cll+clr+tac", "Put contents of TAC in AC" },
{ 0600030, "pad+cry", "Full-add the MBR and AC and leave sum in AC" },
{ 0740022, "cll+clr+lmb+pad", "Clear the AC - store LR contents in memory buffer register add memory buffer to AC - i.e., store live reg. contents in AC (LAC)" },
{ 0600201, "amb+mlr", "Store contents of AC in MBR, store contents of MBR in LR i.e., store contents of AC in LR. (ALR)" },
{ 0600022, "lmb+pad", "Store the contents of LR in MBR, partial add AC and MBR i.e., partial add LR to AC. (LPD)" },
/* { 0600200, "mlr", "Since MLR alone will ahve a clear MBR, this is really clear LR (LRO)" }, */
{ 0600032, "lmb+pad+cry", "Full-add the LR to the AC (LAD)" },
{ 0740023, "cll+clr+tbr+pad", "Store contents of TBR in AC" },
{ 0000000, NULL, NULL }
};
t_stat fprint_sym_orig (FILE *of, t_addr addr, t_value *val,
UNIT *uptr, int32 sw)
{
int32 i, inst, op;
inst = val[0];
/* Instruction decode */
op = (inst >> 16) & 3;
switch (op) {
case 0:
fprintf (of, "sto %06o", inst & 0177777); /* opcode */
break;
case 1:
fprintf (of, "add %06o", inst & 0177777); /* opcode */
break;
case 2:
fprintf (of, "trn %06o", inst & 0177777); /* opcode */
break;
case 3:
for(i=0;opmap_orig[i].opr != 0;i++) {
if(inst == opmap_orig[i].opr) {
fprintf (of, "opr %s (%s)", opmap_orig[i].mnemonic, opmap_orig[i].desc); /* opcode */
}
}
break;
}
return SCPE_OK;
}