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https://github.com/open-simh/simh.git
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simh 3.11
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
cf9ead8d04
commit
43360191c8
@@ -1,6 +1,6 @@
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/* vax_sysdev.c: VAX 3900 system-specific logic
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Copyright (c) 1998-2013, Robert M Supnik
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Copyright (c) 1998-2019, Robert M Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -33,6 +33,8 @@
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cmctl memory controller
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sysd system devices (SSC miscellany)
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05-May-19 RMS Added length to register read routines
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Removed Qbus memory space from register space
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20-Dec-13 RMS Added unaligned register space access routines
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23-Dec-10 RMS Added power clear call to boot routine (Mark Pizzolato)
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25-Oct-05 RMS Automated CMCTL extended memory
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@@ -233,8 +235,8 @@ t_stat cso_svc (UNIT *uptr);
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t_stat tmr_svc (UNIT *uptr);
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t_stat sysd_reset (DEVICE *dptr);
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int32 rom_rd (int32 pa);
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int32 nvr_rd (int32 pa);
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int32 rom_rd (int32 pa, int32 lnt);
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int32 nvr_rd (int32 pa, int32 lnt);
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void nvr_wr (int32 pa, int32 val, int32 lnt);
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int32 csrs_rd (void);
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int32 csrd_rd (void);
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@@ -242,13 +244,13 @@ int32 csts_rd (void);
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void csrs_wr (int32 dat);
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void csts_wr (int32 dat);
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void cstd_wr (int32 dat);
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int32 cmctl_rd (int32 pa);
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int32 cmctl_rd (int32 pa, int32 lnt);
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void cmctl_wr (int32 pa, int32 val, int32 lnt);
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int32 ka_rd (int32 pa);
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int32 ka_rd (int32 pa, int32 lnt);
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void ka_wr (int32 pa, int32 val, int32 lnt);
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int32 cdg_rd (int32 pa);
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int32 cdg_rd (int32 pa, int32 lnt);
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void cdg_wr (int32 pa, int32 val, int32 lnt);
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int32 ssc_rd (int32 pa);
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int32 ssc_rd (int32 pa, int32 lnt);
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void ssc_wr (int32 pa, int32 val, int32 lnt);
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int32 tmr_tir_rd (int32 tmr, t_bool interp);
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void tmr_csr_wr (int32 tmr, int32 val);
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@@ -260,14 +262,12 @@ int32 parity (int32 val, int32 odd);
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t_stat sysd_powerup (void);
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extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
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extern int32 cqmap_rd (int32 pa);
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extern int32 cqmap_rd (int32 pa, int32 lnt);
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extern void cqmap_wr (int32 pa, int32 val, int32 lnt);
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extern int32 cqipc_rd (int32 pa);
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extern int32 cqipc_rd (int32 pa, int32 lnt);
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extern void cqipc_wr (int32 pa, int32 val, int32 lnt);
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extern int32 cqbic_rd (int32 pa);
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extern int32 cqbic_rd (int32 pa, int32 lnt);
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extern void cqbic_wr (int32 pa, int32 val, int32 lnt);
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extern int32 cqmem_rd (int32 pa);
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extern void cqmem_wr (int32 pa, int32 val, int32 lnt);
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extern int32 iccs_rd (void);
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extern int32 todr_rd (void);
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extern int32 rxcs_rd (void);
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@@ -526,7 +526,7 @@ for (i = 0; i < l; i++)
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return val + rom_loopval;
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}
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int32 rom_rd (int32 pa)
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int32 rom_rd (int32 pa, int32 lnt)
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{
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int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
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@@ -583,7 +583,7 @@ return SCPE_OK;
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/* NVR: non-volatile RAM - stored in a buffered file */
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int32 nvr_rd (int32 pa)
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int32 nvr_rd (int32 pa, int32 lnt)
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{
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int32 rg = (pa - NVRBASE) >> 2;
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@@ -925,7 +925,7 @@ return;
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struct reglink { /* register linkage */
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uint32 low; /* low addr */
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uint32 high; /* high addr */
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int32 (*read)(int32 pa); /* read routine */
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int32 (*read)(int32 pa, int32 lnt); /* read routine */
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void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
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};
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@@ -938,7 +938,6 @@ struct reglink regtable[] = {
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{ KABASE, KABASE+KASIZE, &ka_rd, &ka_wr },
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{ CQBICBASE, CQBICBASE+CQBICSIZE, &cqbic_rd, &cqbic_wr },
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{ CQIPCBASE, CQIPCBASE+CQIPCSIZE, &cqipc_rd, &cqipc_wr },
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{ CQMBASE, CQMBASE+CQMSIZE, &cqmem_rd, &cqmem_wr },
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{ CDGBASE, CDGBASE+CDGSIZE, &cdg_rd, &cdg_wr },
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{ 0, 0, NULL, NULL }
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};
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@@ -958,7 +957,7 @@ struct reglink *p;
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for (p = ®table[0]; p->low != 0; p++) {
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if ((pa >= p->low) && (pa < p->high) && p->read)
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return p->read (pa);
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return p->read(pa, lnt);
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}
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ssc_bto = ssc_bto | SSCBTO_BTO | SSCBTO_RWT;
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MACH_CHECK (MCHK_READ);
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@@ -1037,7 +1036,7 @@ return;
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The CMCTL registers are cleared at power up.
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*/
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int32 cmctl_rd (int32 pa)
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int32 cmctl_rd (int32 pa, int32 lnt)
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{
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int32 rg = (pa - CMCTLBASE) >> 2;
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@@ -1100,7 +1099,7 @@ return;
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/* KA655 registers */
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int32 ka_rd (int32 pa)
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int32 ka_rd (int32 pa, int32 lnt)
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{
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int32 rg = (pa - KABASE) >> 2;
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@@ -1134,7 +1133,7 @@ return ka_bdr & BDR_BRKENB;
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/* Cache diagnostic space */
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int32 cdg_rd (int32 pa)
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int32 cdg_rd (int32 pa, int32 lnt)
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{
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int32 t, row = CDG_GETROW (pa);
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@@ -1171,9 +1170,9 @@ for ( ; val != 0; val = val >> 1) {
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return odd;
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}
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/* SSC registers - byte/word merges done in WriteReg */
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/* SSC registers - byte/word merges done in ssc_wr */
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int32 ssc_rd (int32 pa)
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int32 ssc_rd (int32 pa, int32 lnt)
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{
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int32 rg = (pa - SSCBASE) >> 2;
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@@ -1259,7 +1258,7 @@ int32 rg = (pa - SSCBASE) >> 2;
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if (lnt < L_LONG) { /* byte or word? */
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int32 sc = (pa & 3) << 3; /* merge */
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int32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF;
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int32 t = ssc_rd (pa);
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int32 t = ssc_rd (pa, lnt);
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val = ((val & mask) << sc) | (t & ~(mask << sc));
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}
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