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ALL: Massive 'const' cleanup

Browse Source 
These changes facilitate more robust parameter type checking and helps
to identify unexpected coding errors.

Most simulators can now also be compiled with a C++ compiler without
warnings.

Additionally, these changes have also been configured to facilitate easier
backporting of simulator and device simulation modules to run under the
simh v3.9+ SCP framework.
This commit is contained in:
Mark Pizzolato
2016-05-15 15:25:33 -07:00
parent 60a8a2d43d
commit 5531ccb175
444 changed files with 4119 additions and 3798 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
NOVA/eclipse_cpu.c
View File

@@ -501,9 +501,9 @@ t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_reset (DEVICE *dptr);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat Debug_Dump (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat Dump_History (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat Debug_Dump (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat Dump_History (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat map_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat map_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat map_reset (DEVICE *dptr);
@@ -5763,7 +5763,7 @@ return SCPE_OK;
/* Alter memory size */
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 mc = 0;
t_addr i;
@@ -5952,12 +5952,12 @@ int32 Debug_Entry(int32 PC, int32 inst, int32 inst2, int32 AC0, int32 AC1, int32
return 0;
}
t_stat Debug_Dump(UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat Debug_Dump(UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
return SCPE_OK;
}
t_stat Dump_History (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat Dump_History (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
char debmap[4], debion[4];
t_value simeval[20];

4
NOVA/eclipse_tt.c
View File

@@ -48,7 +48,7 @@ t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tti_reset (DEVICE *dptr);
t_stat tto_reset (DEVICE *dptr);
t_stat ttx_setmod (UNIT *uptr, int32 value, char *cptr, void *desc);
t_stat ttx_setmod (UNIT *uptr, int32 value, CONST char *cptr, void *desc);
void translate_in();
int32 translate_out(int32 c);
int32 putseq(char *seq);
@@ -422,7 +422,7 @@ sim_cancel (&tto_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx_setmod (UNIT *uptr, int32 value, char *cptr, void *desc)
t_stat ttx_setmod (UNIT *uptr, int32 value, CONST char *cptr, void *desc)
{
tti_unit.flags = (tti_unit.flags & ~UNIT_DASHER) | value;
tto_unit.flags = (tto_unit.flags & ~UNIT_DASHER) | value;

8
NOVA/nova_clk.c
View File

@@ -49,8 +49,8 @@ int32 tmxr_poll = 16000; /* tmxr poll */
int32 clk (int32 pulse, int32 code, int32 AC);
t_stat clk_svc (UNIT *uptr);
t_stat clk_reset (DEVICE *dptr);
t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat clk_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
/* CLK data structures
@@ -166,7 +166,7 @@ return SCPE_OK;
/* Set line frequency */
t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat clk_set_freq (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if (cptr)
return SCPE_ARG;
@@ -178,7 +178,7 @@ return SCPE_OK;
/* Show line frequency */
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, void *desc)
t_stat clk_show_freq (FILE *st, UNIT *uptr, int32 val, CONST void *desc)
{
fprintf (st, (clk_tps[0] == 50)? "50Hz": "60Hz");
return SCPE_OK;

16
NOVA/nova_cpu.c
View File

@@ -320,12 +320,12 @@ static Hist_entry * hist = NULL ; /* instruction history *
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_reset (DEVICE *dptr);
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_boot (int32 unitno, DEVICE *dptr);
t_stat build_devtab (void);
t_stat hist_set( UNIT * uptr, int32 val, char * cptr, void * desc ) ;
t_stat hist_show( FILE * st, UNIT * uptr, int32 val, void * desc ) ;
t_stat hist_set( UNIT * uptr, int32 val, CONST char * cptr, void * desc ) ;
t_stat hist_show( FILE * st, UNIT * uptr, int32 val, CONST void * desc ) ;
static int hist_save( int32 pc, int32 our_ir ) ;
char * devBitNames( int32 flags, char * ptr, char * sepStr ) ;
@@ -1126,7 +1126,7 @@ return SCPE_OK;
/* Alter memory size */
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat cpu_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
int32 mc = 0;
t_addr i;
@@ -1330,7 +1330,7 @@ return ( -1 ) ;
/* setup history save area (proposed global routine) */
t_stat hist_set( UNIT * uptr, int32 val, char * cptr, void * desc )
t_stat hist_set( UNIT * uptr, int32 val, CONST char * cptr, void * desc )
{
int32 i, lnt ;
t_stat r ;
@@ -1420,10 +1420,10 @@ return ( 0 ) ;
/* show execution history (proposed global routine) */
t_stat hist_show( FILE * st, UNIT * uptr, int32 val, void * desc )
t_stat hist_show( FILE * st, UNIT * uptr, int32 val, CONST void * desc )
{
int32 k, di, lnt ;
char * cptr = (char *) desc ;
const char * cptr = (const char *) desc ;
t_stat r ;
Hist_entry * hptr ;
@@ -1467,7 +1467,7 @@ struct Dbits
{
int32 dBit ;
int32 dInvertMask ;
char * dName ;
const char *dName ;
} devBits [] =
{

13
NOVA/nova_dkp.c
View File

@@ -346,14 +346,13 @@ int32 dkp_diagmode = 0; /* diagnostic mode */
int32 dkp_trace = 0 ;
DEVICE dkp_dev;
int32 dkp (int32 pulse, int32 code, int32 AC);
t_stat dkp_svc (UNIT *uptr);
t_stat dkp_reset (DEVICE *dptr);
t_stat dkp_boot (int32 unitno, DEVICE *dptr);
t_stat dkp_attach (UNIT *uptr, char *cptr);
t_stat dkp_attach (UNIT *uptr, CONST char *cptr);
t_stat dkp_go ( int32 pulse );
t_stat dkp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat dkp_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
/* DKP data structures
@@ -515,9 +514,9 @@ dtype = GET_DTYPE (uptr->flags); /* get drive type */
if ( DKP_TRACE(0) )
{
static char * f[8] =
static const char * f[8] =
{ "NIO", "DIA", "DOA", "DIB", "DOB", "DIC", "DOC", "SKP" } ;
static char * s[4] =
static const char * s[4] =
{ " ", "S", "C", "P" } ;
printf( " [DKP %s%s %06o ", f[code & 0x07], s[pulse & 0x03], (AC & 0xFFFF) ) ;
@@ -989,7 +988,7 @@ return SCPE_OK;
/* Attach routine (with optional autosizing) */
t_stat dkp_attach (UNIT *uptr, char *cptr)
t_stat dkp_attach (UNIT *uptr, CONST char *cptr)
{
int32 i, p;
t_stat r;
@@ -1012,7 +1011,7 @@ return SCPE_OK;
/* Set size command validation routine */
t_stat dkp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat dkp_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if (uptr->flags & UNIT_ATT)
return SCPE_ALATT;

9
NOVA/nova_dsk.c
View File

@@ -109,13 +109,12 @@ int32 dsk_wlk = 0; /* wrt lock switches */
int32 dsk_stopioe = 0; /* stop on error */
int32 dsk_time = 100; /* time per sector */
DEVICE dsk_dev;
int32 dsk (int32 pulse, int32 code, int32 AC);
t_stat dsk_svc (UNIT *uptr);
t_stat dsk_reset (DEVICE *dptr);
t_stat dsk_boot (int32 unitno, DEVICE *dptr);
t_stat dsk_attach (UNIT *uptr, char *cptr);
t_stat dsk_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat dsk_attach (UNIT *uptr, CONST char *cptr);
t_stat dsk_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
/* DSK data structures
@@ -309,7 +308,7 @@ return SCPE_OK;
/* Attach routine */
t_stat dsk_attach (UNIT *uptr, char *cptr)
t_stat dsk_attach (UNIT *uptr, CONST char *cptr)
{
uint32 sz, p;
uint32 ds_bytes = DSK_DKSIZE * sizeof (int16);
@@ -327,7 +326,7 @@ return attach_unit (uptr, cptr);
/* Change disk size */
t_stat dsk_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat dsk_set_size (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if (val < 0)
return SCPE_IERR;

9
NOVA/nova_mta.c
View File

@@ -166,17 +166,16 @@ int32 mta_cwait = 100; /* command latency */
int32 mta_rwait = 100; /* record latency */
uint8 *mtxb = NULL; /* transfer buffer */
DEVICE mta_dev;
int32 mta (int32 pulse, int32 code, int32 AC);
t_stat mta_svc (UNIT *uptr);
t_stat mta_reset (DEVICE *dptr);
t_stat mta_boot (int32 unitno, DEVICE *dptr);
t_stat mta_attach (UNIT *uptr, char *cptr);
t_stat mta_attach (UNIT *uptr, CONST char *cptr);
t_stat mta_detach (UNIT *uptr);
int32 mta_updcsta (UNIT *uptr);
void mta_upddsta (UNIT *uptr, int32 newsta);
t_stat mta_map_err (UNIT *uptr, t_stat st);
t_stat mta_vlock (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat mta_vlock (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
static const int ctype[32] = { /* c vs r timing */
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
@@ -592,7 +591,7 @@ return SCPE_OK;
/* Attach routine */
t_stat mta_attach (UNIT *uptr, char *cptr)
t_stat mta_attach (UNIT *uptr, CONST char *cptr)
{
t_stat r;
@@ -618,7 +617,7 @@ return sim_tape_detach (uptr);
/* Write lock/unlock validate routine */
t_stat mta_vlock (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat mta_vlock (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
if ((uptr->flags & UNIT_ATT) && (val || sim_tape_wrp (uptr)))
mta_upddsta (uptr, uptr->USTAT | STA_WLK);

1
NOVA/nova_plt.c
View File

@@ -48,7 +48,6 @@ extern int32 int_req, dev_busy, dev_done, dev_disable;
int32 plt_stopioe = 0; /* stop on error */
DEVICE plt_dev;
int32 plt (int32 pulse, int32 code, int32 AC);
t_stat plt_svc (UNIT *uptr);
t_stat plt_reset (DEVICE *dptr);

598
NOVA/nova_pt.c
View File

@@ -1,299 +1,299 @@
/* nova_pt.c: NOVA paper tape read/punch simulator
Copyright (c) 1993-2016, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
ptr paper tape reader
ptp paper tape punch
13-May-16 RMS Lengthened wait time for DCC BASIC timing error
28-Mar-15 RMS Revised to use sim_printf
04-Jul-07 BKR added PTR and PTP device DISABLE capability,
added 7B/8B support PTR and PTP (default is 8B),
DEV_SET/CLR macros now used,
PTR and PTP can now be DISABLED
25-Apr-03 RMS Revised for extended file support
03-Oct-02 RMS Added DIBs
30-May-02 RMS Widened POS to 32b
29-Nov-01 RMS Added read only unit support
Notes:
- data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
- register TIME is the delay between character read or write operations
- register POS show the number of characters read from or sent to the PTR or PTP
- register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
*/
#include "nova_defs.h"
extern int32 int_req, dev_busy, dev_done, dev_disable ;
extern int32 SR ;
extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ;
int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
int32 ptr (int32 pulse, int32 code, int32 AC);
int32 ptp (int32 pulse, int32 code, int32 AC);
t_stat ptr_svc (UNIT *uptr);
t_stat ptp_svc (UNIT *uptr);
t_stat ptr_reset (DEVICE *dptr);
t_stat ptp_reset (DEVICE *dptr);
t_stat ptr_boot (int32 unitno, DEVICE *dptr);
/* 7 or 8 bit data mask support for either device */
#define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */
#define UNIT_8B (1 << UNIT_V_8B)
/* PTR data structures
ptr_dev PTR device descriptor
ptr_unit PTR unit descriptor
ptr_reg PTR register list
*/
DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
UNIT ptr_unit = { /* 2007-May-30, bkr */
UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0), 300
};
REG ptr_reg[] = {
{ ORDATA (BUF, ptr_unit.buf, 8) },
{ FLDATA (BUSY, dev_busy, INT_V_PTR) },
{ FLDATA (DONE, dev_done, INT_V_PTR) },
{ FLDATA (DISABLE, dev_disable, INT_V_PTR) },
{ FLDATA (INT, int_req, INT_V_PTR) },
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
{ NULL }
};
MTAB ptr_mod[] = /* 2007-May-30, bkr */
{
{ UNIT_8B, 0, "7b", "7B", NULL },
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
{ 0, 0, NULL, NULL, NULL }
} ;
DEVICE ptr_dev = {
"PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptr_reset,
&ptr_boot, NULL, NULL,
&ptr_dib, DEV_DISABLE /* 2007-May-30, bkr */
};
/* PTP data structures
ptp_dev PTP device descriptor
ptp_unit PTP unit descriptor
ptp_reg PTP register list
*/
DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
UNIT ptp_unit =
{
UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
};
REG ptp_reg[] = {
{ ORDATA (BUF, ptp_unit.buf, 8) },
{ FLDATA (BUSY, dev_busy, INT_V_PTP) },
{ FLDATA (DONE, dev_done, INT_V_PTP) },
{ FLDATA (DISABLE, dev_disable, INT_V_PTP) },
{ FLDATA (INT, int_req, INT_V_PTP) },
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
{ NULL }
};
MTAB ptp_mod[] =
{
{ UNIT_8B, 0, "7b", "7B", NULL },
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
{ 0, 0, NULL, NULL, NULL }
} ;
DEVICE ptp_dev =
{
"PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptp_reset,
NULL, NULL, NULL,
&ptp_dib, DEV_DISABLE /* 2007-May-30, bkr */
};
/* Paper tape reader: IOT routine */
int32 ptr (int32 pulse, int32 code, int32 AC)
{
int32 iodata;
iodata = (code == ioDIA)?
ptr_unit.buf & 0377
: 0;
switch (pulse)
{ /* decode IR<8:9> */
case iopS: /* start */
DEV_SET_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
break;
case iopC: /* clear */
DEV_CLR_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptr_unit); /* deactivate unit */
break;
} /* end switch */
return iodata;
}
/* Unit service */
t_stat ptr_svc (UNIT *uptr)
{
int32 temp;
if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
if (feof (ptr_unit.fileref)) {
if (ptr_stopioe)
sim_printf ("PTR end of file\n");
else return SCPE_OK;
}
else sim_perror ("PTR I/O error");
clearerr (ptr_unit.fileref);
return SCPE_IOERR;
}
DEV_CLR_BUSY( INT_PTR ) ;
DEV_SET_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
++(ptr_unit.pos);
return SCPE_OK;
}
/* Reset routine */
t_stat ptr_reset (DEVICE *dptr)
{
ptr_unit.buf = 0; /* <not DG compatible> */
DEV_CLR_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptr_unit); /* deactivate unit */
return SCPE_OK;
}
/* Boot routine */
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
{
ptr_reset( dptr ) ;
/* set position to 0? */
cpu_boot( unitno, dptr ) ;
SR = /* low-speed: no high-order bit set */ DEV_PTR ;
return ( SCPE_OK );
} /* end of 'ptr_boot' */
/* Paper tape punch: IOT routine */
int32 ptp (int32 pulse, int32 code, int32 AC)
{
if (code == ioDOA)
ptp_unit.buf = AC & 0377;
switch (pulse)
{ /* decode IR<8:9> */
case iopS: /* start */
DEV_SET_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
break;
case iopC: /* clear */
DEV_CLR_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptp_unit); /* deactivate unit */
break;
} /* end switch */
return 0;
}
/* Unit service */
t_stat ptp_svc (UNIT *uptr)
{
DEV_CLR_BUSY( INT_PTP ) ;
DEV_SET_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptp_stopioe, SCPE_UNATT);
if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
sim_perror ("PTP I/O error");
clearerr (ptp_unit.fileref);
return SCPE_IOERR;
}
++(ptp_unit.pos);
return SCPE_OK;
}
/* Reset routine */
t_stat ptp_reset (DEVICE *dptr)
{
ptp_unit.buf = 0; /* <not DG compatible> */
DEV_CLR_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptp_unit); /* deactivate unit */
return SCPE_OK;
}
/* nova_pt.c: NOVA paper tape read/punch simulator
Copyright (c) 1993-2016, Robert M. Supnik
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Except as contained in this notice, the name of Robert M Supnik shall not be
used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik.
ptr paper tape reader
ptp paper tape punch
13-May-16 RMS Lengthened wait time for DCC BASIC timing error
28-Mar-15 RMS Revised to use sim_printf
04-Jul-07 BKR added PTR and PTP device DISABLE capability,
added 7B/8B support PTR and PTP (default is 8B),
DEV_SET/CLR macros now used,
PTR and PTP can now be DISABLED
25-Apr-03 RMS Revised for extended file support
03-Oct-02 RMS Added DIBs
30-May-02 RMS Widened POS to 32b
29-Nov-01 RMS Added read only unit support
Notes:
- data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
- register TIME is the delay between character read or write operations
- register POS show the number of characters read from or sent to the PTR or PTP
- register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
*/
#include "nova_defs.h"
extern int32 int_req, dev_busy, dev_done, dev_disable ;
extern int32 SR ;
extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ;
int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
int32 ptr (int32 pulse, int32 code, int32 AC);
int32 ptp (int32 pulse, int32 code, int32 AC);
t_stat ptr_svc (UNIT *uptr);
t_stat ptp_svc (UNIT *uptr);
t_stat ptr_reset (DEVICE *dptr);
t_stat ptp_reset (DEVICE *dptr);
t_stat ptr_boot (int32 unitno, DEVICE *dptr);
/* 7 or 8 bit data mask support for either device */
#define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */
#define UNIT_8B (1 << UNIT_V_8B)
/* PTR data structures
ptr_dev PTR device descriptor
ptr_unit PTR unit descriptor
ptr_reg PTR register list
*/
DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
UNIT ptr_unit = { /* 2007-May-30, bkr */
UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0), 300
};
REG ptr_reg[] = {
{ ORDATA (BUF, ptr_unit.buf, 8) },
{ FLDATA (BUSY, dev_busy, INT_V_PTR) },
{ FLDATA (DONE, dev_done, INT_V_PTR) },
{ FLDATA (DISABLE, dev_disable, INT_V_PTR) },
{ FLDATA (INT, int_req, INT_V_PTR) },
{ DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptr_stopioe, 0) },
{ NULL }
};
MTAB ptr_mod[] = /* 2007-May-30, bkr */
{
{ UNIT_8B, 0, "7b", "7B", NULL },
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
{ 0, 0, NULL, NULL, NULL }
} ;
DEVICE ptr_dev = {
"PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptr_reset,
&ptr_boot, NULL, NULL,
&ptr_dib, DEV_DISABLE /* 2007-May-30, bkr */
};
/* PTP data structures
ptp_dev PTP device descriptor
ptp_unit PTP unit descriptor
ptp_reg PTP register list
*/
DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
UNIT ptp_unit =
{
UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
};
REG ptp_reg[] = {
{ ORDATA (BUF, ptp_unit.buf, 8) },
{ FLDATA (BUSY, dev_busy, INT_V_PTP) },
{ FLDATA (DONE, dev_done, INT_V_PTP) },
{ FLDATA (DISABLE, dev_disable, INT_V_PTP) },
{ FLDATA (INT, int_req, INT_V_PTP) },
{ DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
{ DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
{ FLDATA (STOP_IOE, ptp_stopioe, 0) },
{ NULL }
};
MTAB ptp_mod[] =
{
{ UNIT_8B, 0, "7b", "7B", NULL },
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
{ 0, 0, NULL, NULL, NULL }
} ;
DEVICE ptp_dev =
{
"PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
1, 10, 31, 1, 8, 8,
NULL, NULL, &ptp_reset,
NULL, NULL, NULL,
&ptp_dib, DEV_DISABLE /* 2007-May-30, bkr */
};
/* Paper tape reader: IOT routine */
int32 ptr (int32 pulse, int32 code, int32 AC)
{
int32 iodata;
iodata = (code == ioDIA)?
ptr_unit.buf & 0377
: 0;
switch (pulse)
{ /* decode IR<8:9> */
case iopS: /* start */
DEV_SET_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
break;
case iopC: /* clear */
DEV_CLR_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptr_unit); /* deactivate unit */
break;
} /* end switch */
return iodata;
}
/* Unit service */
t_stat ptr_svc (UNIT *uptr)
{
int32 temp;
if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
if (feof (ptr_unit.fileref)) {
if (ptr_stopioe)
sim_printf ("PTR end of file\n");
else return SCPE_OK;
}
else sim_perror ("PTR I/O error");
clearerr (ptr_unit.fileref);
return SCPE_IOERR;
}
DEV_CLR_BUSY( INT_PTR ) ;
DEV_SET_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
++(ptr_unit.pos);
return SCPE_OK;
}
/* Reset routine */
t_stat ptr_reset (DEVICE *dptr)
{
ptr_unit.buf = 0; /* <not DG compatible> */
DEV_CLR_BUSY( INT_PTR ) ;
DEV_CLR_DONE( INT_PTR ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptr_unit); /* deactivate unit */
return SCPE_OK;
}
/* Boot routine */
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
{
ptr_reset( dptr ) ;
/* set position to 0? */
cpu_boot( unitno, dptr ) ;
SR = /* low-speed: no high-order bit set */ DEV_PTR ;
return ( SCPE_OK );
} /* end of 'ptr_boot' */
/* Paper tape punch: IOT routine */
int32 ptp (int32 pulse, int32 code, int32 AC)
{
if (code == ioDOA)
ptp_unit.buf = AC & 0377;
switch (pulse)
{ /* decode IR<8:9> */
case iopS: /* start */
DEV_SET_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
break;
case iopC: /* clear */
DEV_CLR_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptp_unit); /* deactivate unit */
break;
} /* end switch */
return 0;
}
/* Unit service */
t_stat ptp_svc (UNIT *uptr)
{
DEV_CLR_BUSY( INT_PTP ) ;
DEV_SET_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptp_stopioe, SCPE_UNATT);
if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
sim_perror ("PTP I/O error");
clearerr (ptp_unit.fileref);
return SCPE_IOERR;
}
++(ptp_unit.pos);
return SCPE_OK;
}
/* Reset routine */
t_stat ptp_reset (DEVICE *dptr)
{
ptp_unit.buf = 0; /* <not DG compatible> */
DEV_CLR_BUSY( INT_PTP ) ;
DEV_CLR_DONE( INT_PTP ) ;
DEV_UPDATE_INTR ;
sim_cancel (&ptp_unit); /* deactivate unit */
return SCPE_OK;
}

10
NOVA/nova_qty.c
View File

@@ -109,9 +109,9 @@
extern int32 int_req, dev_busy, dev_done, dev_disable ;
extern int32 tmxr_poll ; /* calibrated delay */
t_stat qty_setnl ( UNIT * uptr, int32 val, char * cptr, void * desc ) ;
t_stat qty_setnl ( UNIT * uptr, int32 val, CONST char * cptr, void * desc ) ;
t_stat qty_attach ( UNIT * uptr, char * cptr ) ;
t_stat qty_attach ( UNIT * uptr, CONST char * cptr ) ;
t_stat qty_detach ( UNIT * uptr ) ;
t_stat qty_reset ( DEVICE * dptr ) ;
t_stat qty_svc ( UNIT * uptr ) ;
@@ -121,7 +121,7 @@ t_stat alm_reset ( DEVICE * dptr ) ;
t_stat alm_svc ( UNIT * uptr ) ;
int32 alm ( int32 pulse, int32 code, int32 AC ) ;
DEVICE alm_dev ;
extern DEVICE alm_dev ;
#define QTY_MAX 64 /* max number of QTY lines - hardware */
@@ -473,7 +473,7 @@ int qty_update_status( DIB * dibp, TMXR * tmxr_desc )
/* qty_attach */
/*--------------------------------------------------------------*/
t_stat qty_attach( UNIT * unitp, char * cptr )
t_stat qty_attach( UNIT * unitp, CONST char * cptr )
{
t_stat r ;
int a ;
@@ -751,7 +751,7 @@ int32 qty( int32 pulse, int32 code, int32 AC )
/* qty_setnl */
/*--------------------------------------------------------------*/
t_stat qty_setnl( UNIT * uptr, int32 val, char * cptr, void * desc )
t_stat qty_setnl( UNIT * uptr, int32 val, CONST char * cptr, void * desc )
{
int32 newln, i, t ;

8
NOVA/nova_sys.c
View File

@@ -174,7 +174,7 @@ internal state machine:
8 process 'ignore' (error) block
*/
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
t_stat sim_load (FILE *fileref, CONST char *cptr, CONST char *fnam, int flag)
{
int32 data, csum, count, state, i;
int32 origin;
@@ -861,7 +861,7 @@ return SCPE_ARG;
#define A_SI 020 /* sign seen */
#define A_MI 040 /* - seen */
char *get_addr (char *cptr, t_addr addr, t_bool ext, int32 cflag, int32 *val)
CONST char *get_addr (CONST char *cptr, t_addr addr, t_bool ext, int32 cflag, int32 *val)
{
int32 d, x, pflag;
t_stat r;
@@ -963,7 +963,7 @@ return cptr;
NULL if error
*/
char *get_2reg (char *cptr, char term, int32 *val)
CONST char *get_2reg (CONST char *cptr, char term, int32 *val)
{
char gbuf[CBUFSIZE];
t_stat r;
@@ -991,7 +991,7 @@ return cptr;
status = error status
*/
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
t_stat parse_sym (CONST char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
{
int32 cflag, d, i, j, amd[3];
t_stat r, rtn;

8
NOVA/nova_tt.c
View File

@@ -61,8 +61,8 @@ t_stat tti_svc (UNIT *uptr);
t_stat tto_svc (UNIT *uptr);
t_stat tti_reset (DEVICE *dptr);
t_stat tto_reset (DEVICE *dptr);
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ttx_setpar (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ttx_setmod (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat ttx_setpar (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
/* TTI data structures
@@ -261,14 +261,14 @@ sim_cancel (&tto_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx_setmod (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat ttx_setmod (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
tti_unit.flags = (tti_unit.flags & ~UNIT_DASHER) | val;
tto_unit.flags = (tto_unit.flags & ~UNIT_DASHER) | val;
return SCPE_OK;
}
t_stat ttx_setpar (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat ttx_setpar (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
tti_unit.flags = (tti_unit.flags & ~TT_PAR) | val;
tto_unit.flags = (tto_unit.flags & ~TT_PAR) | val;

9
NOVA/nova_tt1.c
View File

@@ -54,15 +54,14 @@ extern int32 tmxr_poll; /* calibrated poll */
TMLN tt1_ldsc = { 0 }; /* line descriptors */
TMXR tt_desc = { 1, 0, 0, &tt1_ldsc }; /* mux descriptor */
DEVICE tti1_dev, tto1_dev;
int32 tti1 (int32 pulse, int32 code, int32 AC);
int32 tto1 (int32 pulse, int32 code, int32 AC);
t_stat tti1_svc (UNIT *uptr);
t_stat tto1_svc (UNIT *uptr);
t_stat tti1_reset (DEVICE *dptr);
t_stat tto1_reset (DEVICE *dptr);
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat tti1_attach (UNIT *uptr, char *cptr);
t_stat ttx1_setmod (UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat tti1_attach (UNIT *uptr, CONST char *cptr);
t_stat tti1_detach (UNIT *uptr);
void ttx1_enbdis (int32 dis);
@@ -289,7 +288,7 @@ sim_cancel (&tto1_unit); /* deactivate unit */
return SCPE_OK;
}
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr, void *desc)
t_stat ttx1_setmod (UNIT *uptr, int32 val, CONST char *cptr, void *desc)
{
tti1_unit.flags = (tti1_unit.flags & ~UNIT_DASHER) | val;
tto1_unit.flags = (tto1_unit.flags & ~UNIT_DASHER) | val;
@@ -298,7 +297,7 @@ return SCPE_OK;
/* Attach routine */
t_stat tti1_attach (UNIT *uptr, char *cptr)
t_stat tti1_attach (UNIT *uptr, CONST char *cptr)
{
t_stat r;