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ALL: make sure all useful state is in simh registers while processing events

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This commit is contained in:
Mark Pizzolato
2015-01-15 12:37:07 -08:00
parent 0d41242520
commit 5551a0dd9c
19 changed files with 63 additions and 0 deletions
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6
PDP8/pdp8_cpu.c
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@@ -339,6 +339,12 @@ reason = 0;
while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */
/* Make sure all intermediate state is visible in simh registers */
saved_PC = IF | (PC & 07777); /* save copies */
saved_DF = DF & 070000;
saved_LAC = LAC & 017777;
saved_MQ = MQ & 07777;
pcq_r->qptr = pcq_p; /* update pc q ptr */
if ((reason = sim_process_event ()))
break;
}