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ALL: make sure all useful state is in simh registers while processing events
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@@ -393,6 +393,11 @@ while (reason == 0) {
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}
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if (sim_interval <= 0) { /* chk clock queue */
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/* make sure all useful state is in simh registers while processing events */
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pcc_l = pcc_l & M32;
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pcq_r->qptr = pcq_p; /* update pc q ptr */
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pc_align = ((uint32) PC) & 3; /* separate PC<1:0> */
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PC = PC & 0xFFFFFFFFFFFFFFFC;
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if ((reason = sim_process_event ())) break;
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intr_summ = pal_eval_intr (1); /* eval interrupts */
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}
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