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Notes For V3.8
The makefile now works for Linux and most Unix's. Howevr, for Solaris and MacOS, you must first export the OSTYPE environment variable: > export OSTYPE > make Otherwise, you will get build errors. 1. New Features 1.1 3.8-0 1.1.1 SCP and Libraries - BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and show (respectively) a breakpoint at the current PC. 1.2 GRI - Added support for the GRI-99 processor. 1.3 HP2100 - Added support for the BACI terminal interface. - Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions. 1.4 Nova - Added support for 64KW memory (implemented in third-party CPU's). 1.5 PDP-11 - Added support for DC11, RC11, KE11A, KG11A. - Added modem control support for DL11. - Added ASCII character support for all 8b devices. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
committed by
Mark Pizzolato
parent
3cb7c60d5d
commit
59aa4a73b1
191
NOVA/nova_pt.c
191
NOVA/nova_pt.c
@@ -1,6 +1,6 @@
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/* nova_pt.c: NOVA paper tape read/punch simulator
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Copyright (c) 1993-2005, Robert M. Supnik
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Copyright (c) 1993-2008, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -26,15 +26,30 @@
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ptr paper tape reader
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ptp paper tape punch
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04-Jul-07 BKR added PTR and PTP device DISABLE capability,
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added 7B/8B support PTR and PTP (default is 8B),
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DEV_SET/CLR macros now used,
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PTR and PTP can now be DISABLED
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25-Apr-03 RMS Revised for extended file support
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03-Oct-02 RMS Added DIBs
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30-May-02 RMS Widened POS to 32b
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29-Nov-01 RMS Added read only unit support
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Notes:
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- data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
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- register TIME is the delay between character read or write operations
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- register POS show the number of characters read from or sent to the PTR or PTP
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- register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
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*/
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#include "nova_defs.h"
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extern int32 int_req, dev_busy, dev_done, dev_disable;
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extern int32 int_req, dev_busy, dev_done, dev_disable ;
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extern int32 SR ;
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extern t_stat cpu_boot(int32 unitno, DEVICE * dptr ) ;
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int32 ptr_stopioe = 0, ptp_stopioe = 0; /* stop on error */
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@@ -44,6 +59,14 @@ t_stat ptr_svc (UNIT *uptr);
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t_stat ptp_svc (UNIT *uptr);
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t_stat ptr_reset (DEVICE *dptr);
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t_stat ptp_reset (DEVICE *dptr);
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t_stat ptr_boot (int32 unitno, DEVICE *dptr);
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/* 7 or 8 bit data mask support for either device */
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#define UNIT_V_8B (UNIT_V_UF + 0) /* 8b output */
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#define UNIT_8B (1 << UNIT_V_8B)
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/* PTR data structures
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@@ -54,8 +77,8 @@ t_stat ptp_reset (DEVICE *dptr);
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DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
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UNIT ptr_unit = {
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0),
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UNIT ptr_unit = { /* 2007-May-30, bkr */
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UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0),
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SERIAL_IN_WAIT
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};
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@@ -71,12 +94,19 @@ REG ptr_reg[] = {
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{ NULL }
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};
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MTAB ptr_mod[] = /* 2007-May-30, bkr */
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{
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{ UNIT_8B, 0, "7b", "7B", NULL },
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{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
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{ 0, 0, NULL, NULL, NULL }
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} ;
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DEVICE ptr_dev = {
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"PTR", &ptr_unit, ptr_reg, NULL,
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"PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptr_reset,
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NULL, NULL, NULL,
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&ptr_dib, 0
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&ptr_boot, NULL, NULL,
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&ptr_dib, DEV_DISABLE /* 2007-May-30, bkr */
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};
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/* PTP data structures
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@@ -88,8 +118,9 @@ DEVICE ptr_dev = {
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DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
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UNIT ptp_unit = {
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE, 0), SERIAL_OUT_WAIT
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UNIT ptp_unit =
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{
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UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
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};
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REG ptp_reg[] = {
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@@ -104,46 +135,58 @@ REG ptp_reg[] = {
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{ NULL }
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};
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DEVICE ptp_dev = {
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"PTP", &ptp_unit, ptp_reg, NULL,
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MTAB ptp_mod[] =
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{
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{ UNIT_8B, 0, "7b", "7B", NULL },
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{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
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{ 0, 0, NULL, NULL, NULL }
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} ;
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DEVICE ptp_dev =
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{
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"PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
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1, 10, 31, 1, 8, 8,
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NULL, NULL, &ptp_reset,
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NULL, NULL, NULL,
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&ptp_dib, 0
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&ptp_dib, DEV_DISABLE /* 2007-May-30, bkr */
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};
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/* Paper tape reader: IOT routine */
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int32 ptr (int32 pulse, int32 code, int32 AC)
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{
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int32 iodata;
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int32 iodata;
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iodata = (code == ioDIA)? ptr_unit.buf & 0377: 0;
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switch (pulse) { /* decode IR<8:9> */
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iodata = (code == ioDIA)?
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ptr_unit.buf & 0377
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: 0;
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switch (pulse)
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{ /* decode IR<8:9> */
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case iopS: /* start */
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DEV_SET_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
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break;
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case iopS: /* start */
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dev_busy = dev_busy | INT_PTR; /* set busy */
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dev_done = dev_done & ~INT_PTR; /* clear done, int */
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int_req = int_req & ~INT_PTR;
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sim_activate (&ptr_unit, ptr_unit.wait); /* activate unit */
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break;
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case iopC: /* clear */
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dev_busy = dev_busy & ~INT_PTR; /* clear busy */
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dev_done = dev_done & ~INT_PTR; /* clear done, int */
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int_req = int_req & ~INT_PTR;
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sim_cancel (&ptr_unit); /* deactivate unit */
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break;
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} /* end switch */
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case iopC: /* clear */
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptr_unit); /* deactivate unit */
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break;
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} /* end switch */
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return iodata;
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}
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/* Unit service */
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t_stat ptr_svc (UNIT *uptr)
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{
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int32 temp;
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int32 temp;
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if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptr_stopioe, SCPE_UNATT);
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@@ -156,77 +199,99 @@ if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
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clearerr (ptr_unit.fileref);
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return SCPE_IOERR;
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}
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dev_busy = dev_busy & ~INT_PTR; /* clear busy */
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dev_done = dev_done | INT_PTR; /* set done */
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int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
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ptr_unit.buf = temp & 0377;
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ptr_unit.pos = ptr_unit.pos + 1;
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_SET_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
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++(ptr_unit.pos);
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat ptr_reset (DEVICE *dptr)
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{
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ptr_unit.buf = 0;
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dev_busy = dev_busy & ~INT_PTR; /* clear busy */
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dev_done = dev_done & ~INT_PTR; /* clear done, int */
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int_req = int_req & ~INT_PTR;
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ptr_unit.buf = 0; /* <not DG compatible> */
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DEV_CLR_BUSY( INT_PTR ) ;
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DEV_CLR_DONE( INT_PTR ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptr_unit); /* deactivate unit */
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return SCPE_OK;
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}
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/* Boot routine */
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t_stat ptr_boot (int32 unitno, DEVICE *dptr)
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{
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ptr_reset( dptr ) ;
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/* set position to 0? */
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cpu_boot( unitno, dptr ) ;
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SR = /* low-speed: no high-order bit set */ DEV_PTR ;
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return ( SCPE_OK );
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} /* end of 'ptr_boot' */
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/* Paper tape punch: IOT routine */
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int32 ptp (int32 pulse, int32 code, int32 AC)
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{
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if (code == ioDOA) ptp_unit.buf = AC & 0377;
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switch (pulse) { /* decode IR<8:9> */
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if (code == ioDOA)
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ptp_unit.buf = AC & 0377;
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case iopS: /* start */
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dev_busy = dev_busy | INT_PTP; /* set busy */
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dev_done = dev_done & ~INT_PTP; /* clear done, int */
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int_req = int_req & ~INT_PTP;
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sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
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break;
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switch (pulse)
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{ /* decode IR<8:9> */
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case iopS: /* start */
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DEV_SET_BUSY( INT_PTP ) ;
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DEV_CLR_DONE( INT_PTP ) ;
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DEV_UPDATE_INTR ;
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sim_activate (&ptp_unit, ptp_unit.wait); /* activate unit */
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break;
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case iopC: /* clear */
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dev_busy = dev_busy & ~INT_PTP; /* clear busy */
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dev_done = dev_done & ~INT_PTP; /* clear done, int */
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int_req = int_req & ~INT_PTP;
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sim_cancel (&ptp_unit); /* deactivate unit */
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break;
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} /* end switch */
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case iopC: /* clear */
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DEV_CLR_BUSY( INT_PTP ) ;
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DEV_CLR_DONE( INT_PTP ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptp_unit); /* deactivate unit */
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break;
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} /* end switch */
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return 0;
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}
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/* Unit service */
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t_stat ptp_svc (UNIT *uptr)
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{
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dev_busy = dev_busy & ~INT_PTP; /* clear busy */
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dev_done = dev_done | INT_PTP; /* set done */
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int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
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DEV_CLR_BUSY( INT_PTP ) ;
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DEV_SET_DONE( INT_PTP ) ;
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DEV_UPDATE_INTR ;
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if ((ptp_unit.flags & UNIT_ATT) == 0) /* attached? */
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return IORETURN (ptp_stopioe, SCPE_UNATT);
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if (putc (ptp_unit.buf, ptp_unit.fileref) == EOF) {
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if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
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perror ("PTP I/O error");
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clearerr (ptp_unit.fileref);
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return SCPE_IOERR;
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}
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ptp_unit.pos = ptp_unit.pos + 1;
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++(ptp_unit.pos);
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat ptp_reset (DEVICE *dptr)
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{
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ptp_unit.buf = 0;
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dev_busy = dev_busy & ~INT_PTP; /* clear busy */
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dev_done = dev_done & ~INT_PTP; /* clear done, int */
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int_req = int_req & ~INT_PTP;
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ptp_unit.buf = 0; /* <not DG compatible> */
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DEV_CLR_BUSY( INT_PTP ) ;
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DEV_CLR_DONE( INT_PTP ) ;
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DEV_UPDATE_INTR ;
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sim_cancel (&ptp_unit); /* deactivate unit */
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return SCPE_OK;
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}
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