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Notes For V3.7
1. New Features 1.1 3.7-0 1.1.1 SCP - Added SET THROTTLE and SET NOTHROTTLE commands to regulate simulator execution rate and host resource utilization. - Added idle support (based on work by Mark Pizzolato). - Added -e to control error processing in nested DO commands (from Dave Bryan). 1.1.2 HP2100 - Added Double Integer instructions, 1000-F CPU, and Floating Point Processor (from Dave Bryan). - Added 2114 and 2115 CPUs, 12607B and 12578A DMA controllers, and 21xx binary loader protection (from Dave Bryan). 1.1.3 Interdata - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state. 1.1.4 PDP-11 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (WAIT instruction executed). - Added TA11/TU60 cassette support. 1.1.5 PDP-8 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). - Added TA8E/TU60 cassette support. 1.1.6 PDP-1 - Added support for 16-channel sequence break system. - Added support for PDP-1D extended features and timesharing clock. - Added support for Type 630 data communications subsystem. 1.1.6 PDP-4/7/9/15 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (keyboard poll loop or jump-to-self). 1.1.7 VAX, VAX780 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (more than 200 cycles at IPL's 0, 1, or 3 in kernel mode). 1.1.8 PDP-10 - Added SET IDLE and SET NOIDLE commands to idle the simulator in wait state (operating system dependent). - Added CD20 (CD11) support. 2. Bugs Fixed Please see the revision history on http://simh.trailing-edge.com or in the source module sim_rev.h.
This commit is contained in:
committed by
Mark Pizzolato
parent
53d02f7fa7
commit
6149cc7e06
@@ -1,6 +1,6 @@
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/* i7094_cd.c: IBM 711/721 card reader/punch
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Copyright (c) 2003-2006, Robert M. Supnik
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Copyright (c) 2003-2007, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -26,6 +26,7 @@
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cdr 711 card reader
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cdp 721 card punch
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19-Jan-07 RMS Added UNIT_TEXT
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13-Jul-06 RMS Fixed problem with 80 column full cards
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Cards are represented as ASCII text streams terminated by newlines.
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@@ -106,7 +107,7 @@ extern uint32 col_masks[12];
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DIB cdr_dib = { &cdr_chsel, NULL };
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UNIT cdr_unit = {
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UDATA (&cdr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE, 0)
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UDATA (&cdr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_TEXT, 0)
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};
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REG cdr_reg[] = {
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@@ -144,7 +145,7 @@ DEVICE cdr_dev = {
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DIB cdp_dib = { &cdp_chsel, &cdp_chwr };
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UNIT cdp_unit = {
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UDATA (&cdp_svc, UNIT_SEQ+UNIT_ATTABLE, 0)
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UDATA (&cdp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_TEXT, 0)
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};
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REG cdp_reg[] = {
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@@ -443,12 +444,12 @@ for (i = ((2 * CD_CHRLNT) + 1); (i > 0) &&
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cdp_cbuf[i++] = '\n'; /* append nl */
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cdp_cbuf[i++] = 0; /* append nul */
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fputs (cdp_cbuf, uptr->fileref); /* write card */
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uptr->pos = ftell (uptr->fileref); /* update position */
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if (ferror (uptr->fileref)) { /* error? */
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perror ("CDP I/O error");
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clearerr (uptr->fileref);
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return SCPE_IOERR;
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}
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uptr->pos = ftell (uptr->fileref); /* update position */
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cdp_sta = CDS_END; /* end state */
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sim_cancel (uptr); /* cancel current */
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sim_activate (uptr, cdp_tstop); /* long timer */
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@@ -1,6 +1,6 @@
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/* i7094_cpu.c: IBM 7094 CPU simulator
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Copyright (c) 2003-2006, Robert M. Supnik
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Copyright (c) 2003-2007, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -25,6 +25,7 @@
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cpu 7094 central processor
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28-Apr-07 RMS Removed clock initialization
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29-Oct-06 RMS Added additional expanded core instructions
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17-Oct-06 RMS Fixed the fix in halt IO wait loop
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16-Jun-06 RMS Fixed bug in halt IO wait loop
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@@ -198,7 +199,6 @@ extern uint32 ch_sta[NUM_CHAN];
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extern uint32 ch_flags[NUM_CHAN];
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extern DEVICE mt_dev[NUM_CHAN];
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extern DEVICE ch_dev[NUM_CHAN];
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extern UNIT clk_unit;
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extern FILE *sim_deb;
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extern int32 sim_int_char;
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extern int32 sim_interval;
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@@ -625,7 +625,6 @@ ind_reloc = ind_reloc & VA_BLK; /* canonical form */
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ind_start = ind_start & VA_BLK;
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ind_limit = (ind_limit & VA_BLK) | VA_OFF;
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chtr_pend = chtr_eval (NULL); /* eval chan traps */
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sim_rtcn_init (clk_unit.wait, TMR_CLK); /* init clock */
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tracing = ((hst_lnt != 0) || DEBUG_PRS (cpu_dev));
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if (ht_pend) { /* HTR pending? */
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@@ -1,6 +1,6 @@
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/* i7094_lp.c: IBM 716 line printer simulator
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Copyright (c) 2003-2006, Robert M. Supnik
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Copyright (c) 2003-2007, Robert M. Supnik
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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@@ -25,6 +25,8 @@
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lpt 716 line printer
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19-Jan-07 RMS Added UNIT_TEXT flag
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Internally, the 7094 works only with column binary and is limited to
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72 columns of data. Each row of the printed line is represented by
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72b of data (two 36b words). A complete print line consists of 12 rows
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@@ -142,7 +144,7 @@ extern char colbin_to_bcd (uint32 colbin);
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DIB lpt_dib = { &lpt_chsel, &lpt_chwr };
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UNIT lpt_unit = {
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UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_CONS, 0)
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UDATA (&lpt_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_CONS+UNIT_TEXT, 0)
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};
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REG lpt_reg[] = {
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@@ -306,7 +308,7 @@ return SCPE_OK;
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t_stat lpt_end_line (UNIT *uptr)
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{
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uint32 i, j, col, row, bufw, colbin;
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uint32 i, col, row, bufw, colbin;
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char *pch, bcd, lpt_cbuf[LPT_CHRLNT + 1];
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t_uint64 dat;
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@@ -325,22 +327,23 @@ for (col = 0; col < 72; col++) { /* proc 72 columns */
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}
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for (i = LPT_CHRLNT; (i > 0) &&
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(lpt_cbuf[i - 1] == ' '); --i) ; /* trim spaces */
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lpt_cbuf[i++] = '\n'; /* append nl */
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lpt_cbuf[i] = 0; /* append nul */
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if (uptr->flags & UNIT_ATT) { /* file? */
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fxwrite (lpt_cbuf, 1, i, uptr->fileref); /* write line */
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fputs (lpt_cbuf, uptr->fileref); /* write line */
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fputc ('\n', uptr->fileref); /* append nl */
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uptr->pos = ftell (uptr->fileref); /* update position */
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if (ferror (uptr->fileref)) { /* error? */
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perror ("LPT I/O error");
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clearerr (uptr->fileref);
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return SCPE_IOERR;
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}
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uptr->pos = ftell (uptr->fileref); /* update position */
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}
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else if (uptr->flags & UNIT_CONS) { /* print to console? */
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for (j = 0; j < i; j++) sim_putchar (lpt_cbuf[j]);
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for (i = 0; lpt_cbuf[i] != 0; i++) sim_putchar (lpt_cbuf[i]);
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sim_putchar ('\r');
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sim_putchar ('\n');
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}
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else return SCPE_UNATT; /* otherwise error */
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uptr->pos = uptr->pos + strlen (lpt_cbuf); /* count char */
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lpt_sta = LPS_END; /* end line state */
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sim_cancel (uptr); /* cancel current */
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sim_activate (uptr, lpt_tstop); /* long timer */
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