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RC2 of 3.9

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After a frantic week of file exchanges, here is RC2.  A lot has changed.

1. HP2100 updates completed, with new features and peripherals.
2. Many, many small file updates for nits found by compilers and static checkers.
3. A few genuine bugs fixed.
4. New makefile and MMS file.

A note on the makefile. It has almost doubled in size and attempts to ferret out PCAP locales properly, as well as do serious optimizations if gcc is used.  It needs to be tested in more environments.  If you run into issues, please report them to Mark Pizzolato as well as me.

The old makefile, updated for the extra files in the HP2100, is included as makefile_old.  You can use that if the new makefile causes problems in your environment.

I'm still targeting a May Day release, with a final RC around Tax Day (April 15).  That leaves times for one more interim RC, if needed.

At this point, I regard the release as feature-complete.  Bug fixes are still fine.

The actual release will have all incomplete and beta simulators in a separate zip file, including Alpha, Sigma, Sage (the microcomputers, not the 50s anti-aircraft computer), and SC1, the SiCortex MIPS simulator.
There will be new releases of all the simulation tools as well.

/Bob
This commit is contained in:
Mark Pizzolato
2012-03-24 15:30:27 -07:00
parent 95e535008b
commit 66c264d678
159 changed files with 3557 additions and 29832 deletions
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8
Interdata/id16_cpu.c
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@@ -28,15 +28,15 @@
28-Apr-07 RMS Removed clock initialization
27-Oct-06 RMS Added idle support
Removed separate PASLA clock
06-Feb-06 RMS Fixed bug in DH (found by Mark Hittinger)
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
06-Feb-06 RMS Fixed bug in DH (Mark Hittinger)
22-Sep-05 RMS Fixed declarations (Sterling Garwood)
25-Aug-05 RMS Fixed DH integer overflow cases
16-Aug-05 RMS Fixed C++ declaration and cast problems
10-Mar-05 RMS Fixed bug in show history routine (from Mark Hittinger)
10-Mar-05 RMS Fixed bug in show history routine (Mark Hittinger)
Revised examine/deposit to do words rather than bytes
07-Nov-04 RMS Added instruction history
22-Sep-03 RMS Added additional instruction decode types
07-Feb-03 RMS Fixed bug in SETM, SETMR (found by Mark Pizzolato)
07-Feb-03 RMS Fixed bug in SETM, SETMR (Mark Pizzolato)
The register state for the Interdata 16b CPU is: