alpha: Correct physical address masking and integer to floag sign detect

Also replaced remaining tabs with spaces

alpha/alpha_cpu.c

@@ -27,7 +27,7 @@
    27-May-2017  RMS     Fixed MIN/MAXx4 iteration counts (Mark Pizzolato)
    26-May-2017  RMS     Fixed other reversed definitions in opcode 12
    28-Apr-2017  RMS     Fixed reversed definitions of INSQH, EXTQH (Maurice Marks)
-  	
+
    Alpha architecturally-defined CPU state:
 
    PC<63:0>                     program counter
@@ -1382,7 +1382,7 @@ while (reason == 0) {
             if (!(arch_mask & AMASK_CIX)) ABORT (EXC_RSVI);
             for (res = 0; rbv != 0; res++) {
                 rbv = rbv & ~(rbv & NEG_Q (rbv));
-				}
+                }
             break;
 
         case 0x31:                                      /* PERR */

alpha/alpha_ev5_defs.h

@@ -55,13 +55,13 @@
 #define VA_GETOFF(x)    (((uint32) (x)) & VA_M_OFF)
 #define VA_GETVPN(x)    (((uint32) ((x) >> VA_V_VPN)) & VA_M_VPN)
 #define VA_GETSEXT(x)   (((uint32) ((x) >> VA_V_SEXT)) & VA_M_SEXT)
-#define PHYS_ADDR(p,v)  ((((t_uint64) (p)) < VA_N_OFF) | VA_GETOFF (v)) 
+#define PHYS_ADDR(p,v)  (((((t_uint64) (p)) < VA_N_OFF) | VA_GETOFF (v)) & EV5_PA_MASK)
 
 /* 43b and 32b superpages - present in all implementations */
 
 #define SPEN_43                 0x2
 #define SPEN_32                 0x1
-#define SP43_MASK               0x000001FFFFFFFFFF
+#define SP43_MASK               (EV5_PA_MASK)
 #define SP32_MASK               0x000000003FFFFFFF
 #define VPN_GETSP43(x)          ((uint32) (((x) >> (VA_WIDTH - VA_N_OFF - 2)) & 3))
 #define VPN_GETSP32(x)          ((uint32) (((x) >> (NTVA_WIDTH - VA_N_OFF - 2)) & 0x1FFF))

alpha/alpha_ev5_pal.c

@@ -164,7 +164,7 @@ REG ev5pal_reg[] = {
     { FLDATA (PWRFL, ev5_pwrfl, 0) },
     { FLDATA (SLI, ev5_sli, 0) },
     { NULL }
-	};
+    };
 
 DEVICE ev5pal_dev = {
     "EV5PAL", &ev5pal_unit, ev5pal_reg, NULL,
@@ -675,7 +675,7 @@ switch (fnc) {
         if (pal_mode && ((val ^ ev5_icsr) & ICSR_SDE)) {
             if (val & ICSR_SDE) { PAL_USE_SHADOW; }
             else { PAL_USE_MAIN; }
-			}
+            }
         ev5_icsr = val & ICSR_RW;
         itlb_set_spage ((((uint32) val) >> ICSR_V_SPE) & ICSR_M_SPE);
         fpen = (((uint32) val) >> ICSR_V_FPE) & 1;
@@ -815,12 +815,12 @@ static struct pal_opt ld_st_opt[] = {
     { HW_LD_PTE,    'P' },
     { HW_LD_LCK,    'L' },
     { 0 }
-	};
+    };
 
 static struct pal_opt rei_opt[] = {
     { HW_REI_S, 'S' },
     { 0 }
-	};
+    };
 
 /* Print options for hardware PAL instruction */
 

alpha/alpha_fpi.c

@@ -132,8 +132,8 @@ uint32 sign = FPR_GETSIGN (op)? S_SIGN: 0;
 uint32 frac = ((uint32) (op >> S_V_FRAC)) & M32;
 uint32 exp = FPR_GETEXP (op);
 
-if (exp == FPR_NAN) exp = S_NAN;			            /* inf or NaN? */
+if (exp == FPR_NAN) exp = S_NAN;                        /* inf or NaN? */
-else if (exp != 0) exp = exp + S_BIAS - T_BIAS;		    /* non-zero? */	
+else if (exp != 0) exp = exp + S_BIAS - T_BIAS;         /* non-zero? */	
 exp = (exp & S_M_EXP) << S_V_EXP;
 return (t_uint64) (sign | exp | (frac & ~(S_SIGN|S_EXP)));
 }
@@ -631,8 +631,8 @@ static const int32 expmin[2] = { T_BIAS - S_BIAS, 0 };
 t_uint64 rndadd, rndbits, res;
 uint32 rndm;
 
-if (r->frac == 0)										/* result 0? */
+if (r->frac == 0)                                       /* result 0? */
-	return ((t_uint64) r->sign << FPR_V_SIGN);
+    return ((t_uint64) r->sign << FPR_V_SIGN);
 rndm = I_GETFRND (ir);                                  /* inst round mode */
 if (rndm == I_FRND_D) rndm = FPCR_GETFRND (fpcr);       /* dynamic? use FPCR */
 rndbits = r->frac & infrnd[dp];                         /* isolate round bits */

alpha/alpha_fpv.c

@@ -82,7 +82,7 @@ uint32 sign = FPR_GETSIGN (op)? F_SIGN: 0;
 uint32 frac = (uint32) (op >> F_V_FRAC);
 uint32 exp = FPR_GETEXP (op);
 
-if (exp != 0) exp = exp + F_BIAS - G_BIAS;		        /* zero? */	
+if (exp != 0) exp = exp + F_BIAS - G_BIAS;              /* zero? */	
 exp = (exp & F_M_EXP) << F_V_EXP;
 return (t_uint64) (sign | exp | (SWAP_VAXF (frac) & ~(F_SIGN|F_EXP)));
 }
@@ -209,7 +209,7 @@ t_uint64 vax_cvtif (t_uint64 val, uint32 ir, uint32 dp)
 UFP a;
 
 if (val == 0) return 0;                                 /* 0? return +0 */
-if (val < 0) {                                          /* < 0? */
+if ((val & Q_SIGN) != 0) {                              /* < 0? */
     a.sign = 1;                                         /* set sign */
     val = NEG_Q (val);                                  /* |val| */
     }
@@ -398,7 +398,7 @@ r->frac = r->frac & M64;
 if (r->frac == 0) {                                     /* if fraction = 0 */
     r->sign = r->exp = 0;                               /* result is 0 */
     return;
-	}
+    }
 while ((r->frac & UF_NM) == 0) {                        /* normalized? */
     for (i = 0; i < 5; i++) {                           /* find first 1 */
         if (r->frac & normmask[i]) break;

alpha/alpha_sys.c

@@ -541,7 +541,7 @@ if (sw & SWMASK ('C')) {                                /* char format? */
     for (sc = 0; sc < 64; sc = sc + 8) {                /* print string */
         c = (uint32) (val[0] >> sc) & 0x7F;
         fprintf (of, (c < 0x20)? "<%02X>": "%c", c);
-		}
+        }
     return -7;                                          /* return # chars */
     }
 if (sw & SWMASK ('M')) {                                /* inst format? */

alpha/old_pal/alpha_pal_unix.c

@@ -162,7 +162,7 @@ REG unixpal_reg[] = {
     { HRDATA (IPL, unix_ipl, 3) },
     { HRDATA (CM, unix_cm, 0) },
     { NULL }
-	};
+    };
 
 DEVICE unixpal_dev = {
     "UNIXPAL", &unixpal_unit, unixpal_reg, NULL,
@@ -170,7 +170,7 @@ DEVICE unixpal_dev = {
     NULL, NULL, &pal_proc_reset_unix,
     NULL, NULL, NULL,
     NULL, DEV_DIS
-	};
+    };
 
 /* Unix interrupt evaluator - returns IPL of highest priority interrupt */
 

alpha/old_pal/alpha_pal_vms.c

@@ -211,7 +211,7 @@ REG vmspal_reg[] = {
     { HRDATA (ASTSR, vms_astsr, 4) },
     { FLDATA (DATFX, vms_datfx, 0) },
     { NULL }
-	};
+    };
 
 DEVICE vmspal_dev = {
     "VMSPAL", &vmspal_unit, vmspal_reg, NULL,
@@ -219,7 +219,7 @@ DEVICE vmspal_dev = {
     NULL, NULL, &pal_proc_reset_vms,
     NULL, NULL, NULL,
     NULL, 0
-	};
+    };
 
 /* VMS interrupt evaluator - returns IPL of highest priority interrupt */
 
@@ -1571,7 +1571,7 @@ if ((pa & (lnt - 1)) == 0) {                            /* aligned? */
     if (lnt == L_LONG) return ReadPL (pa);              /* long? */
     if (lnt == L_WORD) return ReadPW (pa);              /* word? */
     return ReadPB (pa);                                 /* byte */
-	}
+    }
 if ((VA_GETOFF (va) + lnt) > VA_PAGSIZE) {              /* cross page? */
     if (exc = Test (va + 8, acc, &pa1))                 /* test, translate */
         ABORT1 (va + 8, exc + EXC_R);