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Merge branch 'master' into AsyncTmxr

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Conflicts merged and missing changes in new modules added as needed for clock co-scheduling.
This commit is contained in:
Mark Pizzolato
2013-01-21 16:52:42 -08:00
parent 7c7df669ad 95033cee15
commit 83c1d80194
344 changed files with 64292 additions and 11863 deletions
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9
PDP18B/pdp18b_cpu.c
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@@ -379,13 +379,6 @@ int32 hst_p = 0; /* history pointer */
int32 hst_lnt = 0; /* history length */
InstHistory *hst = NULL; /* instruction history */
extern int32 sim_int_char;
extern int32 sim_interval;
extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern t_bool sim_idle_enab;
extern DEVICE *sim_devices[];
extern FILE *sim_log;
t_bool build_dev_tab (void);
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
@@ -2321,8 +2314,6 @@ char *cptr = (char *) desc;
t_value sim_eval[2];
t_stat r;
InstHistory *h;
extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
UNIT *uptr, int32 sw);
if (hst_lnt == 0) /* enabled? */
return SCPE_NOFNC;

2
PDP18B/pdp18b_defs.h
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@@ -496,6 +496,4 @@ typedef struct {
t_stat set_devno (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat show_devno (FILE *st, UNIT *uptr, int32 val, void *desc);
int32 clk_cosched (int32 wait);
#endif

2
PDP18B/pdp18b_drm.c
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@@ -244,7 +244,7 @@ static const int32 boot_rom[] = {
t_stat drm_boot (int32 unitno, DEVICE *dptr)
{
int32 i;
size_t i;
extern int32 PC;
if (drm_dib.dev != DEV_DRM) /* non-std addr? */

3
PDP18B/pdp18b_dt.c
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@@ -327,9 +327,6 @@
extern int32 M[];
extern int32 int_hwre[API_HLVL+1];
extern UNIT cpu_unit;
extern int32 sim_switches;
extern int32 sim_is_running;
extern FILE *sim_deb;
int32 dtsa = 0; /* status A */
int32 dtsb = 0; /* status B */

3
PDP18B/pdp18b_mt.c
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@@ -127,7 +127,6 @@
extern int32 M[];
extern int32 int_hwre[API_HLVL+1];
extern UNIT cpu_unit;
extern FILE *sim_deb;
int32 mt_cu = 0; /* command/unit */
int32 mt_sta = 0; /* status register */
@@ -199,7 +198,7 @@ DEVICE mt_dev = {
MT_NUMDR, 10, 31, 1, 8, 8,
NULL, NULL, &mt_reset,
NULL, &mt_attach, &mt_detach,
&mt_dib, DEV_DISABLE | DEV_DEBUG
&mt_dib, DEV_DISABLE | DEV_DEBUG | DEV_TAPE
};
/* IOT routine */

27
PDP18B/pdp18b_stddev.c
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@@ -74,6 +74,7 @@
*/
#include "pdp18b_defs.h"
#include "sim_tmxr.h"
#include <ctype.h>
#define UNIT_V_RASCII (UNIT_V_UF + 0) /* reader ASCII */
@@ -85,8 +86,6 @@
extern int32 M[];
extern int32 int_hwre[API_HLVL+1], PC, ASW;
extern int32 sim_switches;
extern int32 sim_is_running;
extern UNIT cpu_unit;
int32 clk_state = 0;
@@ -453,7 +452,6 @@ int32 clk_task_upd (t_bool clr)
{
uint32 delta, val, iusec10;
uint32 cur = sim_grtime ();
uint32 old = clk_task_timer;
double usec10;
if (cur > clk_task_last)
@@ -479,16 +477,6 @@ int32 clk_iors (void)
return (TST_INT (CLK)? IOS_CLK: 0);
}
/* Clock coscheduling routine */
int32 clk_cosched (int32 wait)
{
int32 t;
t = sim_is_active (&clk_unit);
return (t? t - 1: wait);
}
/* Reset routine */
t_stat clk_reset (DEVICE *dptr)
@@ -861,8 +849,8 @@ static const int32 boot_rom[] = {
t_stat ptr_boot (int32 unitno, DEVICE *dptr)
{
int32 i, mask, wd;
extern int32 sim_switches;
size_t i;
int32 mask, wd;
#if defined (PDP7)
if (sim_switches & SWMASK ('H')) /* hardware RIM load? */
@@ -994,7 +982,7 @@ if (pulse & 001) { /* KSF */
}
if (pulse & 002) { /* KRS/KRB */
CLR_INT (TTI); /* clear flag */
dat = dat | tti_unit.buf & TTI_MASK; /* return buffer */
dat = dat | (tti_unit.buf & TTI_MASK); /* return buffer */
#if defined (PDP15)
if (pulse & 020) /* KRS? */
tti_fdpx = 1;
@@ -1014,8 +1002,7 @@ t_stat tti_svc (UNIT *uptr)
#if defined (KSR28) /* Baudot... */
int32 in, c, out;
sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
/* continue poll */
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if (tti_2nd) { /* char waiting? */
uptr->buf = tti_2nd; /* return char */
tti_2nd = 0; /* not waiting */
@@ -1050,8 +1037,7 @@ else {
#else /* ASCII... */
int32 c, out;
sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
/* continue poll */
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
out = c & 0177; /* mask echo to 7b */
@@ -1082,6 +1068,7 @@ return (TST_INT (TTI)? IOS_TTI: 0);
t_stat tti_reset (DEVICE *dptr)
{
tmxr_set_console_units (&tti_unit, &tto_unit);
CLR_INT (TTI); /* clear flag */
if (!sim_is_running) { /* RESET (not CAF)? */
tti_unit.buf = 0; /* clear buffer */

2
PDP18B/pdp18b_sys.c
View File

@@ -345,8 +345,6 @@ return SCPE_OK;
t_stat sim_load (FILE *fileref, char *cptr, char *fnam, int flag)
{
extern int32 sim_switches;
if (flag != 0)
return SCPE_NOFNC;
if (sim_switches & SWMASK ('S')) /* RIM format? */

6
PDP18B/pdp18b_tt1.c
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@@ -57,7 +57,7 @@ uint32 ttix_done = 0; /* input flags */
uint32 ttox_done = 0; /* output flags */
uint8 ttix_buf[TTX_MAXL] = { 0 }; /* input buffers */
uint8 ttox_buf[TTX_MAXL] = { 0 }; /* output buffers */
TMLN ttx_ldsc[TTX_MAXL] = { 0 }; /* line descriptors */
TMLN ttx_ldsc[TTX_MAXL] = { {0} }; /* line descriptors */
TMXR ttx_desc = { 1, 0, 0, ttx_ldsc }; /* mux descriptor */
#define ttx_lines ttx_desc.lines /* current number of lines */
@@ -128,7 +128,7 @@ DEVICE tti1_dev = {
1, 10, 31, 1, 8, 8,
&tmxr_ex, &tmxr_dep, &ttx_reset,
NULL, &ttx_attach, &ttx_detach,
&ttix_dib, DEV_NET | DEV_DISABLE
&ttix_dib, DEV_MUX | DEV_DISABLE
};
/* TTOx data structures
@@ -215,7 +215,7 @@ int32 ln, c, temp;
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return SCPE_OK;
sim_activate (uptr, clk_cosched (tmxr_poll)); /* continue poll */
sim_clock_coschedule (uptr, tmxr_poll); /* continue poll */
ln = tmxr_poll_conn (&ttx_desc); /* look for connect */
if (ln >= 0) /* got one? rcv enab */
ttx_ldsc[ln].rcve = 1;