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mirror of https://github.com/open-simh/simh.git synced 2026-02-13 11:34:39 +00:00

Unibus and Qbus VAXen: Add DUP-11/DPV-11 device

These devices start disabled and will be that way in essentially all
working systems, but there apparently was a DECnet Phase V
support for this device, so it is added to all systems. The DPV
should now be readily testable.

As mentioned in #1152.  That PR will fix the DUP device.

This commit is explicitly released from any license restriction
mentioned in the LICENSE.txt of the github.com/simh/simh
master branch changes.
This commit is contained in:
Mark Pizzolato
2022-06-05 13:06:04 -07:00
parent 775e2f1f79
commit 910bbc2d7e
18 changed files with 88 additions and 19 deletions

View File

@@ -340,8 +340,10 @@ typedef struct {
#define INT_V_QVSS 21 /* QVSS */
#define INT_V_DMCRX 22
#define INT_V_DMCTX 23
#define INT_V_TDRX 24 /* TU58 */
#define INT_V_TDTX 25
#define INT_V_DUPRX 24 /* DPV11 */
#define INT_V_DUPTX 25
#define INT_V_TDRX 26 /* TU58 */
#define INT_V_TDTX 27
#define INT_CLK (1u << INT_V_CLK)
#define INT_RQ (1u << INT_V_RQ)
@@ -368,6 +370,8 @@ typedef struct {
#define INT_QVSS (1u << INT_V_QVSS)
#define INT_DMCRX (1u << INT_V_DMCRX)
#define INT_DMCTX (1u << INT_V_DMCTX)
#define INT_DUPRX (1u << INT_V_DUPRX)
#define INT_DUPTX (1u << INT_V_DUPTX)
#define INT_TDRX (1u << INT_V_TDRX)
#define INT_TDTX (1u << INT_V_TDTX)
@@ -396,6 +400,8 @@ typedef struct {
#define IPL_QVSS (0x14 - IPL_HMIN)
#define IPL_DMCRX (0x14 - IPL_HMIN)
#define IPL_DMCTX (0x14 - IPL_HMIN)
#define IPL_DUPRX (0x14 - IPL_HMIN)
#define IPL_DUPTX (0x14 - IPL_HMIN)
#define IPL_TDRX (0x14 - IPL_HMIN)
#define IPL_TDTX (0x14 - IPL_HMIN)

View File

@@ -68,6 +68,7 @@ extern DEVICE va_dev;
extern DEVICE vc_dev;
extern DEVICE lk_dev;
extern DEVICE vs_dev;
extern DEVICE dpv_dev;
DEVICE *sim_devices[] = {
&cpu_dev,
@@ -100,6 +101,9 @@ DEVICE *sim_devices[] = {
&tq_dev,
&xq_dev,
&xqb_dev,
#if !defined(VAX_620)
&dpv_dev,
#endif
NULL
};

View File

@@ -61,6 +61,7 @@ extern DEVICE dz_dev;
extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev;
extern DEVICE dup_dev;
extern DEVICE ch_dev;
DEVICE *sim_devices[] = {
@@ -94,6 +95,7 @@ DEVICE *sim_devices[] = {
&xu_dev,
&xub_dev,
&dmc_dev,
&dup_dev,
&ch_dev,
NULL
};

View File

@@ -63,6 +63,7 @@ extern DEVICE dz_dev;
extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev;
extern DEVICE dup_dev;
extern DEVICE ch_dev;
DEVICE *sim_devices[] = {
@@ -99,6 +100,7 @@ DEVICE *sim_devices[] = {
&xu_dev,
&xub_dev,
&dmc_dev,
&dup_dev,
&ch_dev,
NULL
};

View File

@@ -63,6 +63,7 @@ extern DEVICE dz_dev;
extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev;
extern DEVICE dup_dev;
extern DEVICE ch_dev;
DEVICE *sim_devices[] = {
@@ -100,6 +101,7 @@ DEVICE *sim_devices[] = {
&xu_dev,
&xub_dev,
&dmc_dev,
&dup_dev,
&ch_dev,
NULL
};

View File

@@ -60,6 +60,7 @@ extern DEVICE dz_dev;
extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev;
extern DEVICE dup_dev;
extern DEVICE ch_dev;
extern UNIT cpu_unit;
@@ -100,6 +101,7 @@ DEVICE *sim_devices[] = {
&xu_dev,
&xub_dev,
&dmc_dev,
&dup_dev,
&ch_dev,
NULL
};

View File

@@ -63,6 +63,7 @@ extern DEVICE dz_dev;
extern DEVICE vh_dev;
extern DEVICE xu_dev, xub_dev;
extern DEVICE dmc_dev;
extern DEVICE dup_dev;
extern DEVICE ch_dev;
DEVICE *sim_devices[] = {
@@ -99,6 +100,7 @@ DEVICE *sim_devices[] = {
&xu_dev,
&xub_dev,
&dmc_dev,
&dup_dev,
&ch_dev,
NULL
};

View File

@@ -59,6 +59,7 @@ extern DEVICE vh_dev;
extern DEVICE vc_dev;
extern DEVICE lk_dev;
extern DEVICE vs_dev;
extern DEVICE dpv_dev;
extern UNIT cpu_unit;
@@ -93,6 +94,7 @@ DEVICE *sim_devices[] = {
&tq_dev,
&xq_dev,
&xqb_dev,
&dpv_dev,
NULL
};

View File

@@ -368,8 +368,10 @@ typedef struct {
#define INT_V_QVSS 21 /* QVSS */
#define INT_V_DMCRX 22 /* DMC11 */
#define INT_V_DMCTX 23
#define INT_V_TDRX 24 /* TU58 */
#define INT_V_TDTX 25
#define INT_V_DUPRX 24 /* DPV11 */
#define INT_V_DUPTX 25
#define INT_V_TDRX 26 /* TU58 */
#define INT_V_TDTX 27
#define INT_CLK (1u << INT_V_CLK)
#define INT_RQ (1u << INT_V_RQ)
@@ -396,6 +398,8 @@ typedef struct {
#define INT_QVSS (1u << INT_V_QVSS)
#define INT_DMCRX (1u << INT_V_DMCRX)
#define INT_DMCTX (1u << INT_V_DMCTX)
#define INT_DUPRX (1u << INT_V_DUPRX)
#define INT_DUPTX (1u << INT_V_DUPTX)
#define INT_TDRX (1u << INT_V_TDRX)
#define INT_TDTX (1u << INT_V_TDTX)
@@ -424,6 +428,8 @@ typedef struct {
#define IPL_QVSS (0x14 - IPL_HMIN)
#define IPL_DMCRX (0x14 - IPL_HMIN)
#define IPL_DMCTX (0x14 - IPL_HMIN)
#define IPL_DUPRX (0x14 - IPL_HMIN)
#define IPL_DUPTX (0x14 - IPL_HMIN)
#define IPL_TDRX (0x14 - IPL_HMIN)
#define IPL_TDTX (0x14 - IPL_HMIN)