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Notes For V3.8

Browse Source 
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.1.2 GRI

- Added support for the GRI-99 processor.

1.1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

1.2 3.8-1

1.2.1 SCP and libraries

- Added capability to set line connection order for terminal multiplexers.

1.2.2 HP2100

- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2009-02-08 09:06:00 -08:00
committed by Mark Pizzolato
parent 59aa4a73b1
commit 9c4779c061
286 changed files with 40587 additions and 19094 deletions
Download Patch File Download Diff File Expand all files Collapse all files

102
GRI/gri_cpu.c
View File

@@ -421,7 +421,8 @@ ao_update (); /* update AO */
while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break;
if (reason = sim_process_event ())
break;
}
if (bkp) { /* breakpoint? */
@@ -435,7 +436,8 @@ while (reason == 0) { /* loop until halted */
int32 i, vec;
t = dev_done & ISR; /* find hi pri */
for (i = 15; i >= 0; i--) {
if ((t >> i) & 1) break;
if ((t >> i) & 1)
break;
}
if ((i < 0) || ((vec = vec_map[i]) < 0)) { /* undefined? */
reason = STOP_ILLINT; /* stop */
@@ -471,7 +473,8 @@ while (reason == 0) { /* loop until halted */
else if (dst == U_FSK) { /* skip func? */
t = dev_tab[src].SF (op & ~1); /* issue SF */
reason = t >> SF_V_REASON;
if ((t ^ op) & 1) SC = SC + 2; /* skip? */
if ((t ^ op) & 1) /* skip? */
SC = SC + 2;
SC = (SC + 1) & AMASK; /* incr SC */
}
@@ -555,7 +558,8 @@ while (reason == 0) { /* loop until halted */
MA = IDX_ADD (MA); /* index? */
SC = (SC + 1) & AMASK; /* incr SC again */
t = (M[MA] + 1) & DMASK; /* autoinc */
if (MEM_ADDR_OK (MA)) M[MA] = t;
if (MEM_ADDR_OK (MA))
M[MA] = t;
MA = IDX_ADD (t); /* index? */
reason = bus_op (src, op & BUS_FNC, dst); /* xmt and modify */
break;
@@ -569,7 +573,8 @@ while (reason == 0) { /* loop until halted */
case MEM_IDF: /* immediate defer */
MA = SC; /* get ind addr */
t = (M[MA] + 1) & DMASK; /* autoinc */
if (MEM_ADDR_OK (MA)) M[MA] = t;
if (MEM_ADDR_OK (MA))
M[MA] = t;
MA = IDX_ADD (t); /* index? */
SC = (SC + 1) & AMASK; /* incr SC again */
reason = bus_op (src, op & BUS_FNC, dst); /* xmt and modify */
@@ -592,30 +597,35 @@ t_stat bus_op (uint32 src, uint32 op, uint32 dst)
uint32 t, old_t;
t = dev_tab[src].Src (src); /* get src */
if (op & BUS_COM) t = t ^ DMASK; /* complement? */
if (op & BUS_COM) /* complement? */
t = t ^ DMASK;
switch (op & BUS_FNC) { /* case op */
case BUS_P1: /* plus 1 */
t = t + 1; /* do add */
if (t & CBIT) MSR = MSR | MSR_BOV; /* set cry out */
if (t & CBIT) /* set cry out */
MSR = MSR | MSR_BOV;
else MSR = MSR & ~MSR_BOV;
break;
case BUS_L1: /* left 1 */
t = (t << 1) | ((MSR & MSR_L)? 1: 0); /* rotate */
if (t & CBIT) MSR = MSR | MSR_L; /* set link out */
if (t & CBIT) /* set link out */
MSR = MSR | MSR_L;
else MSR = MSR & ~MSR_L;
break;
case BUS_R1: /* right 1 */
old_t = t;
t = (t >> 1) | ((MSR & MSR_L)? SIGN: 0); /* rotate */
if (old_t & 1) MSR = MSR | MSR_L; /* set link out */
if (old_t & 1) /* set link out */
MSR = MSR | MSR_L;
else MSR = MSR & ~MSR_L;
break;
} /* end case op */
if (dst == thwh) DR = t & DMASK; /* display dst? */
if (dst == thwh) /* display dst? */
DR = t & DMASK;
return dev_tab[dst].Dst (dst, t & DMASK); /* store dst */
}
@@ -670,7 +680,8 @@ switch (op & 3) { /* FOM link */
break;
}
if (op & 4) return STOP_HALT; /* HALT */
if (op & 4) /* HALT */
return STOP_HALT;
return SCPE_OK;
}
@@ -678,7 +689,8 @@ uint32 zero_sf (uint32 op)
{
if ((op & 010) || /* power always ok */
((op & 4) && (MSR & MSR_L)) || /* link set? */
((op & 2) && (MSR & MSR_BOV))) return 1; /* BOV set? */
((op & 2) && (MSR & MSR_BOV))) /* BOV set? */
return 1;
return 0;
}
@@ -691,7 +703,8 @@ return IR;
t_stat ir_fo (uint32 op)
{
if (op & 2) bkp = 1;
if (op & 2)
bkp = 1;
return SCPE_OK;
}
@@ -723,8 +736,10 @@ return SCPE_OK;
t_stat isr_fo (uint32 op)
{
if (op & ISR_ON) dev_done = (dev_done | INT_ON) & ~INT_NODEF;
if (op & ISR_OFF) dev_done = dev_done & ~INT_ON;
if (op & ISR_ON)
dev_done = (dev_done | INT_ON) & ~INT_NODEF;
if (op & ISR_OFF)
dev_done = dev_done & ~INT_ON;
return SCPE_OK;
}
@@ -750,7 +765,8 @@ return M[MA];
t_stat mem_wr (uint32 dst, uint32 dat)
{
if (MEM_ADDR_OK (MA)) M[MA] = dat;
if (MEM_ADDR_OK (MA))
M[MA] = dat;
return SCPE_OK;
}
@@ -814,7 +830,8 @@ switch (af) {
break;
}
if ((AX + AY) & CBIT) MSR = MSR | MSR_AOV; /* always calc AOV */
if ((AX + AY) & CBIT) /* always calc AOV */
MSR = MSR | MSR_AOV;
else MSR = MSR & ~MSR_AOV;
if (SIGN & ((AX ^ (AX + AY)) & (~AX ^ AY))) /* always calc SOV */
MSR = MSR | MSR_SOV;
@@ -824,7 +841,8 @@ return AO;
uint32 ax_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_AO) return AX;
if (cpu_unit.flags & UNIT_AO)
return AX;
else return 0;
}
@@ -840,7 +858,8 @@ return stop_opr;
uint32 ay_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_AO) return AY;
if (cpu_unit.flags & UNIT_AO)
return AY;
else return 0;
}
@@ -856,7 +875,8 @@ return stop_opr;
uint32 ao_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_AO) return ao_update ();
if (cpu_unit.flags & UNIT_AO)
return ao_update ();
else return 0;
}
@@ -876,7 +896,8 @@ uint32 ao_sf (uint32 op)
if (!(cpu_unit.flags & UNIT_AO)) /* not installed? */
return (stop_opr << SF_V_REASON);
if (((op & 2) && (MSR & MSR_AOV)) || /* arith carry? */
((op & 4) && (MSR & MSR_SOV))) return 1; /* arith overflow? */
((op & 4) && (MSR & MSR_SOV))) /* arith overflow? */
return 1;
return 0;
}
@@ -908,7 +929,8 @@ switch (op) {
case EAO_ARS: /* arith right? */
t = 0; /* shift limiter */
if (AX & SIGN) MSR = MSR | MSR_L; /* L = sign */
if (AX & SIGN) /* L = sign */
MSR = MSR | MSR_L;
else MSR = MSR & ~MSR_L;
do { /* shift one bit */
AY = ((AY >> 1) | (AX << 15)) & DMASK;
@@ -938,7 +960,8 @@ return SCPE_OK;
uint32 xr_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_GRI99) return XR;
if (cpu_unit.flags & UNIT_GRI99)
return XR;
else return 0;
}
@@ -955,7 +978,8 @@ return stop_opr;
uint32 atrp_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_GRI99) return TRP;
if (cpu_unit.flags & UNIT_GRI99)
return TRP;
else return 0;
}
@@ -972,7 +996,8 @@ return stop_opr;
uint32 bsw_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_BSWPK) return BSW;
if (cpu_unit.flags & UNIT_BSWPK)
return BSW;
else return 0;
}
@@ -989,7 +1014,8 @@ return stop_opr;
uint32 bpk_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_BSWPK) return BPK;
if (cpu_unit.flags & UNIT_BSWPK)
return BPK;
else return 0;
}
@@ -1006,7 +1032,8 @@ return stop_opr;
uint32 gr_rd (uint32 src)
{
if (cpu_unit.flags & UNIT_GPR) return GR[src - U_GR];
if (cpu_unit.flags & UNIT_GPR)
return GR[src - U_GR];
else return 0;
}
@@ -1032,10 +1059,12 @@ ISR = 0;
MSR = 0;
MA = IR = 0;
BSW = BPK = 0;
for (i = 0; i < 6; i++) GR[i] = 0;
for (i = 0; i < 6; i++)
GR[i] = 0;
dev_done = dev_done & ~INT_PENDING;
scq_r = find_reg ("SCQ", NULL, dptr);
if (scq_r) scq_r->qptr = 0;
if (scq_r)
scq_r->qptr = 0;
else return SCPE_IERR;
sim_brk_types = sim_brk_dflt = SWMASK ('E');
return SCPE_OK;
@@ -1045,8 +1074,10 @@ return SCPE_OK;
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
{
if (addr >= MEMSIZE) return SCPE_NXM;
if (vptr != NULL) *vptr = M[addr] & DMASK;
if (addr >= MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
*vptr = M[addr] & DMASK;
return SCPE_OK;
}
@@ -1054,7 +1085,8 @@ return SCPE_OK;
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
{
if (addr >= MEMSIZE) return SCPE_NXM;
if (addr >= MEMSIZE)
return SCPE_NXM;
M[addr] = val & DMASK;
return SCPE_OK;
}
@@ -1066,10 +1098,12 @@ uint32 i;
if ((val <= 0) || (val > MAXMEMSIZE) || ((val & 07777) != 0))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i++) mc = mc | M[i];
for (i = val; i < MEMSIZE; i++)
mc = mc | M[i];
if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
MEMSIZE = val;
for (i = MEMSIZE; i < MAXMEMSIZE; i++) M[i] = 0;
for (i = MEMSIZE; i < MAXMEMSIZE; i++)
M[i] = 0;
return SCPE_OK;
}

42
GRI/gri_stddev.c
View File

@@ -224,15 +224,18 @@ return SCPE_OK;
t_stat tty_fo (uint32 op)
{
if (op & TTY_IRDY) dev_done = dev_done & ~INT_TTI;
if (op & TTY_ORDY) dev_done = dev_done & ~INT_TTO;
if (op & TTY_IRDY)
dev_done = dev_done & ~INT_TTI;
if (op & TTY_ORDY)
dev_done = dev_done & ~INT_TTO;
return SCPE_OK;
}
uint32 tty_sf (uint32 op)
{
if (((op & TTY_IRDY) && (dev_done & INT_TTI)) ||
((op & TTY_ORDY) && (dev_done & INT_TTO))) return 1;
((op & TTY_ORDY) && (dev_done & INT_TTO)))
return 1;
return 0;
}
@@ -243,8 +246,10 @@ t_stat tti_svc (UNIT *uptr)
int32 c;
sim_activate (uptr, uptr->wait); /* continue poll */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) return c; /* no char or error? */
if (c & SCPE_BREAK) uptr->buf = 0; /* break? */
if ((c = sim_poll_kbd ()) < SCPE_KFLAG) /* no char or error? */
return c;
if (c & SCPE_BREAK) /* break? */
uptr->buf = 0;
else uptr->buf = sim_tt_inpcvt (c, TT_GET_MODE (uptr->flags) | TTUF_KSR);
dev_done = dev_done | INT_TTI; /* set ready */
uptr->pos = uptr->pos + 1;
@@ -310,16 +315,20 @@ return SCPE_OK;
t_stat hsrp_fo (uint32 op)
{
if (op & PT_IRDY) dev_done = dev_done & ~INT_HSR;
if (op & PT_ORDY) dev_done = dev_done & ~INT_HSP;
if (op & PT_STRT) sim_activate (&hsr_unit, hsr_unit.wait);
if (op & PT_IRDY)
dev_done = dev_done & ~INT_HSR;
if (op & PT_ORDY)
dev_done = dev_done & ~INT_HSP;
if (op & PT_STRT)
sim_activate (&hsr_unit, hsr_unit.wait);
return SCPE_OK;
}
uint32 hsrp_sf (uint32 op)
{
if (((op & PT_IRDY) && (dev_done & INT_HSR)) ||
((op & PT_ORDY) && (dev_done & INT_HSP))) return 1;
((op & PT_ORDY) && (dev_done & INT_HSP)))
return 1;
return 0;
}
@@ -331,7 +340,8 @@ if ((hsr_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (hsr_stopioe, SCPE_UNATT);
if ((temp = getc (hsr_unit.fileref)) == EOF) { /* read char */
if (feof (hsr_unit.fileref)) { /* err or eof? */
if (hsr_stopioe) printf ("HSR end of file\n");
if (hsr_stopioe)
printf ("HSR end of file\n");
else return SCPE_OK;
}
else perror ("HSR I/O error");
@@ -380,23 +390,27 @@ return SCPE_OK;
t_stat rtc_fo (int32 op)
{
if (op & RTC_OFF) sim_cancel (&rtc_unit); /* clock off? */
if (op & RTC_OFF) /* clock off? */
sim_cancel (&rtc_unit);
if ((op & RTC_ON) && !sim_is_active (&rtc_unit)) /* clock on? */
sim_activate (&rtc_unit, sim_rtc_init (rtc_unit.wait));
if (op & RTC_OV) dev_done = dev_done & ~INT_RTC; /* clr ovflo? */
if (op & RTC_OV) /* clr ovflo? */
dev_done = dev_done & ~INT_RTC;
return SCPE_OK;
}
uint32 rtc_sf (int32 op)
{
if ((op & RTC_OV) && (dev_done & INT_RTC)) return 1;
if ((op & RTC_OV) && (dev_done & INT_RTC))
return 1;
return 0;
}
t_stat rtc_svc (UNIT *uptr)
{
M[RTC_CTR] = (M[RTC_CTR] + 1) & DMASK; /* incr counter */
if (M[RTC_CTR] == 0) dev_done = dev_done | INT_RTC; /* ovflo? set ready */
if (M[RTC_CTR] == 0) /* ovflo? set ready */
dev_done = dev_done | INT_RTC;
sim_activate (&rtc_unit, sim_rtc_calb (rtc_tps)); /* reactivate */
return SCPE_OK;
}

138
GRI/gri_sys.c
View File

@@ -93,19 +93,23 @@ char gbuf[CBUFSIZE];
if (*cptr != 0) { /* more input? */
cptr = get_glyph (cptr, gbuf, 0); /* get origin */
org = get_uint (gbuf, 8, AMASK, &r);
if (r != SCPE_OK) return r;
if (*cptr != 0) return SCPE_ARG; /* no more */
if (r != SCPE_OK)
return r;
if (*cptr != 0) /* no more */
return SCPE_ARG;
}
else org = 0200; /* default 200 */
for (;;) { /* until EOF */
while ((c = getc (fileref)) == 0) ; /* skip starting 0's */
if (c == EOF) break; /* EOF? done */
if (c == EOF) /* EOF? done */
break;
for ( ; c != 0; ) { /* loop until ctl = 0 */
/* ign ctrl frame */
if ((c = getc (fileref)) == EOF) /* get high byte */
return SCPE_FMT; /* EOF is error */
if (!MEM_ADDR_OK (org)) return SCPE_NXM;
if (!MEM_ADDR_OK (org))
return SCPE_NXM;
M[org] = ((c & 0377) << 8); /* store high */
if ((c = getc (fileref)) == EOF) /* get low byte */
return SCPE_FMT; /* EOF is error */
@@ -114,7 +118,8 @@ for (;;) { /* until EOF */
if ((c = getc (fileref)) == EOF) /* get ctrl frame */
return SCPE_OK; /* EOF is ok */
} /* end block for */
if (!(sim_switches & SWMASK ('C'))) return SCPE_OK;
if (!(sim_switches & SWMASK ('C')))
return SCPE_OK;
} /* end tape for */
return SCPE_OK;
}
@@ -293,12 +298,14 @@ for (i = nfirst = 0; fname[i] != NULL; i++) {
if (((inst & fop[i].imask) == fop[i].inst) &&
((op & fop[i].omask) == fop[i].oper)) {
op = op & ~fop[i].omask;
if (nfirst) fputc (' ', of);
if (nfirst)
fputc (' ', of);
nfirst = 1;
fprintf (of, "%s", fname[i]);
}
}
if (op) fprintf (of, " %o", op);
if (op)
fprintf (of, " %o", op);
return;
}
@@ -335,7 +342,8 @@ uint32 inst, src, dst, op, bop;
inst = val[0];
if (sw & SWMASK ('A')) { /* ASCII? */
if (inst > 0377) return SCPE_ARG;
if (inst > 0377)
return SCPE_ARG;
fprintf (of, FMTASC (inst & 0177));
return SCPE_OK;
}
@@ -344,7 +352,8 @@ if (sw & SWMASK ('C')) { /* characters? */
fprintf (of, FMTASC (inst & 0177));
return SCPE_OK;
}
if (!(sw & SWMASK ('M'))) return SCPE_ARG;
if (!(sw & SWMASK ('M')))
return SCPE_ARG;
/* Instruction decode */
@@ -382,27 +391,30 @@ for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
case F_V_RR: /* reg reg */
if (strcmp (unsrc[src], undst[dst]) == 0) {
if (bop) fprintf (of, "%s %s,%s", opcode[i + 2],
unsrc[src], opname[bop]);
if (bop)
fprintf (of, "%s %s,%s", opcode[i + 2],
unsrc[src], opname[bop]);
else fprintf (of, "%s %s", opcode[i + 2], unsrc[src]);
}
else {
if (bop) fprintf (of, "%s %s,%s,%s", opcode[i],
unsrc[src], opname[bop], undst[dst]);
if (bop)
fprintf (of, "%s %s,%s,%s", opcode[i],
unsrc[src], opname[bop], undst[dst]);
else fprintf (of, "%s %s,%s", opcode[i],
unsrc[src], undst[dst]);
unsrc[src], undst[dst]);
}
break;
case F_V_ZR: /* zero reg */
if (bop) fprintf (of, "%s %s,%s", opcode[i],
opname[bop], undst[dst]);
if (bop)
fprintf (of, "%s %s,%s", opcode[i],
opname[bop], undst[dst]);
else fprintf (of, "%s %s", opcode[i], undst[dst]);
break;
case F_V_JC: /* jump cond */
fprintf (of, "%s %s,%s,",
opcode[i], unsrc[src], cdname[op >> 1]);
opcode[i], unsrc[src], cdname[op >> 1]);
fprint_addr (of, val[1], 0, U_SC);
break;
@@ -412,14 +424,16 @@ for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
break;
case F_V_RM: /* reg mem */
if (bop) fprintf (of, "%s %s,%s,",
opcode[i], unsrc[src], opname[bop]);
if (bop)
fprintf (of, "%s %s,%s,",
opcode[i], unsrc[src], opname[bop]);
else fprintf (of, "%s %s,", opcode[i], unsrc[src]);
fprint_addr (of, val[1], op & MEM_MOD, dst);
break;
case F_V_ZM: /* zero mem */
if (bop) fprintf (of, "%s %s,", opcode[i], opname[bop]);
if (bop)
fprintf (of, "%s %s,", opcode[i], opname[bop]);
else fprintf (of, "%s ", opcode[i]);
fprint_addr (of, val[1], op & MEM_MOD, dst);
break;
@@ -427,14 +441,16 @@ for (i = 0; opcode[i] != NULL; i++) { /* loop thru ops */
case F_V_MR: /* mem reg */
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, val[1], op & MEM_MOD, dst);
if (bop) fprintf (of, ",%s,%s", opname[bop], undst[dst]);
if (bop)
fprintf (of, ",%s,%s", opname[bop], undst[dst]);
else fprintf (of, ",%s", undst[dst]);
break;
case F_V_MS: /* mem self */
fprintf (of, "%s ", opcode[i]);
fprint_addr (of, val[1], op & MEM_MOD, dst);
if (bop) fprintf (of, ",%s", opname[bop]);
if (bop)
fprintf (of, ",%s", opname[bop]);
break;
} /* end case */
@@ -465,7 +481,8 @@ while (*cptr) {
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
d = get_uint (gbuf, 8, 017, &r); /* octal? */
if (r == SCPE_OK) { /* ok? */
if (d & fncm) return NULL; /* already filled? */
if (d & fncm) /* already filled? */
return NULL;
fncv = fncv | d; /* save */
fncm = fncm | d; /* field filled */
}
@@ -473,13 +490,15 @@ while (*cptr) {
for (i = 0; fname[i] != NULL; i++) { /* search table */
if ((strcmp (gbuf, fname[i]) == 0) && /* match for inst? */
((inst & fop[i].imask) == fop[i].inst)) {
if (fop[i].oper & fncm) return NULL; /* already filled? */
if (fop[i].oper & fncm) /* already filled? */
return NULL;
fncm = fncm | fop[i].omask;
fncv = fncv | fop[i].oper;
break;
}
}
if (fname[i] == NULL) return NULL;
if (fname[i] == NULL)
return NULL;
} /* end else */
} /* end while */
val[0] = val[0] | (fncv << I_V_OP); /* store fnc */
@@ -496,7 +515,8 @@ cptr = get_glyph (cptr, gbuf, term); /* get glyph */
if (gbuf[0] == '#') /* indexed? */
d = get_uint (gbuf + 1, 8, AMASK, &r) | INDEX; /* [0, 77777] */
else d = get_uint (gbuf, 8, DMASK, &r); /* [0,177777] */
if (r != SCPE_OK) return NULL;
if (r != SCPE_OK)
return NULL;
val[1] = d; /* second wd */
return cptr;
}
@@ -510,11 +530,13 @@ t_stat r;
cptr = get_glyph (cptr, gbuf, term); /* get glyph */
for (d = 0; d < 64; d++) { /* symbol match? */
if ((strcmp (gbuf, unsrc[d]) == 0) ||
(strcmp (gbuf, undst[d]) == 0)) break;
(strcmp (gbuf, undst[d]) == 0))
break;
}
if (d >= 64) { /* no, [0,63]? */
d = get_uint (gbuf, 8, 077, &r);
if (r != SCPE_OK) return NULL;
if (r != SCPE_OK)
return NULL;
}
val[0] = val[0] | (d << (src? I_V_SRC: I_V_DST)); /* or to inst */
return cptr;
@@ -554,14 +576,15 @@ char *tptr, gbuf[CBUFSIZE];
while (isspace (*cptr)) cptr++; /* absorb spaces */
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = (t_value) cptr[0] & 0177;
return SCPE_OK;
}
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* char string? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
val[0] = (((t_value) cptr[0] & 0177) << 8) |
((t_value) cptr[1] & 0177);
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = (((t_value) cptr[0] & 0177) << 8) | ((t_value) cptr[1] & 0177);
return SCPE_OK;
}
@@ -569,7 +592,8 @@ if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* char string? */
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
if (opcode[i] == NULL)
return SCPE_ARG;
val[0] = opc_val[i] & DMASK; /* get value */
j = (opc_val[i] >> F_V_FL) & F_M_FL; /* get class */
@@ -577,10 +601,12 @@ switch (j) { /* case on class */
case F_V_FO: /* func out */
tptr = strchr (cptr, ','); /* find dst */
if (!tptr) return SCPE_ARG; /* none? */
if (!tptr) /* none? */
return SCPE_ARG;
*tptr = 0; /* split fields */
cptr = get_fnc (cptr, val); /* fo # */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_sd (tptr + 1, val, 0, FALSE); /* dst */
break;
@@ -590,7 +616,8 @@ switch (j) { /* case on class */
case F_V_SF: /* skip func */
cptr = get_sd (cptr, val, ',', TRUE); /* src */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
case F_V_SFI: /* skip func impl */
cptr = get_fnc (cptr, val); /* fo # */
@@ -598,33 +625,40 @@ switch (j) { /* case on class */
case F_V_RR: /* reg-reg */
cptr = get_sd (cptr, val, ',', TRUE); /* src */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_op (cptr, val, ','); /* op */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
break;
case F_V_ZR: /* zero-reg */
cptr = get_op (cptr, val, ','); /* op */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
break;
case F_V_RS: /* reg self */
cptr = get_sd (cptr, val, ',', TRUE); /* src */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
val[0] = val[0] | I_GETSRC (val[0]); /* duplicate */
cptr = get_op (cptr, val, 0); /* op */
break;
case F_V_JC: /* jump cond */
cptr = get_sd (cptr, val, ',', TRUE); /* src */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_glyph (cptr, gbuf, ','); /* cond */
for (k = 0; k < 8; k++) { /* symbol? */
if (strcmp (gbuf, cdname[k]) == 0) break;
if (strcmp (gbuf, cdname[k]) == 0)
break;
}
if (k >= 8) return SCPE_ARG;
if (k >= 8)
return SCPE_ARG;
val[0] = val[0] | (k << (I_V_OP + 1)); /* or to inst */
case F_V_JU: /* jump uncond */
@@ -633,28 +667,34 @@ switch (j) { /* case on class */
case F_V_RM: /* reg mem */
cptr = get_sd (cptr, val, ',', TRUE); /* src */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
case F_V_ZM: /* zero mem */
cptr = get_op (cptr, val, ','); /* op */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_ma (cptr, val, 0); /* addr */
break;
case F_V_MR: /* mem reg */
cptr = get_ma (cptr, val, ','); /* addr */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_op (cptr, val, ','); /* op */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_sd (cptr, val, 0, FALSE); /* dst */
break;
case F_V_MS: /* mem self */
cptr = get_ma (cptr, val, ','); /* addr */
if (!cptr) return SCPE_ARG;
if (!cptr)
return SCPE_ARG;
cptr = get_op (cptr, val, 0); /* op */
break;
} /* end case */
if (!cptr || (*cptr != 0)) return SCPE_ARG; /* junk at end? */
if (!cptr || (*cptr != 0)) /* junk at end? */
return SCPE_ARG;
return (j >= F_2WD)? -1: SCPE_OK;
}