github.com/open-simh.simh
1
0
Fork 0
mirror of https://github.com/open-simh/simh.git synced 2026-04-28 12:57:40 +00:00
Code Issues Projects Releases Wiki Activity

Notes For V3.8

Browse Source 
The makefile now works for Linux and most Unix's. Howevr, for Solaris
and MacOS, you must first export the OSTYPE environment variable:

> export OSTYPE
> make

Otherwise, you will get build errors.

1. New Features

1.1 3.8-0

1.1.1 SCP and Libraries

- BREAK, NOBREAK, and SHOW BREAK with no argument will set, clear, and
  show (respectively) a breakpoint at the current PC.

1.1.2 GRI

- Added support for the GRI-99 processor.

1.1.3 HP2100

- Added support for the BACI terminal interface.
- Added support for RTE OS/VMA/EMA, SIGNAL, VIS firmware extensions.

1.1.4 Nova

- Added support for 64KW memory (implemented in third-party CPU's).

1.1.5 PDP-11

- Added support for DC11, RC11, KE11A, KG11A.
- Added modem control support for DL11.
- Added ASCII character support for all 8b devices.

1.2 3.8-1

1.2.1 SCP and libraries

- Added capability to set line connection order for terminal multiplexers.

1.2.2 HP2100

- Added support for 12620A/12936A privileged interrupt fence.
- Added support for 12792C eight-channel asynchronous multiplexer.

2. Bugs Fixed

Please see the revision history on http://simh.trailing-edge.com or
in the source module sim_rev.h.
This commit is contained in:
Bob Supnik
2009-02-08 09:06:00 -08:00
committed by Mark Pizzolato
parent 59aa4a73b1
commit 9c4779c061
286 changed files with 40587 additions and 19094 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
NOVA/nova_clk.c
View File

@@ -167,8 +167,10 @@ return SCPE_OK;
t_stat clk_set_freq (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (cptr) return SCPE_ARG;
if ((val != 50) && (val != 60)) return SCPE_IERR;
if (cptr)
return SCPE_ARG;
if ((val != 50) && (val != 60))
return SCPE_IERR;
clk_tps[0] = val;
return SCPE_OK;
}

162
NOVA/nova_cpu.c
View File

@@ -240,7 +240,8 @@
#define INCA(x) (((x) + 1) & AMASK)
#define DECA(x) (((x) - 1) & AMASK)
#define SEXT(x) (((x) & SIGN)? ((x) | ~DMASK): (x))
#define STK_CHECK(x,y) if (((x) & 0377) < (y)) int_req = int_req | INT_STK
#define STK_CHECK(x,y) if (((x) & 0377) < (y)) \
int_req = int_req | INT_STK
#define IND_STEP(x) M[x] & A_IND; /* return next level indicator */ \
if ( ((x) <= AUTO_TOP) && ((x) >= AUTO_INC) ) \
if ( (x) < AUTO_DEC ) \
@@ -422,7 +423,8 @@ t_stat reason;
/* Restore register state */
if (build_devtab () != SCPE_OK) return SCPE_IERR; /* build dispatch */
if (build_devtab () != SCPE_OK) /* build dispatch */
return SCPE_IERR;
PC = saved_PC & AMASK; /* load local PC */
C = C & CBIT;
mask_out (pimask); /* reset int system */
@@ -433,7 +435,8 @@ reason = 0;
while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */
if ( (reason = sim_process_event ()) ) break;
if ( (reason = sim_process_event ()) )
break;
}
if (int_req > INT_PENDING) { /* interrupt or exception? */
@@ -561,22 +564,28 @@ while (reason == 0) { /* loop until halted */
INCREMENT_PC ;
break;
case 2: /* SZC */
if (src < CBIT) INCREMENT_PC ;
if (src < CBIT)
INCREMENT_PC ;
break;
case 3: /* SNC */
if (src >= CBIT) INCREMENT_PC ;
if (src >= CBIT)
INCREMENT_PC ;
break;
case 4: /* SZR */
if ((src & DMASK) == 0) INCREMENT_PC ;
if ((src & DMASK) == 0)
INCREMENT_PC ;
break;
case 5: /* SNR */
if ((src & DMASK) != 0) INCREMENT_PC ;
if ((src & DMASK) != 0)
INCREMENT_PC ;
break;
case 6: /* SEZ */
if (src <= CBIT) INCREMENT_PC ;
if (src <= CBIT)
INCREMENT_PC ;
break;
case 7: /* SBN */
if (src > CBIT) INCREMENT_PC ;
if (src > CBIT)
INCREMENT_PC ;
break;
} /* end switch skip */
if ((IR & I_NLD) == 0) { /* load? */
@@ -595,15 +604,18 @@ while (reason == 0) { /* loop until halted */
case 0: /* page zero */
break;
case 1: /* PC relative */
if (MA & DISPSIGN) MA = 0177400 | MA;
if (MA & DISPSIGN)
MA = 0177400 | MA;
MA = (MA + PC - 1) & AMASK;
break;
case 2: /* AC2 relative */
if (MA & DISPSIGN) MA = 0177400 | MA;
if (MA & DISPSIGN)
MA = 0177400 | MA;
MA = (MA + AC[2]) & AMASK;
break;
case 3: /* AC3 relative */
if (MA & DISPSIGN) MA = 0177400 | MA;
if (MA & DISPSIGN)
MA = 0177400 | MA;
MA = (MA + AC[3]) & AMASK;
break;
} /* end switch mode */
@@ -633,13 +645,17 @@ while (reason == 0) { /* loop until halted */
break;
case 002: /* ISZ */
src = (M[MA] + 1) & DMASK;
if (MEM_ADDR_OK(MA)) M[MA] = src;
if (src == 0) INCREMENT_PC ;
if (MEM_ADDR_OK(MA))
M[MA] = src;
if (src == 0)
INCREMENT_PC ;
break;
case 003: /* DSZ */
src = (M[MA] - 1) & DMASK;
if (MEM_ADDR_OK(MA)) M[MA] = src;
if (src == 0) INCREMENT_PC ;
if (MEM_ADDR_OK(MA))
M[MA] = src;
if (src == 0)
INCREMENT_PC ;
break;
case 004: /* LDA 0 */
AC[0] = M[MA];
@@ -654,16 +670,20 @@ while (reason == 0) { /* loop until halted */
AC[3] = M[MA];
break;
case 010: /* STA 0 */
if (MEM_ADDR_OK(MA)) M[MA] = AC[0];
if (MEM_ADDR_OK(MA))
M[MA] = AC[0];
break;
case 011: /* STA 1 */
if (MEM_ADDR_OK(MA)) M[MA] = AC[1];
if (MEM_ADDR_OK(MA))
M[MA] = AC[1];
break;
case 012: /* STA 2 */
if (MEM_ADDR_OK(MA)) M[MA] = AC[2];
if (MEM_ADDR_OK(MA))
M[MA] = AC[2];
break;
case 013: /* STA 3 */
if (MEM_ADDR_OK(MA)) M[MA] = AC[3];
if (MEM_ADDR_OK(MA))
M[MA] = AC[3];
break;
} /* end switch */
} /* end mem ref */
@@ -713,8 +733,10 @@ while (reason == 0) { /* loop until halted */
case ioNIO: /* frame ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) FP = AC[dstAC] & AMASK ;
if (pulse == iopC) AC[dstAC] = FP & AMASK ;
if (pulse == iopN)
FP = AC[dstAC] & AMASK ;
if (pulse == iopC)
AC[dstAC] = FP & AMASK ;
}
break;
@@ -726,15 +748,20 @@ while (reason == 0) { /* loop until halted */
else if (cpu_unit.flags & UNIT_STK) /* if Nova 3 this is really a SAV... 2007-Jun-01, BKR */
{
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
if (MEM_ADDR_OK (SP))
M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
if (MEM_ADDR_OK (SP))
M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
if (MEM_ADDR_OK (SP))
M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
if (MEM_ADDR_OK (SP))
M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) | (AC[3] & AMASK);
if (MEM_ADDR_OK (SP))
M[SP] = (C >> 1) | (AC[3] & AMASK);
AC[3] = FP = SP & AMASK;
STK_CHECK (SP, 5);
}
@@ -746,8 +773,10 @@ while (reason == 0) { /* loop until halted */
case ioDOA: /* stack ptr */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) SP = AC[dstAC] & AMASK;
if (pulse == iopC) AC[dstAC] = SP & AMASK;
if (pulse == iopN)
SP = AC[dstAC] & AMASK;
if (pulse == iopC)
AC[dstAC] = SP & AMASK;
}
break;
@@ -755,13 +784,15 @@ while (reason == 0) { /* loop until halted */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* push (PSHA) */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
if (MEM_ADDR_OK (SP))
M[SP] = AC[dstAC];
STK_CHECK (SP, 1);
}
if ((pulse == iopS) && /* Nova 4 pshn (PSHN) */
(cpu_unit.flags & UNIT_BYT)) {
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
if (MEM_ADDR_OK (SP))
M[SP] = AC[dstAC];
if ( (SP & 0xFFFF) > (M[042] & 0xFFFF) )
{
int_req = int_req | INT_STK ;
@@ -787,15 +818,20 @@ while (reason == 0) { /* loop until halted */
else if (cpu_unit.flags & UNIT_STK) /* if Nova 3 this is really a SAV... 2007-Jun-01, BKR */
{
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
if (MEM_ADDR_OK (SP))
M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
if (MEM_ADDR_OK (SP))
M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
if (MEM_ADDR_OK (SP))
M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
if (MEM_ADDR_OK (SP))
M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) | (AC[3] & AMASK);
if (MEM_ADDR_OK (SP))
M[SP] = (C >> 1) | (AC[3] & AMASK);
AC[3] = FP = SP & AMASK;
STK_CHECK (SP, 5);
}
@@ -805,15 +841,20 @@ while (reason == 0) { /* loop until halted */
if (cpu_unit.flags & UNIT_STK) {
if (pulse == iopN) { /* save */
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
if (MEM_ADDR_OK (SP))
M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
if (MEM_ADDR_OK (SP))
M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
if (MEM_ADDR_OK (SP))
M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
if (MEM_ADDR_OK (SP))
M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) | (AC[3] & AMASK);
if (MEM_ADDR_OK (SP))
M[SP] = (C >> 1) | (AC[3] & AMASK);
AC[3] = FP = SP & AMASK;
STK_CHECK (SP, 5);
}
@@ -838,15 +879,20 @@ while (reason == 0) { /* loop until halted */
int32 frameSz = M[PC] ;
PC = INCA (PC) ;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[0];
if (MEM_ADDR_OK (SP))
M[SP] = AC[0];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[1];
if (MEM_ADDR_OK (SP))
M[SP] = AC[1];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[2];
if (MEM_ADDR_OK (SP))
M[SP] = AC[2];
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = FP;
if (MEM_ADDR_OK (SP))
M[SP] = FP;
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = (C >> 1) | (AC[3] & AMASK);
if (MEM_ADDR_OK (SP))
M[SP] = (C >> 1) | (AC[3] & AMASK);
AC[3] = FP = SP & AMASK ;
SP = (SP + frameSz) & AMASK ;
if (SP > M[042])
@@ -922,7 +968,8 @@ while (reason == 0) { /* loop until halted */
else if ((dstAC == 3) && (cpu_unit.flags & UNIT_STK)) /* if Nova 3 this is really a PSHA... 2007-Jun-01, BKR */
{
SP = INCA (SP);
if (MEM_ADDR_OK (SP)) M[SP] = AC[dstAC];
if (MEM_ADDR_OK (SP))
M[SP] = AC[dstAC];
STK_CHECK (SP, 1);
}
break;
@@ -990,7 +1037,8 @@ while (reason == 0) { /* loop until halted */
else if (dev_table[device].routine) { /* normal device */
iodata = dev_table[device].routine (pulse, code, AC[dstAC]);
reason = iodata >> IOT_V_REASON;
if (code & 1) AC[dstAC] = iodata & 0177777;
if (code & 1)
AC[dstAC] = iodata & 0177777;
}
/* bkr, 2007-May-30
@@ -1055,7 +1103,8 @@ dev_disable = 0;
pwr_low = 0;
AMASK = 077777 ; /* 32KW mode */
pcq_r = find_reg ("PCQ", NULL, dptr);
if (pcq_r) pcq_r->qptr = 0;
if (pcq_r)
pcq_r->qptr = 0;
else return SCPE_IERR;
sim_brk_types = sim_brk_dflt = SWMASK ('E');
return SCPE_OK;
@@ -1065,8 +1114,10 @@ return SCPE_OK;
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw)
{
if (addr >= MEMSIZE) return SCPE_NXM;
if (vptr != NULL) *vptr = M[addr] & DMASK;
if (addr >= MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
*vptr = M[addr] & DMASK;
return SCPE_OK;
}
@@ -1074,7 +1125,8 @@ return SCPE_OK;
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw)
{
if (addr >= MEMSIZE) return SCPE_NXM;
if (addr >= MEMSIZE)
return SCPE_NXM;
M[addr] = val & DMASK;
return SCPE_OK;
}
@@ -1088,11 +1140,13 @@ t_addr i;
if ((val <= 0) || (val > MAXMEMSIZE) || ((val & 07777) != 0))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i++) mc = mc | M[i];
for (i = val; i < MEMSIZE; i++)
mc = mc | M[i];
if ((mc != 0) && (!get_yn ("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
MEMSIZE = val;
for (i = MEMSIZE; i < MAXMEMSIZE; i++) M[i] = 0;
for (i = MEMSIZE; i < MAXMEMSIZE; i++)
M[i] = 0;
return SCPE_OK;
}

34
NOVA/nova_dkp.c
View File

@@ -571,7 +571,7 @@ switch (code) { /* decode IR<5:7> */
if ((dev_busy & INT_DKP) == 0) /* if device is not busy */
dkp_ussc = AC ; /* save unit, sect */
if (((dtype == TYPE_6099) || /* (BKR: don't forget 6097) */
(dtype == TYPE_6097) || /* for 6099 and 6103 */
(dtype == TYPE_6097) || /* for 6099 and 6103 */
(dtype == TYPE_6103)) && /* if data<0> set, */
(AC & 010000) )
dkp_diagmode = 1; /* set diagnostic mode */
@@ -597,9 +597,12 @@ switch (pulse) { /* decode IR<8:9> */
DEV_UPDATE_INTR ; /* update ints */
if (dkp_diagmode) { /* in diagnostic mode? */
dkp_diagmode = 0; /* reset it */
if (dtype == TYPE_6097) dkp_ussc = 010001; /* (BKR - quad floppy) */
if (dtype == TYPE_6099) dkp_ussc = 010002; /* return size bits */
if (dtype == TYPE_6103) dkp_ussc = 010003; /* for certain types */
if (dtype == TYPE_6097) /* (BKR - quad floppy) */
dkp_ussc = 010001;
if (dtype == TYPE_6099) /* return size bits */
dkp_ussc = 010002;
if (dtype == TYPE_6103) /* for certain types */
dkp_ussc = 010003;
}
else { /* normal mode ... */
if (dkp_go (pulse)) /* do command */
@@ -638,7 +641,7 @@ switch (pulse) { /* decode IR<8:9> */
* start of this procedure and before our 'P' handler. BKR
*/
if (dkp_go(pulse))
break; /* no error - do not set done and status */
break; /* no error - do not set done and status */
}
DEV_SET_DONE( INT_DKP ) ; /* set done */
@@ -905,10 +908,12 @@ do {
if (uptr->FUNC == FCCY_READ) { /* read? */
awc = fxread (tbuf, sizeof(uint16), DKP_NUMWD, uptr->fileref);
for ( ; awc < DKP_NUMWD; awc++) tbuf[awc] = 0;
if (err = ferror (uptr->fileref)) break;
if (err = ferror (uptr->fileref))
break;
for (dx = 0; dx < DKP_NUMWD; dx++) { /* loop thru buffer */
pa = MapAddr (dkp_map, (dkp_ma & AMASK));
if (MEM_ADDR_OK (pa)) M[pa] = tbuf[dx];
if (MEM_ADDR_OK (pa))
M[pa] = tbuf[dx];
dkp_ma = (dkp_ma + 1) & AMASK;
}
}
@@ -919,7 +924,8 @@ do {
dkp_ma = (dkp_ma + 1) & AMASK;
}
fxwrite (tbuf, sizeof(int16), DKP_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) break;
if (err = ferror (uptr->fileref))
break;
}
if (err != 0) {
@@ -989,8 +995,10 @@ t_stat r;
uptr->capac = drv_tab[GET_DTYPE (uptr->flags)].size; /* restore capac */
r = attach_unit (uptr, cptr); /* attach */
if ((r != SCPE_OK) || !(uptr->flags & UNIT_AUTO)) return r;
if ((p = sim_fsize (uptr->fileref)) == 0) return SCPE_OK; /* get file size */
if ((r != SCPE_OK) || !(uptr->flags & UNIT_AUTO))
return r;
if ((p = sim_fsize (uptr->fileref)) == 0) /* get file size */
return SCPE_OK;
for (i = 0; drv_tab[i].sect != 0; i++) {
if (p <= (drv_tab[i].size * (int32) sizeof (uint16))) {
uptr->flags = (uptr->flags & ~UNIT_DTYPE) | (i << UNIT_V_DTYPE);
@@ -1005,7 +1013,8 @@ return SCPE_OK;
t_stat dkp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
if (uptr->flags & UNIT_ATT)
return SCPE_ALATT;
uptr->capac = drv_tab[GET_DTYPE (val)].size;
return SCPE_OK;
}
@@ -1077,7 +1086,8 @@ t_stat dkp_boot (int32 unitno, DEVICE *dptr)
{
int32 i;
for (i = 0; i < BOOT_LEN; i++) M[BOOT_START + i] = (uint16) boot_rom[i];
for (i = 0; i < BOOT_LEN; i++)
M[BOOT_START + i] = (uint16) boot_rom[i];
saved_PC = BOOT_START;
SR = 0100000 + DEV_DKP;
return SCPE_OK;

15
NOVA/nova_dsk.c
View File

@@ -222,7 +222,8 @@ if (pulse & 1) { /* read or write? */
DEV_SET_BUSY( INT_DSK ) ;
DEV_UPDATE_INTR ;
t = sector_map[dsk_da & DSK_MMASK] - GET_SECTOR (dsk_time);
if (t < 0) t = t + DSK_NUMSC;
if (t < 0)
t = t + DSK_NUMSC;
sim_activate (&dsk_unit, t * dsk_time); /* activate */
}
return rval;
@@ -249,7 +250,8 @@ da = dsk_da * DSK_NUMWD; /* calc disk addr */
if (uptr->FUNC == iopS) { /* read? */
for (i = 0; i < DSK_NUMWD; i++) { /* copy sector */
pa = MapAddr (0, (dsk_ma + i) & AMASK); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] = fbuf[da + i];
if (MEM_ADDR_OK (pa))
M[pa] = fbuf[da + i];
}
dsk_ma = (dsk_ma + DSK_NUMWD) & AMASK;
}
@@ -313,7 +315,8 @@ uint32 ds_bytes = DSK_DKSIZE * sizeof (int16);
if ((uptr->flags & UNIT_AUTO) && (sz = sim_fsize_name (cptr))) {
p = (sz + ds_bytes - 1) / ds_bytes;
if (p >= DSK_NUMDK) p = DSK_NUMDK - 1;
if (p >= DSK_NUMDK)
p = DSK_NUMDK - 1;
uptr->flags = (uptr->flags & ~UNIT_PLAT) | (p << UNIT_V_PLAT);
}
uptr->capac = UNIT_GETP (uptr->flags) * DSK_DKSIZE; /* set capacity */
@@ -325,8 +328,10 @@ return attach_unit (uptr, cptr);
t_stat dsk_set_size (UNIT *uptr, int32 val, char *cptr, void *desc)
{
if (val < 0) return SCPE_IERR;
if (uptr->flags & UNIT_ATT) return SCPE_ALATT;
if (val < 0)
return SCPE_IERR;
if (uptr->flags & UNIT_ATT)
return SCPE_ALATT;
uptr->capac = UNIT_GETP (val) * DSK_DKSIZE;
uptr->flags = uptr->flags & ~UNIT_AUTO;
return SCPE_OK;

57
NOVA/nova_mta.c
View File

@@ -282,7 +282,8 @@ switch (pulse) { /* decode IR<8:9> */
case iopS: /* start */
c = GET_CMD (mta_cu); /* get command */
if (dev_busy & INT_MTA) break; /* ignore if busy */
if (dev_busy & INT_MTA) /* ignore if busy */
break;
if ((uptr->USTAT & STA_RDY) == 0) { /* drive not ready? */
mta_sta = mta_sta | STA_ILL; /* illegal op */
dev_busy = dev_busy & ~INT_MTA; /* clear busy */
@@ -293,14 +294,16 @@ switch (pulse) { /* decode IR<8:9> */
mta_upddsta (uptr, (uptr->USTAT & /* update status */
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY)) | STA_REW);
sim_activate (uptr, mta_rwait); /* start IO */
if (c == CU_UNLOAD) detach_unit (uptr);
if (c == CU_UNLOAD)
detach_unit (uptr);
}
else {
mta_sta = 0; /* clear errors */
dev_busy = dev_busy | INT_MTA; /* set busy */
dev_done = dev_done & ~INT_MTA; /* clear done */
int_req = int_req & ~INT_MTA; /* clear int */
if (ctype[c]) sim_activate (uptr, mta_cwait);
if (ctype[c])
sim_activate (uptr, mta_cwait);
else {
mta_upddsta (uptr, uptr->USTAT &
~(STA_BOT | STA_EOF | STA_EOT | STA_RDY));
@@ -349,7 +352,8 @@ wc = WC_SIZE - (mta_wc & WC_MASK); /* io wc */
if (uptr->USTAT & STA_REW) { /* rewind? */
sim_tape_rewind (uptr); /* update tape */
mta_upddsta (uptr, (uptr->USTAT & ~STA_REW) | STA_BOT | STA_RDY);
if (u == GET_UNIT (mta_cu)) mta_updcsta (uptr);
if (u == GET_UNIT (mta_cu))
mta_updcsta (uptr);
return SCPE_OK;
}
@@ -364,7 +368,8 @@ else switch (c) { /* case on command */
break;
case CU_DMODE: /* drive mode */
if (!sim_tape_bot (uptr)) mta_sta = mta_sta | STA_ILL; /* must be BOT */
if (!sim_tape_bot (uptr)) /* must be BOT */
mta_sta = mta_sta | STA_ILL;
else mta_upddsta (uptr, (mta_cu & CU_PE)? /* update drv status */
uptr->USTAT | STA_PEM: uptr->USTAT & ~ STA_PEM);
break;
@@ -372,14 +377,17 @@ else switch (c) { /* case on command */
case CU_READ: /* read */
case CU_READNS: /* read non-stop */
st = sim_tape_rdrecf (uptr, mtxb, &tbc, MTA_MAXFR); /* read rec */
if (st == MTSE_RECE) mta_sta = mta_sta | STA_DAE; /* rec in err? */
if (st == MTSE_RECE) /* rec in err? */
mta_sta = mta_sta | STA_DAE;
else if (st != MTSE_OK) { /* other error? */
r = mta_map_err (uptr, st); /* map error */
break;
}
cbc = wc * 2; /* expected bc */
if (tbc & 1) mta_sta = mta_sta | STA_ODD; /* odd byte count? */
if (tbc > cbc) mta_sta = mta_sta | STA_WCO; /* too big? */
if (tbc & 1) /* odd byte count? */
mta_sta = mta_sta | STA_ODD;
if (tbc > cbc) /* too big? */
mta_sta = mta_sta | STA_WCO;
else {
cbc = tbc; /* no, use it */
wc = (cbc + 1) / 2; /* adjust wc */
@@ -388,7 +396,8 @@ else switch (c) { /* case on command */
c1 = mtxb[p++];
c2 = mtxb[p++];
pa = MapAddr (0, mta_ma); /* map address */
if (MEM_ADDR_OK (pa)) M[pa] = (c1 << 8) | c2;
if (MEM_ADDR_OK (pa))
M[pa] = (c1 << 8) | c2;
mta_ma = (mta_ma + 1) & AMASK;
}
mta_wc = (mta_wc + wc) & DMASK;
@@ -466,8 +475,10 @@ int32 mta_updcsta (UNIT *uptr) /* update ctrl */
{
mta_sta = (mta_sta & ~(STA_DYN | STA_CLR | STA_ERR1 | STA_ERR2)) |
(uptr->USTAT & STA_DYN) | STA_SET;
if (mta_sta & STA_EFLGS1) mta_sta = mta_sta | STA_ERR1;
if (mta_sta & STA_EFLGS2) mta_sta = mta_sta | STA_ERR2;
if (mta_sta & STA_EFLGS1)
mta_sta = mta_sta | STA_ERR1;
if (mta_sta & STA_EFLGS2)
mta_sta = mta_sta | STA_ERR2;
return mta_sta;
}
@@ -477,7 +488,8 @@ void mta_upddsta (UNIT *uptr, int32 newsta) /* drive status */
{
int32 change;
if ((uptr->flags & UNIT_ATT) == 0) newsta = 0; /* offline? */
if ((uptr->flags & UNIT_ATT) == 0) /* offline? */
newsta = 0;
change = (uptr->USTAT ^ newsta) & STA_MON; /* changes? */
uptr->USTAT = newsta & STA_DYN; /* update status */
if (change) {
@@ -571,8 +583,10 @@ for (u = 0; u < MTA_NUMDR; u++) { /* loop thru units */
else uptr->USTAT = 0;
}
mta_updcsta (&mta_unit[0]); /* update status */
if (mtxb == NULL) mtxb = (uint8 *) calloc (MTA_MAXFR, sizeof (uint8));
if (mtxb == NULL) return SCPE_MEM;
if (mtxb == NULL)
mtxb = (uint8 *) calloc (MTA_MAXFR, sizeof (uint8));
if (mtxb == NULL)
return SCPE_MEM;
return SCPE_OK;
}
@@ -583,9 +597,11 @@ t_stat mta_attach (UNIT *uptr, char *cptr)
t_stat r;
r = sim_tape_attach (uptr, cptr);
if (r != SCPE_OK) return r;
if (!sim_is_active (uptr)) mta_upddsta (uptr, STA_RDY | STA_BOT | STA_PEM |
(sim_tape_wrp (uptr)? STA_WLK: 0));
if (r != SCPE_OK)
return r;
if (!sim_is_active (uptr))
mta_upddsta (uptr, STA_RDY | STA_BOT | STA_PEM |
(sim_tape_wrp (uptr)? STA_WLK: 0));
return r;
}
@@ -593,8 +609,10 @@ return r;
t_stat mta_detach (UNIT* uptr)
{
if (!(uptr->flags & UNIT_ATT)) return SCPE_OK; /* attached? */
if (!sim_is_active (uptr)) mta_upddsta (uptr, 0);
if (!(uptr->flags & UNIT_ATT)) /* attached? */
return SCPE_OK;
if (!sim_is_active (uptr))
mta_upddsta (uptr, 0);
return sim_tape_detach (uptr);
}
@@ -608,7 +626,6 @@ else mta_upddsta (uptr, uptr->USTAT & ~STA_WLK);
return SCPE_OK;
}
/* Boot routine */
t_stat mta_boot (int32 unitno, DEVICE *dptr)

3
NOVA/nova_pt.c
View File

@@ -192,7 +192,8 @@ if ((ptr_unit.flags & UNIT_ATT) == 0) /* attached? */
return IORETURN (ptr_stopioe, SCPE_UNATT);
if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
if (feof (ptr_unit.fileref)) {
if (ptr_stopioe) printf ("PTR end of file\n");
if (ptr_stopioe)
printf ("PTR end of file\n");
else return SCPE_OK;
}
else perror ("PTR I/O error");

61
NOVA/nova_qty.c
View File

@@ -109,8 +109,6 @@ extern int32 sim_switches ;
extern FILE * sim_log ;
extern int32 tmxr_poll ; /* calibrated delay */
t_stat qty_summary ( FILE * st, UNIT * uptr, int32 val, void * desc ) ;
t_stat qty_show ( FILE * st, UNIT * uptr, int32 val, void * desc ) ;
t_stat qty_setnl ( UNIT * uptr, int32 val, char * cptr, void * desc ) ;
t_stat qty_attach ( UNIT * uptr, char * cptr ) ;
@@ -158,8 +156,6 @@ UNIT qty_unit =
UDATA (&qty_svc, (UNIT_ATTABLE), 0)
} ;
REG qty_nlreg = { DRDATA (NLINES, qty_desc.lines, 7), PV_LEFT };
REG qty_reg[] = /* ('alm_reg' should be similar to this except for device code related items) */
{
{ ORDATA (BUF, qty_unit.buf, 8) },
@@ -179,14 +175,15 @@ MTAB qty_mod[] =
{ UNIT_8B, 0, "7b", "7B", NULL },
{ UNIT_8B, UNIT_8B, "8b", "8B", NULL },
{ MTAB_XTD | MTAB_VDV, 1, NULL, "DISCONNECT",
&tmxr_dscln, NULL, &qty_desc },
{ UNIT_ATT, UNIT_ATT, "connections", NULL, NULL, &qty_summary },
&tmxr_dscln, NULL, (void *)&qty_desc },
{ UNIT_ATT, UNIT_ATT, "connections", NULL,
NULL, &tmxr_show_summ, (void *)&qty_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
NULL, &qty_show, NULL },
NULL, &tmxr_show_cstat, (void *)&qty_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "STATISTICS", NULL,
NULL, &qty_show, NULL },
{ MTAB_XTD | MTAB_VDV | MTAB_VAL, 0, "lines", "LINES",
&qty_setnl, NULL, &qty_nlreg },
NULL, &tmxr_show_cstat, (void *)&qty_desc },
{ MTAB_XTD | MTAB_VDV, 0, "LINES", "LINES",
&qty_setnl, &tmxr_show_lines, (void *) &qty_desc },
{ 0 }
} ;
@@ -750,50 +747,6 @@ int32 qty( int32 pulse, int32 code, int32 AC )
return ( DG_RETURN( ioresult, iodata ) ) ;
} /* end of 'qty' */
/*--------------------------------------------------------------*/
/* qty_summary */
/*--------------------------------------------------------------*/
t_stat qty_summary( FILE * st, UNIT * uptr, int32 val, void * desc )
{
int32 i, t ;
for (i = t = 0 ; i < qty_desc.lines ; ++i )
if ( qty_ldsc[i].conn )
{
++t ;
}
fprintf( st, "%d connection%s", t, ((t)? "s" : "") ) ;
return ( SCPE_OK ) ;
} /* end of 'qty_summ' */
/*--------------------------------------------------------------*/
/* qty_show */
/*--------------------------------------------------------------*/
t_stat qty_show( FILE * st, UNIT * uptr, int32 val, void * desc )
{
int32 i, t ;
for (i = t = 0 ; i < qty_desc.lines ; ++i )
if ( qty_ldsc[i].conn )
{
t = 1;
if ( val )
{
tmxr_fconns( st, &qty_ldsc[i], i ) ;
}
else
{
tmxr_fstats( st, &qty_ldsc[i], i ) ;
}
}
if ( t == 0 ) fprintf( st, "none connected\n" ) ;
return ( SCPE_OK ) ;
} /* end of 'qty_show' */
/*--------------------------------------------------------------*/
/* qty_setnl */
/*--------------------------------------------------------------*/

133
NOVA/nova_sys.c
View File

@@ -288,8 +288,8 @@ for ( pos = 0 ; (! done) && ((i=getc(fileref)) != EOF) ; ++pos )
state = 6;
break;
case 8: /* error (ignore) block */
if (i == 0377)
state = 0; /* (wait for 'RUBOUT' char) */
if (i == 0377) /* (wait for 'RUBOUT' char) */
state = 0;
break;
} /* end switch */
} /* end while */
@@ -645,10 +645,12 @@ t_stat fprint_addr (FILE *of, t_addr addr, int32 ind, int32 mode,
{
int32 dsign, dmax;
if (ext) dmax = AMASK + 1; /* get max disp */
if (ext) /* get max disp */
dmax = AMASK + 1;
else dmax = I_M_DISP + 1;
dsign = dmax >> 1; /* get disp sign */
if (ind) fprintf (of, "@"); /* indirect? */
if (ind) /* indirect? */
fprintf (of, "@");
switch (mode & 03) { /* mode */
case 0: /* absolute */
@@ -657,22 +659,26 @@ switch (mode & 03) { /* mode */
case 1: /* PC rel */
if (disp & dsign) {
if (cflag) fprintf (of, "%-o", (addr - (dmax - disp)) & AMASK);
if (cflag)
fprintf (of, "%-o", (addr - (dmax - disp)) & AMASK);
else fprintf (of, ".-%-o", dmax - disp);
}
else {
if (cflag) fprintf (of, "%-o", (addr + disp) & AMASK);
if (cflag)
fprintf (of, "%-o", (addr + disp) & AMASK);
else fprintf (of, ".+%-o", disp);
}
break;
case 2: /* AC2 rel */
if (disp & dsign) fprintf (of, "-%-o,2", dmax - disp);
if (disp & dsign)
fprintf (of, "-%-o,2", dmax - disp);
else fprintf (of, "%-o,2", disp);
break;
case 3: /* AC3 rel */
if (disp & dsign) fprintf (of, "-%-o,3", dmax - disp);
if (disp & dsign)
fprintf (of, "-%-o,3", dmax - disp);
else fprintf (of, "%-o,3", disp);
break;
} /* end switch */
@@ -711,7 +717,8 @@ if (sw & SWMASK ('C')) { /* character? */
fprintf (of, (c2 < 040)? "<%03o>": "%c", c2);
return SCPE_OK;
}
if (!(sw & SWMASK ('M'))) return SCPE_ARG; /* mnemonic? */
if (!(sw & SWMASK ('M'))) /* mnemonic? */
return SCPE_ARG;
/* Instruction decode */
@@ -774,7 +781,8 @@ for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
case I_V_RR: /* operate */
fprintf (of, "%s %-o,%-o", opcode[i], src, dst);
if (skp) fprintf (of, ",%s", skip[skp-1]);
if (skp)
fprintf (of, ",%s", skip[skp-1]);
break;
case I_V_BY: /* byte */
@@ -857,7 +865,8 @@ int32 d, r, x, pflag;
char gbuf[CBUFSIZE];
int32 dmax, dsign;
if (ext) dmax = AMASK + 1; /* get max disp */
if (ext) /* get max disp */
dmax = AMASK + 1;
else dmax = I_M_DISP + 1;
dsign = dmax >> 1; /* get disp sign */
val[0] = 0; /* no indirect */
@@ -885,25 +894,29 @@ else if (*cptr == '-') { /* - sign? */
if (*cptr != 0) { /* number? */
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
d = (int32) get_uint (gbuf, 8, AMASK, &r);
if (r != SCPE_OK) return NULL;
if (r != SCPE_OK)
return NULL;
pflag = pflag | A_NUM;
}
if (*cptr != 0) { /* index? */
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
x = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if ((r != SCPE_OK) || (x < 2)) return NULL;
if ((r != SCPE_OK) || (x < 2))
return NULL;
pflag = pflag | A_NX;
}
switch (pflag) { /* case on flags */
case A_NUM: case A_NUM+A_SI: /* ~CPU, (+)num */
if (d < dmax) val[2] = d;
if (d < dmax)
val[2] = d;
else return NULL;
break;
case A_NUM+A_FL: case A_NUM+A_SI+A_FL: /* CPU, (+)num */
if (d < dmax) val[2] = d;
if (d < dmax)
val[2] = d;
else if (((d >= (((int32) addr - dsign) & AMASK)) &&
(d < (((int32) addr + dsign) & AMASK))) ||
(d >= ((int32) addr + (-dsign & AMASK)))) {
@@ -922,8 +935,10 @@ switch (pflag) { /* case on flags */
case A_NX+A_SI+A_MI+A_NUM: /* -num, ndx */
case A_NX+A_SI+A_MI+A_NUM+A_FL:
val[1] = x; /* set mode */
if (((pflag & A_MI) == 0) && (d < dsign)) val[2] = d;
else if ((pflag & A_MI) && (d <= dsign)) val[2] = (dmax - d);
if (((pflag & A_MI) == 0) && (d < dsign))
val[2] = d;
else if ((pflag & A_MI) && (d <= dsign))
val[2] = (dmax - d);
else return NULL;
break;
@@ -952,10 +967,12 @@ t_stat r;
cptr = get_glyph (cptr, gbuf, ','); /* get register */
val[0] = (int32) get_uint (gbuf, 8, I_M_SRC, &r);
if (r != SCPE_OK) return NULL;
if (r != SCPE_OK)
return NULL;
cptr = get_glyph (cptr, gbuf, term); /* get register */
val[1] = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return NULL;
if (r != SCPE_OK)
return NULL;
return cptr;
}
@@ -980,12 +997,14 @@ char gbuf[CBUFSIZE];
cflag = (uptr == NULL) || (uptr == &cpu_unit);
while (isspace (*cptr)) cptr++; /* absorb spaces */
if ((sw & SWMASK ('A')) || ((*cptr == '\'') && cptr++)) { /* ASCII char? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = (t_value) cptr[0];
return SCPE_OK;
}
if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII string? */
if (cptr[0] == 0) return SCPE_ARG; /* must have 1 char */
if (cptr[0] == 0) /* must have 1 char */
return SCPE_ARG;
val[0] = ((t_value) cptr[0] << 8) + (t_value) cptr[1];
return SCPE_OK;
}
@@ -995,7 +1014,8 @@ if ((sw & SWMASK ('C')) || ((*cptr == '"') && cptr++)) { /* ASCII string? */
rtn = SCPE_OK; /* assume 1 word */
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
for (i = 0; (opcode[i] != NULL) && (strcmp (opcode[i], gbuf) != 0) ; i++) ;
if (opcode[i] == NULL) return SCPE_ARG;
if (opcode[i] == NULL)
return SCPE_ARG;
val[0] = opc_val[i] & 0177777; /* get value */
j = (opc_val[i] >> I_V_FL) & I_M_FL; /* get class */
@@ -1007,23 +1027,27 @@ switch (j) { /* case on class */
case I_V_R: /* IOT reg */
cptr = get_glyph (cptr, gbuf, 0); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
break;
case I_V_RD: /* IOT reg,dev */
cptr = get_glyph (cptr, gbuf, ','); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
case I_V_D: /* IOT dev */
cptr = get_glyph (cptr, gbuf, 0); /* get device */
for (i = 0; (device[i] != NULL) &&
(strcmp (device[i], gbuf) != 0); i++);
if (device[i] != NULL) val[0] = val[0] | dev_val[i];
if (device[i] != NULL)
val[0] = val[0] | dev_val[i];
else {
d = (int32) get_uint (gbuf, 8, I_M_DEV, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DEV);
}
break;
@@ -1031,57 +1055,67 @@ switch (j) { /* case on class */
case I_V_RM: /* reg, addr */
cptr = get_glyph (cptr, gbuf, ','); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
case I_V_M: /* addr */
cptr = get_addr (cptr, addr, FALSE, cflag, amd);
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_IND) | (amd[1] << I_V_MODE) | amd[2];
break;
case I_V_RR: /* operate */
cptr = get_2reg (cptr, ',', amd); /* get 2 reg */
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
if (*cptr != 0) { /* skip? */
cptr = get_glyph (cptr, gbuf, 0); /* get skip */
for (i = 0; (skip[i] != NULL) &&
(strcmp (skip[i], gbuf) != 0); i++) ;
if (skip[i] == NULL) return SCPE_ARG;
if (skip[i] == NULL)
return SCPE_ARG;
val[0] = val[0] | (i + 1);
} /* end if */
break;
case I_V_BY: /* byte */
cptr = get_2reg (cptr, 0, amd); /* get 2 reg */
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_PULSE) | (amd[1] << I_V_DST);
break;
case I_V_2AC: /* reg, reg */
cptr = get_2reg (cptr, 0, amd); /* get 2 reg */
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
break;
case I_V_RSI: /* reg, short imm */
cptr = get_glyph (cptr, gbuf, ','); /* get immediate */
d = (int32) get_uint (gbuf, 8, I_M_SRC + 1, &r);
if ((d == 0) || (r != SCPE_OK)) return SCPE_ARG;
if ((d == 0) || (r != SCPE_OK))
return SCPE_ARG;
val[0] = val[0] | ((d - 1) << I_V_SRC); /* put in place */
cptr = get_glyph (cptr, gbuf, 0); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
break;
case I_V_RLI: /* reg, long imm */
cptr = get_glyph (cptr, gbuf, ','); /* get immediate */
val[1] = (int32) get_uint (gbuf, 8, DMASK, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
cptr = get_glyph (cptr, gbuf, 0); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
rtn = -1;
break;
@@ -1089,18 +1123,21 @@ switch (j) { /* case on class */
case I_V_LI: /* long imm */
cptr = get_glyph (cptr, gbuf, 0); /* get immediate */
val[1] = (int32) get_uint (gbuf, 8, DMASK, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
rtn = -1;
break;
case I_V_RLM: /* reg, long mem */
cptr = get_glyph (cptr, gbuf, ','); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
case I_V_LM: /* long mem */
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[1] << I_V_MODE);
val[1] = (amd[0] << A_V_IND) | amd[2];
rtn = -1;
@@ -1109,10 +1146,12 @@ switch (j) { /* case on class */
case I_V_FRM: /* flt reg, long mem */
cptr = get_glyph (cptr, gbuf, ','); /* get register */
d = (int32) get_uint (gbuf, 8, I_M_DST, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_DST); /* put in place */
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[1] << I_V_SRC);
val[1] = (amd[0] << A_V_IND) | amd[2];
rtn = -1;
@@ -1120,7 +1159,8 @@ switch (j) { /* case on class */
case I_V_FST: /* flt status */
cptr = get_addr (cptr, addr, TRUE, cflag, amd);
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[1] << I_V_DST);
val[1] = (amd[0] << A_V_IND) | amd[2];
rtn = -1;
@@ -1128,15 +1168,18 @@ switch (j) { /* case on class */
case I_V_XP: /* XOP */
cptr = get_2reg (cptr, ',', amd); /* get 2 reg */
if (cptr == NULL) return SCPE_ARG;
if (cptr == NULL)
return SCPE_ARG;
val[0] = val[0] | (amd[0] << I_V_SRC) | (amd[1] << I_V_DST);
cptr = get_glyph (cptr, gbuf, 0); /* get argument */
d = (int32) get_uint (gbuf, 8, I_M_XOP, &r);
if (r != SCPE_OK) return SCPE_ARG;
if (r != SCPE_OK)
return SCPE_ARG;
val[0] = val[0] | (d << I_V_XOP);
break;
} /* end case */
if (*cptr != 0) return SCPE_ARG; /* any leftovers? */
if (*cptr != 0) /* any leftovers? */
return SCPE_ARG;
return rtn;
}

45
NOVA/nova_tt1.c
View File

@@ -27,6 +27,7 @@
tti1 second terminal input
tto1 second terminal output
19-Nov-08 RMS Revised for common TMXR show routines
09-May-03 RMS Added network device flag
05-Jan-03 RMS Fixed calling sequence for setmod
03-Oct-02 RMS Added DIBs
@@ -63,8 +64,6 @@ t_stat tto1_reset (DEVICE *dptr);
t_stat ttx1_setmod (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat tti1_attach (UNIT *uptr, char *cptr);
t_stat tti1_detach (UNIT *uptr);
t_stat tti1_summ (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat tti1_show (FILE *st, UNIT *uptr, int32 val, void *desc);
void ttx1_enbdis (int32 dis);
/* TTI1 data structures
@@ -93,13 +92,14 @@ REG tti1_reg[] = {
MTAB tti1_mod[] = {
{ UNIT_DASHER, 0, "ANSI", "ANSI", &ttx1_setmod },
{ UNIT_DASHER, UNIT_DASHER, "Dasher", "DASHER", &ttx1_setmod },
{ UNIT_ATT, UNIT_ATT, "summary", NULL, NULL, &tti1_summ },
{ UNIT_ATT, UNIT_ATT, "summary", NULL,
NULL, &tmxr_show_summ, (void *) &tt_desc },
{ MTAB_XTD | MTAB_VDV, 0, NULL, "DISCONNECT",
&tmxr_dscln, NULL, &tt_desc },
&tmxr_dscln, NULL, (void *) &tt_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 1, "CONNECTIONS", NULL,
NULL, &tti1_show, NULL },
NULL, &tmxr_show_cstat, (void *) &tt_desc },
{ MTAB_XTD | MTAB_VDV | MTAB_NMO, 0, "STATISTICS", NULL,
NULL, &tti1_show, NULL },
NULL, &tmxr_show_cstat, (void *) &tt_desc },
{ 0 }
};
@@ -136,6 +136,10 @@ REG tto1_reg[] = {
MTAB tto1_mod[] = {
{ UNIT_DASHER, 0, "ANSI", "ANSI", &ttx1_setmod },
{ UNIT_DASHER, UNIT_DASHER, "Dasher", "DASHER", &ttx1_setmod },
{ MTAB_XTD|MTAB_VUN|MTAB_NC, 0, "LOG", "LOG",
&tmxr_set_log, &tmxr_show_log, &tt_desc },
{ MTAB_XTD|MTAB_VUN|MTAB_NC, 0, NULL, "NOLOG",
&tmxr_set_nolog, NULL, &tt_desc },
{ 0 }
};
@@ -225,7 +229,8 @@ return SCPE_OK;
int32 tto1 (int32 pulse, int32 code, int32 AC)
{
if (code == ioDOA) tto1_unit.buf = AC & 0377;
if (code == ioDOA)
tto1_unit.buf = AC & 0377;
switch (pulse) { /* decode IR<8:9> */
case iopS: /* start */
@@ -256,7 +261,8 @@ dev_busy = dev_busy & ~INT_TTO1; /* clear busy */
dev_done = dev_done | INT_TTO1; /* set done */
int_req = (int_req & ~INT_DEV) | (dev_done & ~dev_disable);
c = tto1_unit.buf & 0177;
if ((tto1_unit.flags & UNIT_DASHER) && (c == 031)) c = '\b';
if ((tto1_unit.flags & UNIT_DASHER) && (c == 031))
c = '\b';
if (tt1_ldsc.conn) { /* connected? */
if (tt1_ldsc.xmte) { /* tx enabled? */
tmxr_putc_ln (&tt1_ldsc, c); /* output char */
@@ -297,7 +303,8 @@ t_stat tti1_attach (UNIT *uptr, char *cptr)
t_stat r;
r = tmxr_attach (&tt_desc, uptr, cptr); /* attach */
if (r != SCPE_OK) return r; /* error */
if (r != SCPE_OK) /* error */
return r;
sim_activate (uptr, tmxr_poll); /* start poll */
return SCPE_OK;
}
@@ -314,30 +321,12 @@ sim_cancel (uptr); /* stop poll */
return r;
}
/* Show summary processor */
t_stat tti1_summ (FILE *st, UNIT *uptr, int32 val, void *desc)
{
if (tt1_ldsc.conn) fprintf (st, "connected");
else fprintf (st, "disconnected");
return SCPE_OK;
}
/* SHOW CONN/STAT processor */
t_stat tti1_show (FILE *st, UNIT *uptr, int32 val, void *desc)
{
if (val) tmxr_fconns (st, &tt1_ldsc, -1);
else tmxr_fstats (st, &tt1_ldsc, -1);
return SCPE_OK;
}
/* Enable/disable device */
void ttx1_enbdis (int32 dis)
{
if (dis) {
tti1_dev.flags = tto1_dev.flags | DEV_DIS;
tti1_dev.flags = tti1_dev.flags | DEV_DIS;
tto1_dev.flags = tto1_dev.flags | DEV_DIS;
}
else {