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Intel-Systems, IBMPC: Standardize to CRLF line endings and spaces for tabs
This commit is contained in:
Bill Beech
committed by
Mark Pizzolato
Mark Pizzolato
parent
18efafe927
commit
a221ac4055
@@ -1,312 +1,312 @@
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/* i8251.c: Intel i8251 UART adapter
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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||||
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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||||
in this Software without prior written authorization from William A. Beech.
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||||
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MODIFICATIONS:
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?? ??? 10 - Original file.
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16 Dec 12 - Modified to use isbc_80_10.cfg file to set baseport and size.
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24 Apr 15 -- Modified to use simh_debug
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NOTES:
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These functions support a simulated i8251 interface device on an iSBC.
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The device had one physical I/O port which could be connected
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to any serial I/O device that would connect to a current loop,
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RS232, or TTY interface. Available baud rates were jumper
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selectable for each port from 110 to 9600.
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All I/O is via programmed I/O. The i8251 has a status port
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and a data port.
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The simulated device does not support synchronous mode. The simulated device
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supports a select from I/O space and one address line. The data port is at the
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lower address and the status/command port is at the higher.
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A write to the status port can select some options for the device:
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Asynchronous Mode Instruction
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7 6 5 4 3 2 1 0
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+---+---+---+---+---+---+---+---+
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| S2 S1 EP PEN L2 L1 B2 B1|
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+---+---+---+---+---+---+---+---+
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Baud Rate Factor
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B2 0 1 0 1
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B1 0 0 1 1
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sync 1X 16X 64X
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mode
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Character Length
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L2 0 1 0 1
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L1 0 0 1 1
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5 6 7 8
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bits bits bits bits
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EP - A 1 in this bit position selects even parity.
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PEN - A 1 in this bit position enables parity.
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Number of Stop Bits
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S2 0 1 0 1
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S1 0 0 1 1
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invalid 1 1.5 2
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bit bits bits
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Command Instruction Format
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7 6 5 4 3 2 1 0
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+---+---+---+---+---+---+---+---+
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| EH IR RTS ER SBRK RxE DTR TxE|
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+---+---+---+---+---+---+---+---+
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TxE - A 1 in this bit position enables transmit.
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DTR - A 1 in this bit position forces *DTR to zero.
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RxE - A 1 in this bit position enables receive.
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SBRK - A 1 in this bit position forces TxD to zero.
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ER - A 1 in this bit position resets the error bits
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RTS - A 1 in this bit position forces *RTS to zero.
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IR - A 1 in this bit position returns the 8251 to Mode Instruction Format.
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EH - A 1 in this bit position enables search for sync characters.
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A read of the status port gets the port status:
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Status Read Format
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7 6 5 4 3 2 1 0
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+---+---+---+---+---+---+---+---+
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|DSR SD FE OE PE TxE RxR TxR|
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+---+---+---+---+---+---+---+---+
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TxR - A 1 in this bit position signals transmit ready to receive a character.
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RxR - A 1 in this bit position signals receiver has a character.
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TxE - A 1 in this bit position signals transmitter has no more characters to transmit.
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PE - A 1 in this bit signals a parity error.
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OE - A 1 in this bit signals an transmit overrun error.
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FE - A 1 in this bit signals a framing error.
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SD - A 1 in this bit position returns the 8251 to Mode Instruction Format.
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DSR - A 1 in this bit position signals *DSR is at zero.
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A read from the data port gets the typed character, a write
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to the data port writes the character to the device.
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*/
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#include "system_defs.h"
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#define DEBUG 0
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/* external globals */
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extern uint16 port; //port called in dev_table[port]
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#define UNIT_V_ANSI (UNIT_V_UF + 0) /* ANSI mode */
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#define UNIT_ANSI (1 << UNIT_V_ANSI)
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#define TXR 0x01
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#define RXR 0x02
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#define TXE 0x04
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#define SD 0x40
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/* external function prototypes */
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extern uint16 reg_dev(uint8 (*routine)(t_bool, uint8), uint16, uint8);
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/* globals */
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int32 i8251_devnum = 0; //actual number of 8251 instances + 1
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uint16 i8251_port[4]; //baseport port registered to each instance
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/* function prototypes */
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t_stat i8251_svc (UNIT *uptr);
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t_stat i8251_reset (DEVICE *dptr, uint16 baseport);
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uint8 i8251_get_dn(void);
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uint8 i8251s(t_bool io, uint8 data);
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uint8 i8251d(t_bool io, uint8 data);
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void i8251_reset1(uint8 devnum);
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/* i8251 Standard I/O Data Structures */
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/* up to 1 i8251 devices */
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UNIT i8251_unit = {
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UDATA (&i8251_svc, 0, 0), KBD_POLL_WAIT
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};
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REG i8251_reg[] = {
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{ HRDATA (DATA, i8251_unit.buf, 8) },
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{ HRDATA (STAT, i8251_unit.u3, 8) },
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{ HRDATA (MODE, i8251_unit.u4, 8) },
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{ HRDATA (CMD, i8251_unit.u5, 8) },
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{ NULL }
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};
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DEBTAB i8251_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "XACK", DEBUG_xack },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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MTAB i8251_mod[] = {
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{ UNIT_ANSI, 0, "TTY", "TTY", NULL },
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{ UNIT_ANSI, UNIT_ANSI, "ANSI", "ANSI", NULL },
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{ 0 }
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};
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/* address width is set to 16 bits to use devices in 8086/8088 implementations */
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DEVICE i8251_dev = {
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"I8251", //name
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&i8251_unit, //units
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i8251_reg, //registers
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i8251_mod, //modifiers
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1, //numunits
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16, //aradix
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16, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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// &i8251_reset, //reset
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NULL, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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0, //flags
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0, //dctrl
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i8251_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* Service routines to handle simulator functions */
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/* i8251_svc - actually gets char & places in buffer */
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t_stat i8251_svc (UNIT *uptr)
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{
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int32 temp;
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sim_activate (&i8251_unit, i8251_unit.wait); /* continue poll */
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if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
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return temp; /* no char or error? */
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i8251_unit.buf = temp & 0xFF; /* Save char */
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i8251_unit.u3 |= RXR; /* Set status */
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/* Do any special character handling here */
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i8251_unit.pos++;
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return SCPE_OK;
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}
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/* Reset routine */
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t_stat i8251_reset (DEVICE *dptr, uint16 baseport)
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{
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if (i8251_devnum >= I8251_NUM) {
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sim_printf("i8251_reset: too many devices!\n");
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return SCPE_MEM;
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}
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sim_printf(" 8251-%d: Hardware Reset\n", i8251_devnum);
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sim_printf(" 8251-%d: Registered at %04X\n", i8251_devnum, baseport);
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i8251_port[i8251_devnum] = baseport;
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reg_dev(i8251d, baseport, i8251_devnum);
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reg_dev(i8251s, baseport + 1, i8251_devnum);
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i8251_reset1(i8251_devnum);
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sim_activate (&i8251_unit, i8251_unit.wait); /* activate unit */
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i8251_devnum++;
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return SCPE_OK;
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}
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void i8251_reset1(uint8 devnum)
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{
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i8251_unit.u3 = TXR + TXE; /* status */
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i8251_unit.u4 = 0; /* mode instruction */
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i8251_unit.u5 = 0; /* command instruction */
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i8251_unit.u6 = 0;
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i8251_unit.buf = 0;
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i8251_unit.pos = 0;
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sim_printf(" 8251-%d: Software Reset\n", devnum);
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}
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uint8 i8251_get_dn(void)
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{
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int i;
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for (i=0; i<I8251_NUM; i++)
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if (port >= i8251_port[i] && port <= i8251_port[i] + 1)
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return i;
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sim_printf("i8251_get_dn: port %04X not in 8251 device table\n", port);
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return 0xFF;
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}
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/* I/O instruction handlers, called from the CPU module when an
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IN or OUT instruction is issued.
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*/
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uint8 i8251s(t_bool io, uint8 data)
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{
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uint8 devnum;
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if ((devnum = i8251_get_dn()) != 0xFF) {
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// sim_printf("\nio=%d data=%04X\n", io, data);
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if (io == 0) { /* read status port */
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return i8251_unit.u3;
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} else { /* write status port */
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if (i8251_unit.u6) { /* if mode, set cmd */
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i8251_unit.u5 = data;
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if (DEBUG)
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sim_printf(" 8251-%d: Command Instruction=%02X\n", devnum, data);
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if (data & SD) /* reset port! */
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i8251_reset1(devnum);
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} else { /* set mode */
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i8251_unit.u4 = data;
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if (DEBUG)
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sim_printf(" 8251-%d: Mode Instruction=%02X\n", devnum, data);
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i8251_unit.u6 = 1; /* set cmd received */
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}
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}
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}
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return 0;
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}
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uint8 i8251d(t_bool io, uint8 data)
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{
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uint8 devnum;
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if ((devnum = i8251_get_dn()) != 0xFF) {
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if (io == 0) { /* read data port */
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i8251_unit.u3 &= ~RXR;
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return (i8251_unit.buf);
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} else { /* write data port */
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sim_putchar(data);
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}
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}
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return 0;
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}
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/* end of i8251.c */
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/* i8251.c: Intel i8251 UART adapter
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
|
||||
copy of this software and associated documentation files (the "Software"),
|
||||
to deal in the Software without restriction, including without limitation
|
||||
the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
and/or sell copies of the Software, and to permit persons to whom the
|
||||
Software is furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
|
||||
Except as contained in this notice, the name of William A. Beech shall not be
|
||||
used in advertising or otherwise to promote the sale, use or other dealings
|
||||
in this Software without prior written authorization from William A. Beech.
|
||||
|
||||
MODIFICATIONS:
|
||||
|
||||
?? ??? 10 - Original file.
|
||||
16 Dec 12 - Modified to use isbc_80_10.cfg file to set baseport and size.
|
||||
24 Apr 15 -- Modified to use simh_debug
|
||||
|
||||
NOTES:
|
||||
|
||||
These functions support a simulated i8251 interface device on an iSBC.
|
||||
The device had one physical I/O port which could be connected
|
||||
to any serial I/O device that would connect to a current loop,
|
||||
RS232, or TTY interface. Available baud rates were jumper
|
||||
selectable for each port from 110 to 9600.
|
||||
|
||||
All I/O is via programmed I/O. The i8251 has a status port
|
||||
and a data port.
|
||||
|
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The simulated device does not support synchronous mode. The simulated device
|
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supports a select from I/O space and one address line. The data port is at the
|
||||
lower address and the status/command port is at the higher.
|
||||
|
||||
A write to the status port can select some options for the device:
|
||||
|
||||
Asynchronous Mode Instruction
|
||||
7 6 5 4 3 2 1 0
|
||||
+---+---+---+---+---+---+---+---+
|
||||
| S2 S1 EP PEN L2 L1 B2 B1|
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+---+---+---+---+---+---+---+---+
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||||
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Baud Rate Factor
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B2 0 1 0 1
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B1 0 0 1 1
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sync 1X 16X 64X
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mode
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Character Length
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L2 0 1 0 1
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L1 0 0 1 1
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5 6 7 8
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bits bits bits bits
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EP - A 1 in this bit position selects even parity.
|
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PEN - A 1 in this bit position enables parity.
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|
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Number of Stop Bits
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S2 0 1 0 1
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S1 0 0 1 1
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invalid 1 1.5 2
|
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bit bits bits
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|
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Command Instruction Format
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7 6 5 4 3 2 1 0
|
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+---+---+---+---+---+---+---+---+
|
||||
| EH IR RTS ER SBRK RxE DTR TxE|
|
||||
+---+---+---+---+---+---+---+---+
|
||||
|
||||
TxE - A 1 in this bit position enables transmit.
|
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DTR - A 1 in this bit position forces *DTR to zero.
|
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RxE - A 1 in this bit position enables receive.
|
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SBRK - A 1 in this bit position forces TxD to zero.
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ER - A 1 in this bit position resets the error bits
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RTS - A 1 in this bit position forces *RTS to zero.
|
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IR - A 1 in this bit position returns the 8251 to Mode Instruction Format.
|
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EH - A 1 in this bit position enables search for sync characters.
|
||||
|
||||
A read of the status port gets the port status:
|
||||
|
||||
Status Read Format
|
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7 6 5 4 3 2 1 0
|
||||
+---+---+---+---+---+---+---+---+
|
||||
|DSR SD FE OE PE TxE RxR TxR|
|
||||
+---+---+---+---+---+---+---+---+
|
||||
|
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TxR - A 1 in this bit position signals transmit ready to receive a character.
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RxR - A 1 in this bit position signals receiver has a character.
|
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TxE - A 1 in this bit position signals transmitter has no more characters to transmit.
|
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PE - A 1 in this bit signals a parity error.
|
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OE - A 1 in this bit signals an transmit overrun error.
|
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FE - A 1 in this bit signals a framing error.
|
||||
SD - A 1 in this bit position returns the 8251 to Mode Instruction Format.
|
||||
DSR - A 1 in this bit position signals *DSR is at zero.
|
||||
|
||||
A read from the data port gets the typed character, a write
|
||||
to the data port writes the character to the device.
|
||||
*/
|
||||
|
||||
#include "system_defs.h"
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#define DEBUG 0
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/* external globals */
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extern uint16 port; //port called in dev_table[port]
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#define UNIT_V_ANSI (UNIT_V_UF + 0) /* ANSI mode */
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#define UNIT_ANSI (1 << UNIT_V_ANSI)
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#define TXR 0x01
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#define RXR 0x02
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#define TXE 0x04
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#define SD 0x40
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/* external function prototypes */
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extern uint16 reg_dev(uint8 (*routine)(t_bool, uint8), uint16, uint8);
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/* globals */
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|
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int32 i8251_devnum = 0; //actual number of 8251 instances + 1
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||||
uint16 i8251_port[4]; //baseport port registered to each instance
|
||||
|
||||
/* function prototypes */
|
||||
|
||||
t_stat i8251_svc (UNIT *uptr);
|
||||
t_stat i8251_reset (DEVICE *dptr, uint16 baseport);
|
||||
uint8 i8251_get_dn(void);
|
||||
uint8 i8251s(t_bool io, uint8 data);
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uint8 i8251d(t_bool io, uint8 data);
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void i8251_reset1(uint8 devnum);
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||||
|
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/* i8251 Standard I/O Data Structures */
|
||||
/* up to 1 i8251 devices */
|
||||
|
||||
UNIT i8251_unit = {
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||||
UDATA (&i8251_svc, 0, 0), KBD_POLL_WAIT
|
||||
};
|
||||
|
||||
REG i8251_reg[] = {
|
||||
{ HRDATA (DATA, i8251_unit.buf, 8) },
|
||||
{ HRDATA (STAT, i8251_unit.u3, 8) },
|
||||
{ HRDATA (MODE, i8251_unit.u4, 8) },
|
||||
{ HRDATA (CMD, i8251_unit.u5, 8) },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
DEBTAB i8251_debug[] = {
|
||||
{ "ALL", DEBUG_all },
|
||||
{ "FLOW", DEBUG_flow },
|
||||
{ "READ", DEBUG_read },
|
||||
{ "WRITE", DEBUG_write },
|
||||
{ "XACK", DEBUG_xack },
|
||||
{ "LEV1", DEBUG_level1 },
|
||||
{ "LEV2", DEBUG_level2 },
|
||||
{ NULL }
|
||||
};
|
||||
|
||||
MTAB i8251_mod[] = {
|
||||
{ UNIT_ANSI, 0, "TTY", "TTY", NULL },
|
||||
{ UNIT_ANSI, UNIT_ANSI, "ANSI", "ANSI", NULL },
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
/* address width is set to 16 bits to use devices in 8086/8088 implementations */
|
||||
|
||||
DEVICE i8251_dev = {
|
||||
"I8251", //name
|
||||
&i8251_unit, //units
|
||||
i8251_reg, //registers
|
||||
i8251_mod, //modifiers
|
||||
1, //numunits
|
||||
16, //aradix
|
||||
16, //awidth
|
||||
1, //aincr
|
||||
16, //dradix
|
||||
8, //dwidth
|
||||
NULL, //examine
|
||||
NULL, //deposit
|
||||
// &i8251_reset, //reset
|
||||
NULL, //reset
|
||||
NULL, //boot
|
||||
NULL, //attach
|
||||
NULL, //detach
|
||||
NULL, //ctxt
|
||||
0, //flags
|
||||
0, //dctrl
|
||||
i8251_debug, //debflags
|
||||
NULL, //msize
|
||||
NULL //lname
|
||||
};
|
||||
|
||||
/* Service routines to handle simulator functions */
|
||||
|
||||
/* i8251_svc - actually gets char & places in buffer */
|
||||
|
||||
t_stat i8251_svc (UNIT *uptr)
|
||||
{
|
||||
int32 temp;
|
||||
|
||||
sim_activate (&i8251_unit, i8251_unit.wait); /* continue poll */
|
||||
if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)
|
||||
return temp; /* no char or error? */
|
||||
i8251_unit.buf = temp & 0xFF; /* Save char */
|
||||
i8251_unit.u3 |= RXR; /* Set status */
|
||||
|
||||
/* Do any special character handling here */
|
||||
|
||||
i8251_unit.pos++;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
/* Reset routine */
|
||||
|
||||
t_stat i8251_reset (DEVICE *dptr, uint16 baseport)
|
||||
{
|
||||
if (i8251_devnum >= I8251_NUM) {
|
||||
sim_printf("i8251_reset: too many devices!\n");
|
||||
return SCPE_MEM;
|
||||
}
|
||||
sim_printf(" 8251-%d: Hardware Reset\n", i8251_devnum);
|
||||
sim_printf(" 8251-%d: Registered at %04X\n", i8251_devnum, baseport);
|
||||
i8251_port[i8251_devnum] = baseport;
|
||||
reg_dev(i8251d, baseport, i8251_devnum);
|
||||
reg_dev(i8251s, baseport + 1, i8251_devnum);
|
||||
i8251_reset1(i8251_devnum);
|
||||
sim_activate (&i8251_unit, i8251_unit.wait); /* activate unit */
|
||||
i8251_devnum++;
|
||||
return SCPE_OK;
|
||||
}
|
||||
|
||||
void i8251_reset1(uint8 devnum)
|
||||
{
|
||||
i8251_unit.u3 = TXR + TXE; /* status */
|
||||
i8251_unit.u4 = 0; /* mode instruction */
|
||||
i8251_unit.u5 = 0; /* command instruction */
|
||||
i8251_unit.u6 = 0;
|
||||
i8251_unit.buf = 0;
|
||||
i8251_unit.pos = 0;
|
||||
sim_printf(" 8251-%d: Software Reset\n", devnum);
|
||||
}
|
||||
|
||||
uint8 i8251_get_dn(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i=0; i<I8251_NUM; i++)
|
||||
if (port >= i8251_port[i] && port <= i8251_port[i] + 1)
|
||||
return i;
|
||||
sim_printf("i8251_get_dn: port %04X not in 8251 device table\n", port);
|
||||
return 0xFF;
|
||||
}
|
||||
|
||||
/* I/O instruction handlers, called from the CPU module when an
|
||||
IN or OUT instruction is issued.
|
||||
*/
|
||||
|
||||
uint8 i8251s(t_bool io, uint8 data)
|
||||
{
|
||||
uint8 devnum;
|
||||
|
||||
if ((devnum = i8251_get_dn()) != 0xFF) {
|
||||
// sim_printf("\nio=%d data=%04X\n", io, data);
|
||||
if (io == 0) { /* read status port */
|
||||
return i8251_unit.u3;
|
||||
} else { /* write status port */
|
||||
if (i8251_unit.u6) { /* if mode, set cmd */
|
||||
i8251_unit.u5 = data;
|
||||
if (DEBUG)
|
||||
sim_printf(" 8251-%d: Command Instruction=%02X\n", devnum, data);
|
||||
if (data & SD) /* reset port! */
|
||||
i8251_reset1(devnum);
|
||||
} else { /* set mode */
|
||||
i8251_unit.u4 = data;
|
||||
if (DEBUG)
|
||||
sim_printf(" 8251-%d: Mode Instruction=%02X\n", devnum, data);
|
||||
i8251_unit.u6 = 1; /* set cmd received */
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
uint8 i8251d(t_bool io, uint8 data)
|
||||
{
|
||||
uint8 devnum;
|
||||
|
||||
if ((devnum = i8251_get_dn()) != 0xFF) {
|
||||
if (io == 0) { /* read data port */
|
||||
i8251_unit.u3 &= ~RXR;
|
||||
return (i8251_unit.buf);
|
||||
} else { /* write data port */
|
||||
sim_putchar(data);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* end of i8251.c */
|
||||
|
||||
Reference in New Issue
Block a user