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3b2: CIO feature card framework

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Adds a skeleton framework for CIO ("Common I/O") feature cards. The
first feature card to be implemented will be the "PORTS" serial MUX.

Part of this support involved reworking IRQ handling in the CPU. It
now respects both IRQ Vector and IPL.

This change also removes all 'assert(0)' calls from the simulator and
replaces them with generic "Simulator Error" halts. These should only
happen if there's a genuine logic error lurking somewhere.
This commit is contained in:
Seth Morabito
2018-04-11 18:07:50 -07:00
parent 05ba8c4d2c
commit a7d0d4a6e7
8 changed files with 720 additions and 97 deletions
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5
3B2/3b2_cpu.h
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@@ -395,6 +395,7 @@ t_stat cpu_reset(DEVICE *dptr);
t_stat cpu_set_size(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_set_hist(UNIT *uptr, int32 val, CONST char *cptr, void *desc);
t_stat cpu_show_hist(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_show_virt(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_show_stack(FILE *st, UNIT *uptr, int32 val, CONST void *desc);
t_stat cpu_set_halt(UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_clear_halt(UNIT *uptr, int32 val, char *cptr, void *desc);
@@ -410,14 +411,14 @@ t_stat fprint_sym_m(FILE *of, t_addr addr, t_value *val);
instr *cpu_next_instruction(void);
uint8 decode_instruction(instr *instr);
t_bool cpu_on_interrupt(uint8 ipl);
void cpu_on_interrupt(uint16 vec);
static uint32 cpu_effective_address(operand * op);
static uint32 cpu_read_op(operand * op);
static void cpu_write_op(operand * op, t_uint64 val);
static void cpu_set_nz_flags(t_uint64 data, operand * op);
static void cpu_calc_ints();
static SIM_INLINE uint8 cpu_ipl();
static SIM_INLINE void cpu_on_normal_exception(uint8 isc);
static SIM_INLINE void cpu_on_stack_exception(uint8 isc);
static SIM_INLINE void cpu_on_process_exception(uint8 isc);