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Notes For V3.3
RESTRICTION: The HP DS disk is not debugged. DO NOT enable this feature for normal operations. WARNING: Massive changes in the PDP-11 make all previous SAVEd file obsolete. Do not attempt to use a PDP-11 SAVE file from a prior release with V3.3! 1. New Features in 3.3 1.1 SCP - Added -p (powerup) qualifier to RESET - Changed SET <unit> ONLINE/OFFLINE to SET <unit> ENABLED/DISABLED - Moved SET DEBUG under SET CONSOLE hierarchy - Added optional parameter value to SHOW command - Added output file option to SHOW command 1.2 PDP-11 - Separated RH Massbus adapter from RP controller - Added TU tape support - Added model emulation framework - Added model details 1.3 VAX - Separated out CVAX-specific features from core instruction simulator - Implemented capability for CIS, octaword, compatibility mode instructions - Added instruction display and parse for compatibility mode - Changed SET CPU VIRTUAL=n to SHOW CPU VIRTUAL=n - Added =n optional parameter to SHOW CPU HISTORY 1.4 Unibus/Qbus simulators (PDP-11, VAX, PDP-10) - Simplified DMA API's - Modified DMA peripherals to use simplified API's 1.5 HP2100 (all changes from Dave Bryan) CPU - moved MP into its own device; added MP option jumpers - modified DMA to allow disabling - modified SET CPU 2100/2116 to truncate memory > 32K - added -F switch to SET CPU to force memory truncation - modified WRU to be REG_HRO - added BRK and DEL to save console settings DR - provided protected tracks and "Writing Enabled" status bit - added "parity error" status return on writes for 12606 - added track origin test for 12606 - added SCP test for 12606 - added "Sector Flag" status bit - added "Read Inhibit" status bit for 12606 - added TRACKPROT modifier LPS - added SET OFFLINE/ONLINE, POWEROFF/POWERON - added fast/realistic timing - added debug printouts LPT - added SET OFFLINE/ONLINE, POWEROFF/POWERON PTR - added paper tape loop mode, DIAG/READER modifiers to PTR - added PV_LEFT to PTR TRLLIM register CLK - modified CLK to permit disable 1.6 IBM 1401, IBM 1620, Interdata 16b, SDS 940, PDP-10 - Added instruction history 1.7 H316, PDP-15, PDP-8 - Added =n optional value to SHOW CPU HISTORY 2. Bugs Fixed in 3.3 2.1 SCP - Fixed comma-separated SET options (from Dave Bryan) - Fixed duplicate HELP displays with user-specified commands 2.2 PDP-10 - Replicated RP register state per drive - Fixed TU to set FCE on short record - Fixed TU to return bit<15> in drive type - Fixed TU format specification, 1:0 are don't cares - Fixed TU handling of TMK status - Fixed TU handling of DONE, ATA at end of operation - Implemented TU write check 2.3 PDP-11 - Replicated RP register state per drive - Fixed RQ, TQ to report correct controller type and stage 1 configuration flags on a Unibus system - Fixed HK CS2<output_ready> flag 2.4 VAX - Fixed parsing of indirect displacement modes in instruction input 2.5 HP2100 (all fixes from Dave Bryan) CPU - fixed S-register behavior on 2116 - fixed LIx/MIx behavior for DMA on 2116 and 2100 - fixed LIx/MIx behavior for empty I/O card slots DP - fixed enable/disable from either device - fixed ANY ERROR status for 12557A interface - fixed unattached drive status for 12557A interface - status cmd without prior STC DC now completes (12557A) - OTA/OTB CC on 13210A interface also does CLC CC - fixed RAR model - fixed seek check on 13210 if sector out of range DQ - fixed enable/disable from either device - shortened xtime from 5 to 3 (drive avg 156KW/second) - fixed not ready/any error status - fixed RAR model DR - fixed enable/disable from either device - fixed sector return in status word - fixed DMA last word write, incomplete sector fill value - fixed 12610 SFC operation - fixed current-sector determination IPL - fixed enable/disable from either device LPS - fixed status returns for error conditions - fixed handling of non-printing characters - fixed handling of characters after column 80 - improved timing model accuracy for RTE LPT - fixed status returns for error conditions - fixed TOF handling so form remains on line 0 SYS - fixed display of CCA/CCB/CCE instructions 2.5 PDP-15 FPP - fixed URFST to mask low 9b of fraction - fixed exception PC setting
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
2e00e1122f
commit
b6393b36b4
@@ -25,6 +25,7 @@
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cpu PDP-4/7/9/15 central processor
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06-Nov-04 RMS Added =n to SHOW HISTORY
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26-Mar-04 RMS Fixed warning from -std=c99
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14-Jan-04 RMS Fixed g_mode in XVM implementation
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PDP-15 index, autoincrement generate 18b addresses
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@@ -543,7 +544,7 @@ MTAB cpu_mod[] = {
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{ UNIT_MSIZE, 114688, NULL, "112K", &cpu_set_size },
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{ UNIT_MSIZE, 131072, NULL, "128K", &cpu_set_size },
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#endif
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{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "HISTORY", "HISTORY",
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{ MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "HISTORY", "HISTORY",
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&cpu_set_hist, &cpu_show_hist },
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{ 0 } };
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@@ -1966,16 +1967,23 @@ return SCPE_OK;
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t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc)
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{
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int32 l, j, k, di;
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int32 l, j, k, di, lnt;
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char *cptr = (char *) desc;
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t_value sim_eval[2];
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t_stat r;
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struct InstHistory *h;
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extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val,
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UNIT *uptr, int32 sw);
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if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */
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if (cptr) {
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lnt = (int32) get_uint (cptr, 10, hst_lnt, &r);
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if ((r != SCPE_OK) || (lnt == 0)) return SCPE_ARG; }
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else lnt = hst_lnt;
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di = hst_p - lnt; /* work forward */
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if (di < 0) di = di + hst_lnt;
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fprintf (st, "PC L AC MQ IR\n\n");
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di = hst_p; /* work forward */
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for (k = 0; k < hst_lnt; k++) { /* print specified */
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for (k = 0; k < lnt; k++) { /* print specified */
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h = &hst[(di++) % hst_lnt]; /* entry pointer */
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if (h->pc & HIST_PC) { /* instruction? */
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l = (h->lac >> 18) & 1; /* link */
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@@ -1,7 +1,7 @@
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To: Users
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From: Bob Supnik
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Subj: 18b PDP Simulator Usage
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Date: 15-Jun-2004
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Date: 15-Nov-2004
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COPYRIGHT NOTICE
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@@ -280,8 +280,9 @@ This is controlled by the SET CPU HISTORY and SHOW CPU HISTORY commands:
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SET CPU HISTORY clear history buffer
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SET CPU HISTORY=0 disable history
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SET CPU HISTORY=n enable history, display length = n
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SET CPU HISTORY=n enable history, length = n
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SHOW CPU HISTORY print CPU history
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SHOW CPU HISTORY=n print first n entries of CPU history
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The maximum length for the history is 65536 entries.
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@@ -596,7 +597,7 @@ RP15 options include the ability to make units write enabled or write locked:
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SET RPn LOCKED set unit n write locked
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SET RPn WRITEENABLED set unit n write enabled
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Units can also be set ONLINE or OFFLINE.
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Units can also be set ENABLED or DISABLED.
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The RP15 implements these registers:
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@@ -745,7 +746,7 @@ locked.
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SET DTn WRITEENABLED set unit n write enabled
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SET DTn LOCKED set unit n write locked
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Units can also be set ONLINE or OFFLINE.
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Units can also be set ENABLED or DISABLED.
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The Type 550, TC02, and TC15 support PDP-8 format, PDP-11 format, and
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18b format DECtape images. ATTACH tries to determine the tape format
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@@ -800,7 +801,7 @@ or write locked.
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SET MTn LOCKED set unit n write locked
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SET MTn WRITEENABLED set unit n write enabled
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Units can also be set ONLINE or OFFLINE.
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Units can also be set ENABLED or DISABLED.
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The magnetic tape controller implements these registers:
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@@ -25,6 +25,8 @@
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fpp PDP-15 floating point processor
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31-Oct-04 RMS Fixed URFST to mask low 9b of fraction
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Fixed exception PC setting
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10-Apr-04 RMS JEA is 15b not 18b
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The FP15 instruction format is:
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@@ -205,7 +207,7 @@ DEVICE fpp_dev = {
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1, 8, 1, 1, 8, 18,
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NULL, NULL, &fp15_reset,
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NULL, NULL, NULL,
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NULL, DEV_DISABLE | DEV_DIS };
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NULL, DEV_DISABLE };
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/* Instruction decode for FP15
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@@ -390,11 +392,11 @@ t_stat sta;
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fguard = 0; /* clear guard */
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if (ir & FI_FP) { /* fp? */
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if (sta = fp15_norm (ir, a, NULL, 0)) return sta; /* normalize */
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wd[1] = (a->sign << 17) | a->hi; /* hi frac */
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if (ir & FI_DP) { /* dp? */
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numwd = 3; /* 3 words */
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wd[0] = a->exp & DMASK; /* exponent */
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wd[2] = a->lo; } /* low frac */
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wd[1] = (a->sign << 17) | a->hi; /* hi frac */
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wd[2] = a->lo; /* low frac */
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numwd = 3; } /* 3 words */
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else { /* single */
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if (!(ir & FI_NORND) && (a->lo & UFP_FL_SRND)) { /* round? */
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a->lo = (a->lo + UFP_FL_SRND) & UFP_FL_SMASK;
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@@ -404,24 +406,25 @@ if (ir & FI_FP) { /* fp? */
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a->exp = a->exp + 1; } }
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if (a->exp > 0377) return FP_OVF; /* sp ovf? */
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if (a->exp < -0400) return FP_UNF; /* sp unf? */
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numwd = 2; /* 2 words */
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wd[0] = (a->exp & 0777) | a->lo; } /* low frac'exp */
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wd[0] = (a->exp & 0777) | (a->lo & UFP_FL_SMASK); /* low frac'exp */
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wd[1] = (a->sign << 17) | a->hi; /* hi frac */
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numwd = 2; } /* 2 words */
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}
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else { fmb.lo = (-a->lo) & UFP_FL_MASK; /* 2's complement */
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fmb.hi = (~a->hi + (fmb.lo == 0)) & UFP_FH_MASK;/* to FMB */
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if (ir & FI_DP) { /* dp? */
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numwd = 2; /* 2 words */
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if (a->sign) { /* negative? */
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wd[0] = fmb.hi | SIGN; /* store FMB */
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wd[1] = fmb.lo; }
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else { /* pos, store FMA */
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wd[0] = a->hi;
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wd[1] = a->lo; } }
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wd[1] = a->lo; }
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numwd = 2; } /* 2 words */
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else { /* single */
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if (a->hi || (a->lo & SIGN)) return FP_OVF; /* check int ovf */
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numwd = 1; /* 1 word */
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if (a->sign) wd[0] = fmb.lo; /* neg? store FMB */
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else wd[0] = a->lo; } /* pos, store FMA */
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else wd[0] = a->lo; /* pos, store FMA */
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numwd = 1; } /* 1 word */
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}
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for (i = 0; i < numwd; i++) { /* store words */
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if (Write (addr, wd[i], WR)) return FP_MM;
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@@ -483,7 +486,7 @@ while (((a->hi & UFP_FH_NORM) == 0) && /* normalize divd */
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dp_lsh_1 (a, NULL); /* lsh divd, divr */
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dp_lsh_1 (b, NULL); } /* can't carry out */
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if (!(a->hi & UFP_FH_NORM) && (b->hi & UFP_FH_NORM)) { /* divr norm, divd not? */
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a->hi = a->lo = 0; /* result is 0 */
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dp_swap (a, &fmq); /* quo = 0 (fmq), rem = a */
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return FP_OK; }
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while ((b->hi & UFP_FH_NORM) == 0) { /* normalize divr */
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dp_lsh_1 (b, NULL); /* can't carry out */
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@@ -562,7 +565,7 @@ if (a->hi | a->lo) { /* divd non-zero? */
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for (i = 0; (fmq.hi & UFP_FH_NORM) == 0; i++) { /* until quo */
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dp_lsh_1 (&fmq, NULL); /* left shift quo */
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if (dp_cmp (a, b) >= 0) { /* sub work? */
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dp_sub (a, b); /* a -= b */
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dp_sub (a, b); /* a = a - b */
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if (i == 0) a->exp = a->exp + 1;
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fmq.lo = fmq.lo | 1; } /* set quo bit */
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dp_lsh_1 (a, NULL); } /* left shift divd */
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@@ -768,7 +771,7 @@ PCQ_ENTRY; /* record branch */
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PC = Incr_addr (PC); /* PC+1 for "JMS" */
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mb = Jms_word (usmd); /* form JMS word */
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if (Write (ma, mb, WR)) return SCPE_OK; /* store */
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PC = (jea + 1) & IAMASK; /* new PC */
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PC = (ma + 1) & IAMASK; /* new PC */
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return SCPE_OK;
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}
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