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Notes For V3.3
RESTRICTION: The HP DS disk is not debugged. DO NOT enable this feature for normal operations. WARNING: Massive changes in the PDP-11 make all previous SAVEd file obsolete. Do not attempt to use a PDP-11 SAVE file from a prior release with V3.3! 1. New Features in 3.3 1.1 SCP - Added -p (powerup) qualifier to RESET - Changed SET <unit> ONLINE/OFFLINE to SET <unit> ENABLED/DISABLED - Moved SET DEBUG under SET CONSOLE hierarchy - Added optional parameter value to SHOW command - Added output file option to SHOW command 1.2 PDP-11 - Separated RH Massbus adapter from RP controller - Added TU tape support - Added model emulation framework - Added model details 1.3 VAX - Separated out CVAX-specific features from core instruction simulator - Implemented capability for CIS, octaword, compatibility mode instructions - Added instruction display and parse for compatibility mode - Changed SET CPU VIRTUAL=n to SHOW CPU VIRTUAL=n - Added =n optional parameter to SHOW CPU HISTORY 1.4 Unibus/Qbus simulators (PDP-11, VAX, PDP-10) - Simplified DMA API's - Modified DMA peripherals to use simplified API's 1.5 HP2100 (all changes from Dave Bryan) CPU - moved MP into its own device; added MP option jumpers - modified DMA to allow disabling - modified SET CPU 2100/2116 to truncate memory > 32K - added -F switch to SET CPU to force memory truncation - modified WRU to be REG_HRO - added BRK and DEL to save console settings DR - provided protected tracks and "Writing Enabled" status bit - added "parity error" status return on writes for 12606 - added track origin test for 12606 - added SCP test for 12606 - added "Sector Flag" status bit - added "Read Inhibit" status bit for 12606 - added TRACKPROT modifier LPS - added SET OFFLINE/ONLINE, POWEROFF/POWERON - added fast/realistic timing - added debug printouts LPT - added SET OFFLINE/ONLINE, POWEROFF/POWERON PTR - added paper tape loop mode, DIAG/READER modifiers to PTR - added PV_LEFT to PTR TRLLIM register CLK - modified CLK to permit disable 1.6 IBM 1401, IBM 1620, Interdata 16b, SDS 940, PDP-10 - Added instruction history 1.7 H316, PDP-15, PDP-8 - Added =n optional value to SHOW CPU HISTORY 2. Bugs Fixed in 3.3 2.1 SCP - Fixed comma-separated SET options (from Dave Bryan) - Fixed duplicate HELP displays with user-specified commands 2.2 PDP-10 - Replicated RP register state per drive - Fixed TU to set FCE on short record - Fixed TU to return bit<15> in drive type - Fixed TU format specification, 1:0 are don't cares - Fixed TU handling of TMK status - Fixed TU handling of DONE, ATA at end of operation - Implemented TU write check 2.3 PDP-11 - Replicated RP register state per drive - Fixed RQ, TQ to report correct controller type and stage 1 configuration flags on a Unibus system - Fixed HK CS2<output_ready> flag 2.4 VAX - Fixed parsing of indirect displacement modes in instruction input 2.5 HP2100 (all fixes from Dave Bryan) CPU - fixed S-register behavior on 2116 - fixed LIx/MIx behavior for DMA on 2116 and 2100 - fixed LIx/MIx behavior for empty I/O card slots DP - fixed enable/disable from either device - fixed ANY ERROR status for 12557A interface - fixed unattached drive status for 12557A interface - status cmd without prior STC DC now completes (12557A) - OTA/OTB CC on 13210A interface also does CLC CC - fixed RAR model - fixed seek check on 13210 if sector out of range DQ - fixed enable/disable from either device - shortened xtime from 5 to 3 (drive avg 156KW/second) - fixed not ready/any error status - fixed RAR model DR - fixed enable/disable from either device - fixed sector return in status word - fixed DMA last word write, incomplete sector fill value - fixed 12610 SFC operation - fixed current-sector determination IPL - fixed enable/disable from either device LPS - fixed status returns for error conditions - fixed handling of non-printing characters - fixed handling of characters after column 80 - improved timing model accuracy for RTE LPT - fixed status returns for error conditions - fixed TOF handling so form remains on line 0 SYS - fixed display of CCA/CCB/CCE instructions 2.5 PDP-15 FPP - fixed URFST to mask low 9b of fraction - fixed exception PC setting
This commit is contained in:
Bob Supnik
committed by
Mark Pizzolato
Mark Pizzolato
parent
2e00e1122f
commit
b6393b36b4
145
VAX/vax_sysdev.c
145
VAX/vax_sysdev.c
@@ -1,4 +1,4 @@
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/* vax_sysreg.c: VAX system registers simulator
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/* vax_sysdev.c: VAX 3900 system-specific logic
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Copyright (c) 1998-2004, Robert M Supnik
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@@ -23,9 +23,8 @@
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from Robert M Supnik.
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This module contains the CVAX system-specific devices implemented in the
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CMCTL memory controller and the SSC system support chip. (The architecturally
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specified devices are implemented in module vax_stddev.c.)
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This module contains the CVAX chip and VAX 3900 system-specific registers
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and devices.
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rom bootstrap ROM (no registers)
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nvr non-volatile ROM (no registers)
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@@ -33,6 +32,11 @@
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cso console storage output
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sysd system devices (SSC miscellany)
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30-Sep-04 RMS Moved CADR, MSER, CONPC, CONPSL, machine_check, cpu_boot,
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con_halt here from vax_cpu.c
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Moved model-specific IPR's here from vax_cpu1.c
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09-Sep-04 RMS Integrated powerup into RESET (with -p)
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Added model-specific registers and routines from CPU
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23-Jan-04 MP Added extended physical memory support (Mark Pizzolato)
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07-Jun-03 MP Added calibrated delay to ROM reads (Mark Pizzolato)
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Fixed calibration problems interval timer (Mark Pizzolato)
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@@ -162,6 +166,17 @@
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#define SSCADS_MASK 0x3FFFFFFC /* match or mask */
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extern int32 R[16];
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extern int32 STK[5];
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extern int32 PSL;
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extern int32 SISR;
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extern int32 mapen;
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extern int32 pcq[PCQ_SIZE];
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extern int32 pcq_p;
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extern int32 ibcnt, ppc;
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extern int32 in_ie;
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extern int32 mchk_va, mchk_ref;
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extern int32 fault_PC;
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extern int32 int_req[IPL_HLVL];
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extern UNIT cpu_unit;
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extern UNIT clk_unit;
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@@ -174,6 +189,9 @@ extern int32 cpu_extmem;
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uint32 *rom = NULL; /* boot ROM */
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uint32 *nvr = NULL; /* non-volatile mem */
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int32 CADR = 0; /* cache disable reg */
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int32 MSER = 0; /* mem sys error reg */
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int32 conpc, conpsl; /* console reg */
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int32 csi_csr = 0; /* control/status */
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int32 cso_csr = 0; /* control/status */
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int32 cmctl_reg[CMCTLSIZE >> 2] = { 0 }; /* CMCTL reg */
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@@ -232,7 +250,10 @@ void tmr_incr (int32 tmr, uint32 inc);
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int32 tmr0_inta (void);
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int32 tmr1_inta (void);
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int32 parity (int32 val, int32 odd);
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t_stat sysd_powerup (void);
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extern void Write (uint32 va, int32 val, int32 lnt, int32 acc);
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extern int32 intexc (int32 vec, int32 cc, int32 ipl, int ei);
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extern int32 cqmap_rd (int32 pa);
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extern void cqmap_wr (int32 pa, int32 val, int32 lnt);
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extern int32 cqipc_rd (int32 pa);
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@@ -377,6 +398,10 @@ UNIT sysd_unit[] = {
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{ UDATA (&tmr_svc, 0, 0) } };
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REG sysd_reg[] = {
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{ HRDATA (CADR, CADR, 8) },
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{ HRDATA (MSER, MSER, 8) },
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{ HRDATA (CONPC, conpc, 32) },
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{ HRDATA (CONPSL, conpsl, 32) },
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{ BRDATA (CMCSR, cmctl_reg, 16, 32, CMCTLSIZE >> 2) },
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{ HRDATA (CACR, ka_cacr, 8) },
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{ HRDATA (BDR, ka_bdr, 8) },
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@@ -478,15 +503,12 @@ int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
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return rom_read_delay (rom[rg]);
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}
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void rom_wr (int32 pa, int32 val, int32 lnt)
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void rom_wr_B (int32 pa, int32 val)
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{
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int32 rg = ((pa - ROMBASE) & ROMAMASK) >> 2;
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int32 sc = (pa & 3) << 3;
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if (lnt < L_LONG) { /* byte or word? */
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int32 sc = (pa & 3) << 3; /* merge */
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int32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF;
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rom[rg] = ((val & mask) << sc) | (rom[rg] & ~(mask << sc)); }
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else rom[rg] = val;
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rom[rg] = ((val & 0xFF) << sc) | (rom[rg] & ~(0xFF << sc));
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return;
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}
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@@ -590,7 +612,7 @@ uptr->flags = uptr->flags | (UNIT_ATTABLE | UNIT_BUFABLE);
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r = attach_unit (uptr, cptr);
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if (r != SCPE_OK)
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uptr->flags = uptr->flags & ~(UNIT_ATTABLE | UNIT_BUFABLE);
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else { uptr->hwmark = uptr->capac;
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else { uptr->hwmark = (uint32) uptr->capac;
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ssc_cnf = ssc_cnf & ~SSCCNF_BLO; }
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return r;
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}
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@@ -736,6 +758,21 @@ case MT_TXDB: /* TXDB */
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case MT_TODR:
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val = todr_rd ();
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break;
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case MT_CADR: /* CADR */
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val = CADR & 0xFF;
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break;
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case MT_MSER: /* MSER */
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val = MSER & 0xFF;
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break;
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case MT_CONPC: /* console PC */
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val = conpc;
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break;
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case MT_CONPSL: /* console PSL */
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val = conpsl;
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break;
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case MT_SID: /* SID */
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val = CVAX_SID | CVAX_UREV;
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break;
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default:
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ssc_bto = ssc_bto | SSCBTO_BTO; /* set BTO */
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val = 0;
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@@ -774,9 +811,19 @@ case MT_TXCS: /* TXCS */
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case MT_TXDB: /* TXDB */
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txdb_wr (val);
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break;
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case MT_CADR: /* CADR */
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CADR = (val & CADR_RW) | CADR_MBO;
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break;
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case MT_MSER: /* MSER */
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MSER = MSER & MSER_HM;
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break;
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case MT_IORESET: /* IORESET */
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ioreset_wr (val);
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break;
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case MT_SID:
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case MT_CONPC:
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case MT_CONPSL: /* halt reg */
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RSVD_OPND_FAULT;
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default:
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ssc_bto = ssc_bto | SSCBTO_BTO; /* set BTO */
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break; }
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@@ -878,7 +925,7 @@ case 16: /* err status */
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case 17: /* csr */
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return cmctl_reg[rg] & CMCSR_MASK;
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case 18: /* KA655X ext mem */
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if (cpu_extmem) return MEMSIZE;
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if (cpu_extmem) return ((int32) MEMSIZE);
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MACH_CHECK (MCHK_READ); }
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return 0;
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}
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@@ -941,7 +988,7 @@ int32 sysd_hlt_enb (void)
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return ka_bdr & BDR_BRKENB;
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}
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/* Cache diagnostic space - byte/word merges done in WriteReg */
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/* Cache diagnostic space */
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int32 cdg_rd (int32 pa)
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{
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@@ -1260,12 +1307,82 @@ int32 tmr1_inta (void)
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return tmr_tivr[1];
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}
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/* Machine check */
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int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta)
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{
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int32 i, st1, st2, p2, hsir, acc;
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if (p1 & 0x80) p1 = p1 + mchk_ref; /* mref? set v/p */
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p2 = mchk_va + 4; /* save vap */
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for (i = hsir = 0; i < 16; i++) { /* find hsir */
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if ((SISR >> i) & 1) hsir = i; }
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st1 = ((((uint32) opc) & 0xFF) << 24) |
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(hsir << 16) |
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((CADR & 0xFF) << 8) |
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(MSER & 0xFF);
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st2 = 0x00C07000 + (delta & 0xFF);
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cc = intexc (SCB_MCHK, cc, 0, IE_SVE); /* take exception */
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acc = ACC_MASK (KERN); /* in kernel mode */
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in_ie = 1;
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SP = SP - 20; /* push 5 words */
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Write (SP, 16, L_LONG, WA); /* # bytes */
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Write (SP + 4, p1, L_LONG, WA); /* mcheck type */
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Write (SP + 8, p2, L_LONG, WA); /* address */
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Write (SP + 12, st1, L_LONG, WA); /* state 1 */
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Write (SP + 16, st2, L_LONG, WA); /* state 2 */
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in_ie = 0;
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return cc;
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}
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/* Console entry */
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int32 con_halt (int32 code, int32 cc)
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{
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int32 temp;
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conpc = PC; /* save PC */
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conpsl = ((PSL | cc) & 0xFFFF00FF) | CON_HLTINS; /* PSL, param */
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temp = (PSL >> PSL_V_CUR) & 0x7; /* get is'cur */
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if (temp > 4) conpsl = conpsl | CON_BADPSL; /* invalid? */
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else STK[temp] = SP; /* save stack */
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if (mapen) conpsl = conpsl | CON_MAPON; /* mapping on? */
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mapen = 0; /* turn off map */
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SP = IS; /* set SP from IS */
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PSL = PSL_IS | PSL_IPL1F; /* PSL = 41F0000 */
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JUMP (ROMBASE); /* PC = 20040000 */
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return 0; /* new cc = 0 */
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}
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/* Bootstrap */
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t_stat cpu_boot (int32 unitno, DEVICE *dptr)
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{
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extern t_stat load_cmd (int32 flag, char *cptr);
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extern FILE *sim_log;
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t_stat r;
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PC = ROMBASE;
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PSL = PSL_IS | PSL_IPL1F;
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conpc = 0;
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conpsl = PSL_IS | PSL_IPL1F | CON_PWRUP;
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if (rom == NULL) return SCPE_IERR;
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if (*rom == 0) { /* no boot? */
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printf ("Loading boot code from ka655x.bin\n");
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if (sim_log) fprintf (sim_log,
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"Loading boot code from ka655x.bin\n");
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r = load_cmd (0, "-R ka655x.bin");
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if (r != SCPE_OK) return r; }
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return SCPE_OK;
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}
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/* SYSD reset */
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t_stat sysd_reset (DEVICE *dptr)
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{
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int32 i;
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if (sim_switches & SWMASK ('P')) sysd_powerup (); /* powerup? */
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for (i = 0; i < 2; i++) {
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tmr_csr[i] = tmr_tnir[i] = tmr_tir[i] = 0;
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tmr_inc[i] = tmr_sav[i] = 0;
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@@ -1296,6 +1413,6 @@ ssc_base = SSCBASE;
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ssc_cnf = ssc_cnf & SSCCNF_BLO;
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ssc_bto = 0;
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ssc_otp = 0;
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return sysd_reset (&sysd_dev);
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return SCPE_OK;
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}
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