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ISYS8010: Rename top intel directory to Intel-Systems (from isys8010)
This commit is contained in:
Bill Beech
committed by
Mark Pizzolato
Mark Pizzolato
parent
7e3a32fc06
commit
c73a8501ae
295
Intel-Systems/common/multibus.c
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295
Intel-Systems/common/multibus.c
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/* multibus.c: Multibus I simulator
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Copyright (c) 2010, William A. Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not be
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used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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MODIFICATIONS:
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?? ??? 10 - Original file.
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16 Dec 12 - Modified to use isbc_80_10.cfg file to set base and size.
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24 Apr 15 -- Modified to use simh_debug
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NOTES:
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This software was written by Bill Beech, Dec 2010, to allow emulation of Multibus
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Computer Systems.
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*/
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#include "system_defs.h"
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#define SET_XACK(VAL) (xack = VAL)
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int32 mbirq = 0; /* set no multibus interrupts */
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/* function prototypes */
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t_stat multibus_svc(UNIT *uptr);
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t_stat multibus_reset(DEVICE *dptr);
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void set_irq(int32 int_num);
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void clr_irq(int32 int_num);
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int32 nulldev(int32 io, int32 data);
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int32 reg_dev(int32 (*routine)(), int32 port);
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t_stat multibus_reset (DEVICE *dptr);
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int32 multibus_get_mbyte(int32 addr);
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int32 multibus_get_mword(int32 addr);
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void multibus_put_mbyte(int32 addr, int32 val);
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void multibus_put_mword(int32 addr, int32 val);
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/* external function prototypes */
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extern t_stat SBC_reset(DEVICE *dptr); /* reset the iSBC80/10 emulator */
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extern int32 isbc064_get_mbyte(int32 addr);
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extern void isbc064_put_mbyte(int32 addr, int32 val);
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extern void set_cpuint(int32 int_num);
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extern t_stat SBC_reset (DEVICE *dptr);
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extern t_stat isbc064_reset (DEVICE *dptr);
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extern t_stat isbc208_reset (DEVICE *dptr);
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/* external globals */
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extern uint8 xack; /* XACK signal */
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extern int32 int_req; /* i8080 INT signal */
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/* multibus Standard SIMH Device Data Structures */
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UNIT multibus_unit = {
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UDATA (&multibus_svc, 0, 0), 20
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};
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REG multibus_reg[] = {
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{ HRDATA (MBIRQ, mbirq, 32) },
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{ HRDATA (XACK, xack, 8) }
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};
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DEBTAB multibus_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE multibus_dev = {
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"MBIRQ", //name
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&multibus_unit, //units
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multibus_reg, //registers
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NULL, //modifiers
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1, //numunits
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16, //aradix
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32, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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&multibus_reset, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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multibus_debug, //debflags
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NULL, //msize
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NULL //lname
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};
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/* Service routines to handle simulator functions */
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/* service routine - actually does the simulated interrupts */
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t_stat multibus_svc(UNIT *uptr)
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{
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switch (mbirq) {
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case INT_1:
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set_cpuint(INT_R);
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clr_irq(SBC208_INT); /***** bad, bad, bad! */
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// printf("multibus_svc: mbirq=%04X int_req=%04X\n", mbirq, int_req);
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break;
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default:
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// printf("multibus_svc: default mbirq=%04X\n", mbirq);
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break;
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}
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sim_activate (&multibus_unit, multibus_unit.wait); /* continue poll */
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}
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/* Reset routine */
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t_stat multibus_reset(DEVICE *dptr)
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{
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SBC_reset(NULL);
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isbc064_reset(NULL);
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isbc208_reset(NULL);
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printf(" Multibus: Reset\n");
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sim_activate (&multibus_unit, multibus_unit.wait); /* activate unit */
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return SCPE_OK;
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}
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void set_irq(int32 int_num)
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{
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mbirq |= int_num;
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// printf("set_irq: int_num=%04X mbirq=%04X\n", int_num, mbirq);
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}
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void clr_irq(int32 int_num)
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{
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mbirq &= ~int_num;
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// printf("clr_irq: int_num=%04X mbirq=%04X\n", int_num, mbirq);
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}
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/* This is the I/O configuration table. There are 256 possible
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device addresses, if a device is plugged to a port it's routine
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address is here, 'nulldev' means no device is available
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*/
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struct idev {
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int32 (*routine)();
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};
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struct idev dev_table[256] = {
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 000H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 004H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 008H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 00CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 010H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 014H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 018H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 01CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 020H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 024H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 028H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 02CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 030H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 034H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 038H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 03CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 040H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 044H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 048H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 04CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 050H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 054H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 058H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 05CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 060H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 064H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 068H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 06CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 070H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 074H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 078H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 07CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 080H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 084H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 088H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 08CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 090H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 094H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 098H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 09CH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0A0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0B0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0C8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0CCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0D8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0DCH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0E8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0ECH */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F0H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F4H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev}, /* 0F8H */
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{&nulldev}, {&nulldev}, {&nulldev}, {&nulldev} /* 0FCH */
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};
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int32 nulldev(int32 flag, int32 data)
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{
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SET_XACK(0); /* set no XACK */
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if (flag == 0) /* if we got here, no valid I/O device */
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return (0xFF);
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return 0;
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}
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int32 reg_dev(int32 (*routine)(), int32 port)
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{
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if (dev_table[port].routine != &nulldev) { /* port already assigned */
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// printf("Multibus: I/O Port %02X is already assigned\n", port);
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} else {
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// printf("Port %02X is assigned\n", port);
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dev_table[port].routine = routine;
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}
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}
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/* get a byte from memory */
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int32 multibus_get_mbyte(int32 addr)
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{
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SET_XACK(0); /* set no XACK */
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// printf("multibus_get_mbyte: Cleared XACK for %04X\n", addr);
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return isbc064_get_mbyte(addr);
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}
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/* get a word from memory */
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int32 multibus_get_mword(int32 addr)
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{
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int32 val;
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val = multibus_get_mbyte(addr);
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val |= (multibus_get_mbyte(addr+1) << 8);
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return val;
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}
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/* put a byte to memory */
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void multibus_put_mbyte(int32 addr, int32 val)
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{
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SET_XACK(0); /* set no XACK */
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// printf("multibus_put_mbyte: Cleared XACK for %04X\n", addr);
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isbc064_put_mbyte(addr, val);
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// printf("multibus_put_mbyte: Done XACK=%dX\n", XACK);
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}
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/* put a word to memory */
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void multibus_put_mword(int32 addr, int32 val)
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{
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multibus_put_mbyte(addr, val);
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multibus_put_mbyte(addr+1, val << 8);
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}
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/* end of multibus.c */
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