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https://github.com/open-simh/simh.git
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Merge of Bob's simh-v3.9-0-rc3
This commit is contained in:
Mark Pizzolato
263
swtp6800/common/mp-a2.c
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263
swtp6800/common/mp-a2.c
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/* mp-a2.c: SWTP MP-A2 M6800 CPU simulator
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Copyright (c) 2011, William Beech
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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WILLIAM A. BEECH BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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Except as contained in this notice, the name of William A. Beech shall not
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be used in advertising or otherwise to promote the sale, use or other dealings
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in this Software without prior written authorization from William A. Beech.
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The MP-A2 CPU Board contains the following devices [mp-a2.c]:
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M6800 processor [m6800.c].
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M6810 128 byte RAM at 0xA000 [m6810.c].
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M6830, SWTBUG, or custom boot ROM at 0xE000 [bootrom.c].
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4 ea 2716 EPROMs at either 0xC000, 0xC800, 0xD000 and 0xD800 (LO_PROM)or
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0xE000, 0xE800, 0xF000 and 0xF800 (HI_PROM) [eprom.c].
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Interface to the SS-50 bus and the MP-B2 Mother Board for I/O
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and memory boards [mp-b2.c].
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Note: The file names of the emulator source programs for each device are
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contained in "[]".
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*/
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#include <stdio.h>
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#include "swtp_defs.h"
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#define UNIT_V_USER_D (UNIT_V_UF) /* user defined switch */
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#define UNIT_USER_D (1 << UNIT_V_USER_D)
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#define UNIT_V_4K_8K (UNIT_V_UF+1) /* off if HI_PROM and only 2K EPROM */
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#define UNIT_4K_8K (1 << UNIT_V_4K_8K)
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#define UNIT_V_SWT (UNIT_V_UF+2) /* on SWTBUG, off MIKBUG */
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#define UNIT_SWT (1 << UNIT_V_SWT)
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#define UNIT_V_8K (UNIT_V_UF+3) /* off if HI_PROM and only 2K or 4k EPROM */
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#define UNIT_8K (1 << UNIT_V_8K)
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#define UNIT_V_RAM (UNIT_V_UF+4) /* off disables 6810 RAM */
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#define UNIT_RAM (1 << UNIT_V_RAM)
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#define UNIT_V_LO_PROM (UNIT_V_UF+5) /* on EPROMS @ C000-CFFFH, off no EPROMS */
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#define UNIT_LO_PROM (1 << UNIT_V_LO_PROM)
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#define UNIT_V_HI_PROM (UNIT_V_UF+6) /* on EPROMS @ F000-FFFFH, off fo LO_PROM, MON, or no EPROMS */
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#define UNIT_HI_PROM (1 << UNIT_V_HI_PROM)
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#define UNIT_V_MON (UNIT_V_UF+7) /* on for monitor vectors in high memory */
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#define UNIT_MON (1 << UNIT_V_MON)
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/* local global variables */
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/* function prototypes */
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int32 get_base(void);
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int32 CPU_BD_get_mbyte(int32 addr);
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int32 CPU_BD_get_mword(int32 addr);
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void CPU_BD_put_mbyte(int32 addr, int32 val);
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void CPU_BD_put_mword(int32 addr, int32 val);
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/* external routines */
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/* MP-B2 bus routines */
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extern int32 MB_get_mbyte(int32 addr);
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extern int32 MB_get_mword(int32 addr);
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extern void MB_put_mbyte(int32 addr, int32 val);
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extern void MB_put_mword(int32 addr, int32 val);
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/* M6810 bus routines */
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extern int32 m6810_get_mbyte(int32 addr);
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extern void m6810_put_mbyte(int32 addr, int32 val);
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/* BOOTROM bus routines */
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extern UNIT BOOTROM_unit;
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extern int32 BOOTROM_get_mbyte(int32 offset);
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/* I2716 bus routines */
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extern int32 i2716_get_mbyte(int32 offset);
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/* MP-A2 data structures
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CPU_BD_dev MP-A2 device descriptor
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CPU_BD_unit MP-A2 unit descriptor
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CPU_BD_reg MP-A2 register list
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CPU_BD_mod MP-A2 modifiers list */
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UNIT CPU_BD_unit = { UDATA (NULL, 0, 0) };
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REG CPU_BD_reg[] = {
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{ NULL }
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};
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MTAB CPU_BD_mod[] = {
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{ UNIT_USER_D, UNIT_USER_D, "USER_D", "USER_D", NULL },
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{ UNIT_USER_D, 0, "NOUSER_D", "NOUSER_D", NULL },
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{ UNIT_4K_8K, UNIT_4K_8K, "4K_8K", "4K_8K", NULL },
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{ UNIT_4K_8K, 0, "NO4K_8K", "NO4K_8K", NULL },
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{ UNIT_SWT, UNIT_SWT, "SWT", "SWT", NULL },
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{ UNIT_SWT, 0, "NOSWT", "NOSWT", NULL },
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{ UNIT_8K, UNIT_8K, "8K", "8K", NULL },
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{ UNIT_8K, 0, "NO8K", "NO8K", NULL },
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{ UNIT_RAM, UNIT_RAM, "RAM", "RAM", NULL },
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{ UNIT_RAM, 0, "NORAM", "NORAM", NULL },
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{ UNIT_LO_PROM, UNIT_LO_PROM, "LO_PROM", "LO_PROM", NULL },
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{ UNIT_LO_PROM, 0, "NOLO_PROM", "NOLO_PROM", NULL },
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{ UNIT_HI_PROM, UNIT_HI_PROM, "HI_PROM", "HI_PROM", NULL },
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{ UNIT_HI_PROM, 0, "NOHI_PROM", "NOHI_PROM", NULL },
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{ UNIT_MON, UNIT_MON, "MON", "MON", NULL },
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{ UNIT_MON, 0, "NOMON", "NOMON", NULL },
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{ 0 }
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};
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DEBTAB CPU_BD_debug[] = {
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{ "ALL", DEBUG_all },
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{ "FLOW", DEBUG_flow },
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{ "READ", DEBUG_read },
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{ "WRITE", DEBUG_write },
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{ "LEV1", DEBUG_level1 },
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{ "LEV2", DEBUG_level2 },
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{ NULL }
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};
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DEVICE CPU_BD_dev = {
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"MP-A2", //name
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&CPU_BD_unit, //units
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CPU_BD_reg, //registers
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CPU_BD_mod, //modifiers
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1, //numunits
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16, //aradix
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16, //awidth
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1, //aincr
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16, //dradix
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8, //dwidth
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NULL, //examine
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NULL, //deposit
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NULL, //reset
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NULL, //boot
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NULL, //attach
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NULL, //detach
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NULL, //ctxt
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DEV_DEBUG, //flags
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0, //dctrl
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CPU_BD_debug, /* debflags */
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NULL, //msize
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NULL //lname
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};
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/* get base address of 2716's */
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int32 get_base(void)
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{
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if (CPU_BD_unit.flags & UNIT_LO_PROM)
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return 0xC000;
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else if (CPU_BD_unit.flags & UNIT_HI_PROM)
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return 0xF000;
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return 0;
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}
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/* get a byte from memory */
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int32 CPU_BD_get_mbyte(int32 addr)
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{
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int32 val;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: addr=%04X\n", addr);
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switch(addr & 0xF000) {
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case 0xA000:
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if (CPU_BD_unit.flags & UNIT_RAM) {
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val = m6810_get_mbyte(addr - 0xA000) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
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return val;
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} else {
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val = MB_get_mbyte(addr) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: m6810 val=%02X\n", val);
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return val;
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}
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case 0xC000:
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if (CPU_BD_unit.flags & UNIT_LO_PROM) {
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val = i2716_get_mbyte(addr - 0xC000) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: 2716=%02X\n", val);
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return val;
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} else
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return 0xFF;
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break;
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case 0xE000:
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val = BOOTROM_get_mbyte(addr - 0xE000) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
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return val;
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case 0xF000:
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if (CPU_BD_unit.flags & UNIT_MON) {
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val = BOOTROM_get_mbyte(addr - (0x10000 - BOOTROM_unit.capac)) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: EPROM=%02X\n", val);
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return val;
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}
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default:
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val = MB_get_mbyte(addr) & 0xFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mbyte: mp_b2 val=%02X\n", val);
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return val;
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}
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}
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/* get a word from memory */
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int32 CPU_BD_get_mword(int32 addr)
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{
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int32 val;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mword: addr=%04X\n", addr);
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val = (CPU_BD_get_mbyte(addr) << 8);
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val |= CPU_BD_get_mbyte(addr+1);
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val &= 0xFFFF;
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if (CPU_BD_dev.dctrl & DEBUG_read)
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printf("CPU_BD_get_mword: val=%04X\n", val);
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return val;
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}
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/* put a byte to memory */
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void CPU_BD_put_mbyte(int32 addr, int32 val)
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{
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if (CPU_BD_dev.dctrl & DEBUG_write)
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printf("CPU_BD_put_mbyte: addr=%04X, val=%02X\n", addr, val);
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switch(addr & 0xF000) {
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case 0xA000:
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if (CPU_BD_unit.flags & UNIT_RAM) {
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m6810_put_mbyte(addr - 0xA000, val);
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return;
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} else {
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MB_put_mbyte(addr, val);
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return;
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}
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default:
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MB_put_mbyte(addr, val);
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return;
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}
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}
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/* put a word to memory */
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void CPU_BD_put_mword(int32 addr, int32 val)
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{
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if (CPU_BD_dev.dctrl & DEBUG_write)
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printf("CPU_BD_put_mword: addr=%04X, val=%04X\n", addr, val);
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CPU_BD_put_mbyte(addr, val >> 8);
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CPU_BD_put_mbyte(addr+1, val);
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}
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/* end of mp-a2.c */
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