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Fix AltairZ80 compilation with Visual Studio 2008 (#85)
* AltairZ80: SS1: Fix disable after reset. The CompuPro System Support 1 could not be disabled after enabled and used due to timers causing it to be busy. Reset properly so that "set ss1 disabled" works after reset. * AltairZ80: wd179x: Properly reset 179x state. * AltairZ80: M68K: Fix compile with VS2008. * Musashi: Fix compilation with Visual Studio 2008. * AltairZ80: M68K: Resolve warnings in softfloat. * AltairZ80: Add headers to .vcproj
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@@ -91,7 +91,7 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ )
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roundBits = absZ & 0x7F;
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absZ = ( absZ + roundIncrement )>>7;
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absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
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z = absZ;
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z = (int32)absZ;
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if ( zSign ) z = - z;
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if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
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float_raise( float_flag_invalid );
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@@ -905,7 +905,7 @@ float32 int64_to_float32( int64 a )
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absA = zSign ? - a : a;
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shiftCount = countLeadingZeros64( absA ) - 40;
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if ( 0 <= shiftCount ) {
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return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount );
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return packFloat32( zSign, 0x95 - shiftCount, (bits32)(absA<<shiftCount ));
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}
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else {
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shiftCount += 7;
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@@ -915,7 +915,7 @@ float32 int64_to_float32( int64 a )
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else {
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absA <<= shiftCount;
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}
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return roundAndPackFloat32( zSign, 0x9C - shiftCount, absA );
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return roundAndPackFloat32( zSign, 0x9C - shiftCount, (bits32)absA );
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}
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}
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@@ -1548,7 +1548,7 @@ float32 float32_mul( float32 a, float32 b )
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aSig = ( aSig | 0x00800000 )<<7;
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bSig = ( bSig | 0x00800000 )<<8;
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shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
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zSig = zSig64;
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zSig = (bits32)zSig64;
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if ( 0 <= (sbits32) ( zSig<<1 ) ) {
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zSig <<= 1;
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--zExp;
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@@ -1700,7 +1700,7 @@ float32 float32_rem( float32 a, float32 b )
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expDiff += 64;
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q64 = estimateDiv128To64( aSig64, 0, bSig64 );
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q64 = ( 2 < q64 ) ? q64 - 2 : 0;
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q = q64>>( 64 - expDiff );
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q = (bits32)(q64>>( 64 - expDiff ));
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bSig <<= 6;
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aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
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}
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@@ -1971,7 +1971,7 @@ int32 float64_to_int32_round_to_zero( float64 a )
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shiftCount = 0x433 - aExp;
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savedASig = aSig;
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aSig >>= shiftCount;
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z = aSig;
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z = (int32)aSig;
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if ( aSign ) z = - z;
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if ( ( z < 0 ) ^ aSign ) {
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invalid:
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@@ -2101,7 +2101,7 @@ float32 float64_to_float32( float64 a )
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return packFloat32( aSign, 0xFF, 0 );
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}
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shift64RightJamming( aSig, 22, &aSig );
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zSig = aSig;
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zSig = (bits32)aSig;
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if ( aExp || zSig ) {
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zSig |= 0x40000000;
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aExp -= 0x381;
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@@ -2673,7 +2673,7 @@ float64 float64_sqrt( float64 a )
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}
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zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;
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aSig |= LIT64( 0x0010000000000000 );
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zSig = estimateSqrt32( aExp, aSig>>21 );
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zSig = estimateSqrt32( aExp, (bits32)(aSig>>21) );
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aSig <<= 9 - ( aExp & 1 );
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zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );
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if ( ( zSig & 0x1FF ) <= 5 ) {
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@@ -2890,7 +2890,7 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a )
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shiftCount = 0x403E - aExp;
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savedASig = aSig;
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aSig >>= shiftCount;
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z = aSig;
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z = (int32)aSig;
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if ( aSign ) z = - z;
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if ( ( z < 0 ) ^ aSign ) {
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invalid:
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@@ -3012,7 +3012,7 @@ float32 floatx80_to_float32( floatx80 a )
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}
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shift64RightJamming( aSig, 33, &aSig );
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if ( aExp || aSig ) aExp -= 0x3F81;
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return roundAndPackFloat32( aSign, aExp, aSig );
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return roundAndPackFloat32( aSign, aExp, (bits32)aSig );
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}
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@@ -3887,7 +3887,7 @@ int32 float128_to_int32_round_to_zero( float128 a )
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shiftCount = 0x402F - aExp;
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savedASig = aSig0;
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aSig0 >>= shiftCount;
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z = aSig0;
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z = (int32)aSig0;
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if ( aSign ) z = - z;
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if ( ( z < 0 ) ^ aSign ) {
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invalid:
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@@ -4031,7 +4031,7 @@ float32 float128_to_float32( float128 a )
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}
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aSig0 |= ( aSig1 != 0 );
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shift64RightJamming( aSig0, 18, &aSig0 );
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zSig = aSig0;
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zSig = (bits32)aSig0;
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if ( aExp || zSig ) {
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zSig |= 0x40000000;
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aExp -= 0x3F81;
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@@ -4714,7 +4714,7 @@ float128 float128_sqrt( float128 a )
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}
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zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
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aSig0 |= LIT64( 0x0001000000000000 );
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zSig0 = estimateSqrt32( aExp, aSig0>>17 );
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zSig0 = estimateSqrt32( aExp, (bits32)(aSig0>>17 ));
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shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
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zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
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doubleZSig0 = zSig0<<1;
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